sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

OvmfPkg: Apply uncrustify changes

Browse Source 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:09 -08:00
committed by mergify[bot]
parent d1050b9dff
commit ac0a286f4d
445 changed files with 30894 additions and 26369 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c
View File

@@ -12,25 +12,24 @@
//
// Handle for the Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
//
// Legacy Interrupt Device number (0x01 on piix4, 0x1f on q35/mch)
//
STATIC UINT8 mLegacyInterruptDevice;
STATIC UINT8 mLegacyInterruptDevice;
//
// The Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
GetNumberPirqs,
GetLocation,
ReadPirq,
WritePirq
};
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
/**
Return the number of PIRQs supported by this chipset.
@@ -53,7 +52,6 @@ GetNumberPirqs (
return EFI_SUCCESS;
}
/**
Return PCI location of this device.
$PIR table requires this info.
@@ -82,7 +80,6 @@ GetLocation (
return EFI_SUCCESS;
}
/**
Builds the PCI configuration address for the register specified by PirqNumber
@@ -95,12 +92,12 @@ GetAddress (
UINT8 PirqNumber
)
{
return PCI_LIB_ADDRESS(
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
return PCI_LIB_ADDRESS (
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
}
/**
@@ -127,12 +124,11 @@ ReadPirq (
}
*PirqData = PciRead8 (GetAddress (PirqNumber));
*PirqData = (UINT8) (*PirqData & 0x7f);
*PirqData = (UINT8)(*PirqData & 0x7f);
return EFI_SUCCESS;
}
/**
Write the given PIRQ register
@@ -160,7 +156,6 @@ WritePirq (
return EFI_SUCCESS;
}
/**
Initialize Legacy Interrupt support
@@ -178,7 +173,7 @@ LegacyInterruptInstall (
//
// Make sure the Legacy Interrupt Protocol is not already installed in the system
//
ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiLegacyInterruptProtocolGuid);
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiLegacyInterruptProtocolGuid);
//
// Query Host Bridge DID to determine platform type, then set device number
@@ -192,8 +187,12 @@ LegacyInterruptInstall (
mLegacyInterruptDevice = LEGACY_INT_DEV_Q35;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@@ -207,8 +206,7 @@ LegacyInterruptInstall (
&mLegacyInterrupt,
NULL
);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
return Status;
}