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OvmfPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:09 -08:00
committed by mergify[bot]
parent d1050b9dff
commit ac0a286f4d
445 changed files with 30894 additions and 26369 deletions
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87
OvmfPkg/Csm/Include/Protocol/FirmwareVolume.h
View File

@@ -19,7 +19,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _FIRMWARE_VOLUME_H_
#define _FIRMWARE_VOLUME_H_
//
// Firmware Volume Protocol GUID definition
//
@@ -28,49 +27,49 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
}
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
//
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
//
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
//
// ************************************************************
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
// ************************************************************
//
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
//
// Protocol API definitions
@@ -210,17 +209,17 @@ EFI_STATUS
OUT UINT32 *AuthenticationStatus
);
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
typedef struct {
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
} FRAMEWORK_EFI_FV_WRITE_FILE_DATA;
/**
@@ -296,45 +295,45 @@ struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
///
/// Retrieves volume capabilities and current settings.
///
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
///
/// Modifies the current settings of the firmware volume.
///
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
///
/// Reads an entire file from the firmware volume.
///
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
///
/// Reads a single section from a file into a buffer.
///
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
///
/// Writes an entire file into the firmware volume.
///
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
///
/// Provides service to allow searching the firmware volume.
///
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
///
/// Data field that indicates the size in bytes of the Key input buffer for
/// the GetNextFile() API.
///
UINT32 KeySize;
UINT32 KeySize;
///
/// Handle of the parent firmware volume.
///
EFI_HANDLE ParentHandle;
EFI_HANDLE ParentHandle;
};
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
#endif

54
OvmfPkg/Csm/Include/Protocol/IsaAcpi.h
View File

@@ -49,20 +49,20 @@ typedef struct _EFI_ISA_ACPI_PROTOCOL EFI_ISA_ACPI_PROTOCOL;
///
/// ISA ACPI Protocol MMIO resource attributes
///
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
///
/// ISA ACPI Protocol I/O resource attributes
///
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
///
/// EFI ISA ACPI resource type
@@ -79,26 +79,26 @@ typedef enum {
/// EFI ISA ACPI generic resource structure
///
typedef struct {
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
} EFI_ISA_ACPI_RESOURCE;
///
/// EFI ISA ACPI resource device identifier
///
typedef struct {
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
} EFI_ISA_ACPI_DEVICE_ID;
///
/// EFI ISA ACPI resource list
///
typedef struct {
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
} EFI_ISA_ACPI_RESOURCE_LIST;
/**
@@ -283,16 +283,16 @@ EFI_STATUS
/// and assign resources to an ISA controller.
///
struct _EFI_ISA_ACPI_PROTOCOL {
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
};
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
#endif

28
OvmfPkg/Csm/Include/Protocol/IsaIo.h
View File

@@ -128,11 +128,11 @@ typedef struct {
///
/// Read from ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
///
/// Write to ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
} EFI_ISA_IO_PROTOCOL_ACCESS;
/**
@@ -326,31 +326,31 @@ EFI_STATUS
/// ISA_PCI_IO_PROTOCOL instance associated with the ISA controller.
///
struct _EFI_ISA_IO_PROTOCOL {
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
///
/// The list of I/O , MMIO, DMA, and Interrupt resources associated with the
/// ISA controller abstracted by this instance of the EFI_ISA_IO_PROTOCOL.
///
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
///
/// The size, in bytes, of the ROM image.
///
UINT32 RomSize;
UINT32 RomSize;
///
/// A pointer to the in memory copy of the ROM image. The ISA Bus Driver is responsible
/// for allocating memory for the ROM image, and copying the contents of the ROM to memory
/// during ISA Bus initialization.
///
VOID *RomImage;
VOID *RomImage;
};
extern EFI_GUID gEfiIsaIoProtocolGuid;
extern EFI_GUID gEfiIsaIoProtocolGuid;
#endif

652
OvmfPkg/Csm/Include/Protocol/LegacyBios.h
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File diff suppressed because it is too large Load Diff

194
OvmfPkg/Csm/Include/Protocol/LegacyBiosPlatform.h
View File

@@ -66,7 +66,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED The MP table is not supported on this platform.
///
EfiGetPlatformBinaryMpTable = 0,
EfiGetPlatformBinaryMpTable = 0,
///
/// This mode returns a block of data. The content and usage is IBV or OEM defined.
/// OEMs or IBVs normally use this function for nonstandard Compatibility16 runtime soft
@@ -104,7 +104,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem INT is not supported on this platform.
///
EfiGetPlatformBinaryOemIntData = 1,
EfiGetPlatformBinaryOemIntData = 1,
///
/// This mode returns a block of data. The content and usage is IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It
@@ -146,57 +146,57 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem16 is not supported on this platform.
///
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
///
/// This mode returns a TPM binary image for the onboard TPM device.
///
@@ -226,7 +226,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND No BinaryImage was found.
///
EfiGetPlatformBinaryTpmBinary = 4,
EfiGetPlatformBinaryTpmBinary = 4,
///
/// The mode finds the Compatibility16 Rom Image.
///
@@ -250,7 +250,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND ROM not found.
///
EfiGetPlatformBinarySystemRom = 5,
EfiGetPlatformBinarySystemRom = 5,
///
/// This mode returns the Base address of PciExpress memory mapped configuration
/// address space.
@@ -275,9 +275,9 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_UNSUPPORTED System does not PciExpress.
///
EfiGetPlatformPciExpressBase = 6,
EfiGetPlatformPciExpressBase = 6,
///
EfiGetPlatformPmmSize = 7,
EfiGetPlatformPmmSize = 7,
///
EfiGetPlatformEndOpromShadowAddr = 8,
///
@@ -301,7 +301,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformVgaHandle = 0,
EfiGetPlatformVgaHandle = 0,
///
/// This mode returns the Compatibility16 policy for the device that should be the IDE
/// controller used during a Compatibility16 boot.
@@ -317,7 +317,7 @@ typedef enum {
/// AdditionalData Pointer to HddInfo.
/// Information about all onboard IDE controllers.
///
EfiGetPlatformIdeHandle = 1,
EfiGetPlatformIdeHandle = 1,
///
/// This mode returns the Compatibility16 policy for the device that should be the ISA bus
/// controller used during a Compatibility16 boot.
@@ -332,7 +332,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformIsaBusHandle = 2,
EfiGetPlatformIsaBusHandle = 2,
///
/// This mode returns the Compatibility16 policy for the device that should be the USB
/// device used during a Compatibility16 boot.
@@ -347,7 +347,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformUsbHandle = 3
EfiGetPlatformUsbHandle = 3
} EFI_GET_PLATFORM_HANDLE_MODE;
/**
@@ -387,7 +387,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookShadowServiceRoms= 1,
EfiPlatformHookShadowServiceRoms = 1,
///
/// This mode allows platform to perform any required operation after an OpROM has
/// completed its initialization.
@@ -404,21 +404,21 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookAfterRomInit = 2
EfiPlatformHookAfterRomInit = 2
} EFI_GET_PLATFORM_HOOK_MODE;
///
/// This IRQ has not been assigned to PCI.
///
#define PCI_UNUSED 0x00
#define PCI_UNUSED 0x00
///
/// This IRQ has been assigned to PCI.
///
#define PCI_USED 0xFF
#define PCI_USED 0xFF
///
/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.
///
#define LEGACY_USED 0xFE
#define LEGACY_USED 0xFE
#pragma pack(1)
@@ -426,7 +426,7 @@ typedef struct {
///
/// IRQ for this entry.
///
UINT8 Irq;
UINT8 Irq;
///
/// Status of this IRQ.
///
@@ -437,103 +437,101 @@ typedef struct {
/// LEGACY_USED 0xFE. This IRQ has been used by an SIO legacy
/// device and cannot be used by PCI.
///
UINT8 Used;
UINT8 Used;
} EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY;
//
// Define PIR table structures
//
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
typedef struct {
///
/// $PIR.
///
UINT32 Signature;
UINT32 Signature;
///
/// 0x00.
///
UINT8 MinorVersion;
UINT8 MinorVersion;
///
/// 0x01 for table version 1.0.
///
UINT8 MajorVersion;
UINT8 MajorVersion;
///
/// 0x20 + RoutingTableEntries * 0x10.
///
UINT16 TableSize;
UINT16 TableSize;
///
/// PCI interrupt router bus.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI interrupt router device/function.
///
UINT8 DevFun;
UINT8 DevFun;
///
/// If nonzero, bit map of IRQs reserved for PCI.
///
UINT16 PciOnlyIrq;
UINT16 PciOnlyIrq;
///
/// Vendor ID of a compatible PCI interrupt router.
///
UINT16 CompatibleVid;
UINT16 CompatibleVid;
///
/// Device ID of a compatible PCI interrupt router.
///
UINT16 CompatibleDid;
UINT16 CompatibleDid;
///
/// If nonzero, a value passed directly to the IRQ miniport's Initialize function.
///
UINT32 Miniport;
UINT32 Miniport;
///
/// Reserved for future usage.
///
UINT8 Reserved[11];
UINT8 Reserved[11];
///
/// This byte plus the sum of all other bytes in the LocalPirqTable equal 0x00.
///
UINT8 Checksum;
UINT8 Checksum;
} EFI_LEGACY_PIRQ_TABLE_HEADER;
typedef struct {
///
/// If nonzero, a value assigned by the IBV.
///
UINT8 Pirq;
UINT8 Pirq;
///
/// If nonzero, the IRQs that can be assigned to this device.
///
UINT16 IrqMask;
UINT16 IrqMask;
} EFI_LEGACY_PIRQ_ENTRY;
typedef struct {
///
/// PCI bus of the entry.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI device of this entry.
///
UINT8 Device;
UINT8 Device;
///
/// An IBV value and IRQ mask for PIRQ pins A through D.
///
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
///
/// If nonzero, the slot number assigned by the board manufacturer.
///
UINT8 Slot;
UINT8 Slot;
///
/// Reserved for future use.
///
UINT8 Reserved;
UINT8 Reserved;
} EFI_LEGACY_IRQ_ROUTING_ENTRY;
#pragma pack()
/**
Finds the binary data or other platform information.
@@ -725,31 +723,31 @@ struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
///
/// Gets binary data or other platform information.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
///
/// Returns a buffer of all handles matching the requested subfunction.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
///
/// Loads and initializes the traditional BIOS SMM handler.
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
///
/// Allows platform to perform any required actions after a LegacyBios operation.
///
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
///
/// Gets $PIR table.
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
///
/// Translates the given PIRQ to the final value after traversing any PCI bridges.
///
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
///
/// Final platform function before the system attempts to boot to a traditional OS.
///
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
};
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
#endif

11
OvmfPkg/Csm/Include/Protocol/LegacyInterrupt.h
View File

@@ -13,7 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_LEGACY_INTERRUPT_H_
#define _EFI_LEGACY_INTERRUPT_H_
#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
{ \
0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
@@ -99,24 +98,24 @@ struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
///
/// Gets the number of PIRQs supported.
///
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
///
/// Gets the PCI bus, device, and function that is associated with this protocol.
///
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
///
/// Reads the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
///
/// Writes to the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
};
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
#endif

20
OvmfPkg/Csm/Include/Protocol/VgaMiniPort.h
View File

@@ -20,7 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Forward declaration for the EFI_VGA_MINI_PORT_PROTOCOL.
///
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
/**
Sets the text display mode of a VGA controller.
@@ -49,40 +49,40 @@ EFI_STATUS
);
struct _EFI_VGA_MINI_PORT_PROTOCOL {
EFI_VGA_MINI_PORT_SET_MODE SetMode;
EFI_VGA_MINI_PORT_SET_MODE SetMode;
///
/// MMIO base address of the VGA text mode framebuffer. Typically set to 0xB8000.
///
UINT64 VgaMemoryOffset;
UINT64 VgaMemoryOffset;
///
/// I/O Port address for the VGA CRTC address register. Typically set to 0x3D4.
///
UINT64 CrtcAddressRegisterOffset;
UINT64 CrtcAddressRegisterOffset;
///
/// I/O Port address for the VGA CRTC data register. Typically set to 0x3D5.
///
UINT64 CrtcDataRegisterOffset;
UINT64 CrtcDataRegisterOffset;
///
/// PCI Controller MMIO BAR index of the VGA text mode frame buffer. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 VgaMemoryBar;
UINT8 VgaMemoryBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC address register. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcAddressRegisterBar;
UINT8 CrtcAddressRegisterBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC data register. Typically set
/// to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcDataRegisterBar;
UINT8 CrtcDataRegisterBar;
///
/// The maximum number of text modes that this VGA controller supports.
///
UINT8 MaxMode;
UINT8 MaxMode;
};
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
#endif