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OvmfPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:09 -08:00
committed by mergify[bot]
parent d1050b9dff
commit ac0a286f4d
445 changed files with 30894 additions and 26369 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
OvmfPkg/XenPlatformPei/AmdSev.c
View File

@@ -28,8 +28,8 @@ AmdSevInitialize (
VOID
)
{
UINT64 EncryptionMask;
RETURN_STATUS PcdStatus;
UINT64 EncryptionMask;
RETURN_STATUS PcdStatus;
//
// Check if SEV is enabled
@@ -42,7 +42,7 @@ AmdSevInitialize (
// Set Memory Encryption Mask PCD
//
EncryptionMask = MemEncryptSevGetEncryptionMask ();
PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
ASSERT_RETURN_ERROR (PcdStatus);
DEBUG ((DEBUG_INFO, "SEV is enabled (mask 0x%lx)\n", EncryptionMask));

36
OvmfPkg/XenPlatformPei/ClearCache.c
View File

@@ -30,7 +30,7 @@ STATIC
VOID
EFIAPI
ClearCache (
IN OUT VOID *WorkSpace
IN OUT VOID *WorkSpace
)
{
WriteBackInvalidateDataCache ();
@@ -57,8 +57,8 @@ ClearCacheOnMpServicesAvailable (
IN VOID *Ppi
)
{
EFI_PEI_MP_SERVICES_PPI *MpServices;
EFI_STATUS Status;
EFI_PEI_MP_SERVICES_PPI *MpServices;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "%a: %a\n", gEfiCallerBaseName, __FUNCTION__));
@@ -66,15 +66,15 @@ ClearCacheOnMpServicesAvailable (
// Clear cache on all the APs in parallel.
//
MpServices = Ppi;
Status = MpServices->StartupAllAPs (
(CONST EFI_PEI_SERVICES **)PeiServices,
MpServices,
ClearCache, // Procedure
FALSE, // SingleThread
0, // TimeoutInMicroSeconds: inf.
NULL // ProcedureArgument
);
if (EFI_ERROR (Status) && Status != EFI_NOT_STARTED) {
Status = MpServices->StartupAllAPs (
(CONST EFI_PEI_SERVICES **)PeiServices,
MpServices,
ClearCache, // Procedure
FALSE, // SingleThread
0, // TimeoutInMicroSeconds: inf.
NULL // ProcedureArgument
);
if (EFI_ERROR (Status) && (Status != EFI_NOT_STARTED)) {
DEBUG ((DEBUG_ERROR, "%a: StartupAllAps(): %r\n", __FUNCTION__, Status));
return Status;
}
@@ -90,7 +90,7 @@ ClearCacheOnMpServicesAvailable (
// Notification object for registering the callback, for when
// EFI_PEI_MP_SERVICES_PPI becomes available.
//
STATIC CONST EFI_PEI_NOTIFY_DESCRIPTOR mMpServicesNotify = {
STATIC CONST EFI_PEI_NOTIFY_DESCRIPTOR mMpServicesNotify = {
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | // Flags
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMpServicesPpiGuid, // Guid
@@ -102,11 +102,15 @@ InstallClearCacheCallback (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = PeiServicesNotifyPpi (&mMpServicesNotify);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to set up MP Services callback: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to set up MP Services callback: %r\n",
__FUNCTION__,
Status
));
}
}

13
OvmfPkg/XenPlatformPei/Cmos.c
View File

@@ -8,7 +8,6 @@
**/
#include "Cmos.h"
#include "Library/IoLib.h"
@@ -26,14 +25,13 @@
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
IN UINTN Index
)
{
IoWrite8 (0x70, (UINT8) Index);
IoWrite8 (0x70, (UINT8)Index);
return IoRead8 (0x71);
}
/**
Writes 8-bits of CMOS data.
@@ -49,12 +47,11 @@ CmosRead8 (
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
IN UINTN Index,
IN UINT8 Value
)
{
IoWrite8 (0x70, (UINT8) Index);
IoWrite8 (0x70, (UINT8)Index);
IoWrite8 (0x71, Value);
return Value;
}

8
OvmfPkg/XenPlatformPei/Cmos.h
View File

@@ -25,7 +25,7 @@
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
IN UINTN Index
);
/**
@@ -43,10 +43,8 @@ CmosRead8 (
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
IN UINTN Index,
IN UINT8 Value
);
#endif

4
OvmfPkg/XenPlatformPei/Fv.c
View File

@@ -15,7 +15,6 @@
#include <Library/PeiServicesLib.h>
#include <Library/PcdLib.h>
/**
Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
and DXE know about them.
@@ -65,7 +64,7 @@ PeiFvInitialization (
//
PeiServicesInstallFvInfoPpi (
NULL,
(VOID *)(UINTN) PcdGet32 (PcdOvmfDxeMemFvBase),
(VOID *)(UINTN)PcdGet32 (PcdOvmfDxeMemFvBase),
PcdGet32 (PcdOvmfDxeMemFvSize),
NULL,
NULL
@@ -73,4 +72,3 @@ PeiFvInitialization (
return EFI_SUCCESS;
}

102
OvmfPkg/XenPlatformPei/MemDetect.c
View File

@@ -34,20 +34,20 @@ Module Name:
#include "Platform.h"
#include "Cmos.h"
UINT8 mPhysMemAddressWidth;
UINT8 mPhysMemAddressWidth;
STATIC UINT32 mS3AcpiReservedMemoryBase;
STATIC UINT32 mS3AcpiReservedMemorySize;
STATIC UINT32 mS3AcpiReservedMemoryBase;
STATIC UINT32 mS3AcpiReservedMemorySize;
STATIC UINT16 mQ35TsegMbytes;
STATIC UINT16 mQ35TsegMbytes;
VOID
Q35TsegMbytesInitialization (
VOID
)
{
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {
DEBUG ((
@@ -99,16 +99,16 @@ Q35TsegMbytesInitialization (
STATIC
UINT64
GetHighestSystemMemoryAddress (
BOOLEAN Below4gb
BOOLEAN Below4gb
)
{
EFI_E820_ENTRY64 *E820Map;
UINT32 E820EntriesCount;
EFI_E820_ENTRY64 *Entry;
EFI_STATUS Status;
UINT32 Loop;
UINT64 HighestAddress;
UINT64 EntryEnd;
EFI_E820_ENTRY64 *E820Map;
UINT32 E820EntriesCount;
EFI_E820_ENTRY64 *Entry;
EFI_STATUS Status;
UINT32 Loop;
UINT64 HighestAddress;
UINT64 EntryEnd;
HighestAddress = 0;
@@ -116,12 +116,12 @@ GetHighestSystemMemoryAddress (
ASSERT_EFI_ERROR (Status);
for (Loop = 0; Loop < E820EntriesCount; Loop++) {
Entry = E820Map + Loop;
Entry = E820Map + Loop;
EntryEnd = Entry->BaseAddr + Entry->Length;
if (Entry->Type == EfiAcpiAddressRangeMemory &&
EntryEnd > HighestAddress) {
if ((Entry->Type == EfiAcpiAddressRangeMemory) &&
(EntryEnd > HighestAddress))
{
if (Below4gb && (EntryEnd <= BASE_4GB)) {
HighestAddress = EntryEnd;
} else if (!Below4gb && (EntryEnd >= BASE_4GB)) {
@@ -141,8 +141,8 @@ GetSystemMemorySizeBelow4gb (
VOID
)
{
UINT8 Cmos0x34;
UINT8 Cmos0x35;
UINT8 Cmos0x34;
UINT8 Cmos0x35;
//
// In PVH case, there is no CMOS, we have to calculate the memory size
@@ -166,10 +166,10 @@ GetSystemMemorySizeBelow4gb (
// into the calculation to get the total memory size.
//
Cmos0x34 = (UINT8) CmosRead8 (0x34);
Cmos0x35 = (UINT8) CmosRead8 (0x35);
Cmos0x34 = (UINT8)CmosRead8 (0x34);
Cmos0x35 = (UINT8)CmosRead8 (0x35);
return (UINT32) (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
}
/**
@@ -180,12 +180,12 @@ AddressWidthInitialization (
VOID
)
{
UINT32 RegEax;
UINT32 RegEax;
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
mPhysMemAddressWidth = (UINT8) RegEax;
mPhysMemAddressWidth = (UINT8)RegEax;
} else {
mPhysMemAddressWidth = 36;
}
@@ -208,21 +208,22 @@ GetPeiMemoryCap (
VOID
)
{
BOOLEAN Page1GSupport;
UINT32 RegEax;
UINT32 RegEdx;
UINT32 Pml4Entries;
UINT32 PdpEntries;
UINTN TotalPages;
BOOLEAN Page1GSupport;
UINT32 RegEax;
UINT32 RegEdx;
UINT32 Pml4Entries;
UINT32 PdpEntries;
UINTN TotalPages;
//
// If DXE is 32-bit, then just return the traditional 64 MB cap.
//
#ifdef MDE_CPU_IA32
#ifdef MDE_CPU_IA32
if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
return SIZE_64MB;
}
#endif
#endif
//
// Dependent on physical address width, PEI memory allocations can be
@@ -243,7 +244,7 @@ GetPeiMemoryCap (
if (mPhysMemAddressWidth <= 39) {
Pml4Entries = 1;
PdpEntries = 1 << (mPhysMemAddressWidth - 30);
PdpEntries = 1 << (mPhysMemAddressWidth - 30);
ASSERT (PdpEntries <= 0x200);
} else {
Pml4Entries = 1 << (mPhysMemAddressWidth - 39);
@@ -252,7 +253,7 @@ GetPeiMemoryCap (
}
TotalPages = Page1GSupport ? Pml4Entries + 1 :
(PdpEntries + 1) * Pml4Entries + 1;
(PdpEntries + 1) * Pml4Entries + 1;
ASSERT (TotalPages <= 0x40201);
//
@@ -263,7 +264,6 @@ GetPeiMemoryCap (
return (UINT32)(EFI_PAGES_TO_SIZE (TotalPages) + SIZE_64MB);
}
/**
Publish PEI core memory
@@ -275,11 +275,11 @@ PublishPeiMemory (
VOID
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
UINT32 LowerMemorySize;
UINT32 PeiMemoryCap;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
UINT32 LowerMemorySize;
UINT32 PeiMemoryCap;
LowerMemorySize = GetSystemMemorySizeBelow4gb ();
@@ -288,8 +288,13 @@ PublishPeiMemory (
MemorySize = mS3AcpiReservedMemorySize;
} else {
PeiMemoryCap = GetPeiMemoryCap ();
DEBUG ((DEBUG_INFO, "%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",
__FUNCTION__, mPhysMemAddressWidth, PeiMemoryCap >> 10));
DEBUG ((
DEBUG_INFO,
"%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",
__FUNCTION__,
mPhysMemAddressWidth,
PeiMemoryCap >> 10
));
//
// Determine the range of memory to use during PEI
@@ -306,13 +311,12 @@ PublishPeiMemory (
//
// Publish this memory to the PEI Core
//
Status = PublishSystemMemory(MemoryBase, MemorySize);
Status = PublishSystemMemory (MemoryBase, MemorySize);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Publish system RAM and reserve memory regions
@@ -336,12 +340,12 @@ InitializeRamRegions (
// such that they would overlap the LockBox storage.
//
ZeroMem (
(VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)
(VOID *)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINTN)PcdGet32 (PcdOvmfLockBoxStorageSize)
);
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),
(EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINT64)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageSize),
EfiBootServicesData
);
}

161
OvmfPkg/XenPlatformPei/Platform.c
View File

@@ -36,7 +36,7 @@
#include "Platform.h"
#include "Cmos.h"
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiACPIMemoryNVS, 0x004 },
{ EfiACPIReclaimMemory, 0x008 },
{ EfiReservedMemoryType, 0x004 },
@@ -47,8 +47,7 @@ EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiMaxMemoryType, 0x000 }
};
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMasterBootModePpiGuid,
@@ -56,24 +55,22 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
}
};
UINT16 mHostBridgeDevId;
UINT16 mHostBridgeDevId;
EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_MAPPED_IO,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
@@ -81,23 +78,23 @@ AddIoMemoryBaseSizeHob (
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_RESERVED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
(Cacheable ?
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE :
0
) |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
(Cacheable ?
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE :
0
) |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
@@ -105,64 +102,64 @@ AddReservedMemoryBaseSizeHob (
VOID
AddReservedMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit,
BOOLEAN Cacheable
)
{
AddReservedMemoryBaseSizeHob (MemoryBase,
(UINT64)(MemoryLimit - MemoryBase), Cacheable);
AddReservedMemoryBaseSizeHob (
MemoryBase,
(UINT64)(MemoryLimit - MemoryBase),
Cacheable
);
}
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
}
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
MemMapInitialization (
VOID
)
{
UINT64 PciIoBase;
UINT64 PciIoSize;
RETURN_STATUS PcdStatus;
UINT64 PciIoBase;
UINT64 PciIoSize;
RETURN_STATUS PcdStatus;
PciIoBase = 0xC000;
PciIoSize = 0x4000;
@@ -173,7 +170,7 @@ MemMapInitialization (
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
sizeof (mDefaultMemoryTypeInformation)
);
//
@@ -203,8 +200,8 @@ PciExBarInitialization (
)
{
union {
UINT64 Uint64;
UINT32 Uint32[2];
UINT64 Uint64;
UINT32 Uint32[2];
} PciExBarBase;
//
@@ -243,13 +240,13 @@ MiscInitialization (
VOID
)
{
UINTN PmCmd;
UINTN Pmba;
UINT32 PmbaAndVal;
UINT32 PmbaOrVal;
UINTN AcpiCtlReg;
UINT8 AcpiEnBit;
RETURN_STATUS PcdStatus;
UINTN PmCmd;
UINTN Pmba;
UINT32 PmbaAndVal;
UINT32 PmbaOrVal;
UINTN AcpiCtlReg;
UINT8 AcpiEnBit;
RETURN_STATUS PcdStatus;
//
// Disable A20 Mask
@@ -290,11 +287,17 @@ MiscInitialization (
//
return;
}
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, mHostBridgeDevId));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
mHostBridgeDevId
));
ASSERT (FALSE);
return;
}
PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, mHostBridgeDevId);
ASSERT_RETURN_ERROR (PcdStatus);
@@ -337,17 +340,17 @@ MiscInitialization (
}
}
VOID
BootModeInitialization (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
if (CmosRead8 (0xF) == 0xFE) {
mBootMode = BOOT_ON_S3_RESUME;
}
CmosWrite8 (0xF, 0x00);
Status = PeiServicesSetBootMode (mBootMode);
@@ -357,13 +360,12 @@ BootModeInitialization (
ASSERT_EFI_ERROR (Status);
}
VOID
ReserveEmuVariableNvStore (
)
{
EFI_PHYSICAL_ADDRESS VariableStore;
RETURN_STATUS PcdStatus;
EFI_PHYSICAL_ADDRESS VariableStore;
RETURN_STATUS PcdStatus;
//
// Allocate storage for NV variables early on so it will be
@@ -373,25 +375,25 @@ ReserveEmuVariableNvStore (
//
VariableStore =
(EFI_PHYSICAL_ADDRESS)(UINTN)
AllocateRuntimePages (
EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize))
);
DEBUG ((DEBUG_INFO,
"Reserved variable store memory: 0x%lX; size: %dkb\n",
VariableStore,
(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
));
AllocateRuntimePages (
EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize))
);
DEBUG ((
DEBUG_INFO,
"Reserved variable store memory: 0x%lX; size: %dkb\n",
VariableStore,
(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
));
PcdStatus = PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore);
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID
DebugDumpCmos (
VOID
)
{
UINT32 Loop;
UINT32 Loop;
DEBUG ((DEBUG_INFO, "CMOS:\n"));
@@ -399,6 +401,7 @@ DebugDumpCmos (
if ((Loop % 0x10) == 0) {
DEBUG ((DEBUG_INFO, "%02x:", Loop));
}
DEBUG ((DEBUG_INFO, " %02x", CmosRead8 (Loop)));
if ((Loop % 0x10) == 0xf) {
DEBUG ((DEBUG_INFO, "\n"));
@@ -406,8 +409,6 @@ DebugDumpCmos (
}
}
/**
Perform Platform PEI initialization.
@@ -424,7 +425,7 @@ InitializeXenPlatform (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));

40
OvmfPkg/XenPlatformPei/Platform.h
View File

@@ -15,40 +15,40 @@
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
);
VOID
AddReservedMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit,
BOOLEAN Cacheable
);
VOID
@@ -118,13 +118,13 @@ XenPublishRamRegions (
EFI_STATUS
XenGetE820Map (
EFI_E820_ENTRY64 **Entries,
UINT32 *Count
EFI_E820_ENTRY64 **Entries,
UINT32 *Count
);
EFI_STATUS
PhysicalAddressIdentityMapping (
IN EFI_PHYSICAL_ADDRESS AddressToMap
IN EFI_PHYSICAL_ADDRESS AddressToMap
);
VOID
@@ -132,10 +132,10 @@ CalibrateLapicTimer (
VOID
);
extern EFI_BOOT_MODE mBootMode;
extern EFI_BOOT_MODE mBootMode;
extern UINT8 mPhysMemAddressWidth;
extern UINT8 mPhysMemAddressWidth;
extern UINT16 mHostBridgeDevId;
extern UINT16 mHostBridgeDevId;
#endif // _PLATFORM_PEI_H_INCLUDED_

338
OvmfPkg/XenPlatformPei/Xen.c
View File

@@ -37,17 +37,17 @@
#include "Platform.h"
#include "Xen.h"
STATIC UINT32 mXenLeaf = 0;
STATIC UINT32 mXenLeaf = 0;
EFI_XEN_INFO mXenInfo;
EFI_XEN_INFO mXenInfo;
//
// Location of the firmware info struct setup by hvmloader.
// Only the E820 table is used by OVMF.
//
EFI_XEN_OVMF_INFO *mXenHvmloaderInfo;
STATIC EFI_E820_ENTRY64 mE820Entries[128];
STATIC UINT32 mE820EntriesCount;
EFI_XEN_OVMF_INFO *mXenHvmloaderInfo;
STATIC EFI_E820_ENTRY64 mE820Entries[128];
STATIC UINT32 mE820EntriesCount;
/**
Returns E820 map provided by Xen
@@ -59,23 +59,23 @@ STATIC UINT32 mE820EntriesCount;
**/
EFI_STATUS
XenGetE820Map (
EFI_E820_ENTRY64 **Entries,
UINT32 *Count
EFI_E820_ENTRY64 **Entries,
UINT32 *Count
)
{
INTN ReturnCode;
xen_memory_map_t Parameters;
UINTN LoopIndex;
UINTN Index;
EFI_E820_ENTRY64 TmpEntry;
INTN ReturnCode;
xen_memory_map_t Parameters;
UINTN LoopIndex;
UINTN Index;
EFI_E820_ENTRY64 TmpEntry;
//
// Get E820 produced by hvmloader
//
if (mXenHvmloaderInfo != NULL) {
ASSERT (mXenHvmloaderInfo->E820 < MAX_ADDRESS);
*Entries = (EFI_E820_ENTRY64 *)(UINTN) mXenHvmloaderInfo->E820;
*Count = mXenHvmloaderInfo->E820EntriesCount;
*Entries = (EFI_E820_ENTRY64 *)(UINTN)mXenHvmloaderInfo->E820;
*Count = mXenHvmloaderInfo->E820EntriesCount;
return EFI_SUCCESS;
}
@@ -86,7 +86,7 @@ XenGetE820Map (
if (mE820EntriesCount > 0) {
*Entries = mE820Entries;
*Count = mE820EntriesCount;
*Count = mE820EntriesCount;
return EFI_SUCCESS;
}
@@ -105,14 +105,14 @@ XenGetE820Map (
for (LoopIndex = 1; LoopIndex < mE820EntriesCount; LoopIndex++) {
for (Index = LoopIndex; Index < mE820EntriesCount; Index++) {
if (mE820Entries[Index - 1].BaseAddr > mE820Entries[Index].BaseAddr) {
TmpEntry = mE820Entries[Index];
mE820Entries[Index] = mE820Entries[Index - 1];
TmpEntry = mE820Entries[Index];
mE820Entries[Index] = mE820Entries[Index - 1];
mE820Entries[Index - 1] = TmpEntry;
}
}
}
*Count = mE820EntriesCount;
*Count = mE820EntriesCount;
*Entries = mE820Entries;
return EFI_SUCCESS;
@@ -128,14 +128,14 @@ EFI_STATUS
XenConnect (
)
{
UINT32 Index;
UINT32 TransferReg;
UINT32 TransferPages;
UINT32 XenVersion;
EFI_XEN_OVMF_INFO *Info;
CHAR8 Sig[sizeof (Info->Signature) + 1];
UINT32 *PVHResetVectorData;
RETURN_STATUS Status;
UINT32 Index;
UINT32 TransferReg;
UINT32 TransferPages;
UINT32 XenVersion;
EFI_XEN_OVMF_INFO *Info;
CHAR8 Sig[sizeof (Info->Signature) + 1];
UINT32 *PVHResetVectorData;
RETURN_STATUS Status;
ASSERT (mXenLeaf != 0);
@@ -150,9 +150,11 @@ XenConnect (
}
for (Index = 0; Index < TransferPages; Index++) {
AsmWriteMsr64 (TransferReg,
(UINTN) mXenInfo.HyperPages +
(Index << EFI_PAGE_SHIFT) + Index);
AsmWriteMsr64 (
TransferReg,
(UINTN)mXenInfo.HyperPages +
(Index << EFI_PAGE_SHIFT) + Index
);
}
//
@@ -160,8 +162,12 @@ XenConnect (
//
AsmCpuid (mXenLeaf + 1, &XenVersion, NULL, NULL, NULL);
DEBUG ((DEBUG_ERROR, "Detected Xen version %d.%d\n",
XenVersion >> 16, XenVersion & 0xFFFF));
DEBUG ((
DEBUG_ERROR,
"Detected Xen version %d.%d\n",
XenVersion >> 16,
XenVersion & 0xFFFF
));
mXenInfo.VersionMajor = (UINT16)(XenVersion >> 16);
mXenInfo.VersionMinor = (UINT16)(XenVersion & 0xFFFF);
@@ -169,12 +175,16 @@ XenConnect (
// Check if there are information left by hvmloader
//
Info = (EFI_XEN_OVMF_INFO *)(UINTN) OVMF_INFO_PHYSICAL_ADDRESS;
Info = (EFI_XEN_OVMF_INFO *)(UINTN)OVMF_INFO_PHYSICAL_ADDRESS;
//
// Copy the signature, and make it null-terminated.
//
AsciiStrnCpyS (Sig, sizeof (Sig), (CHAR8 *) &Info->Signature,
sizeof (Info->Signature));
AsciiStrnCpyS (
Sig,
sizeof (Sig),
(CHAR8 *)&Info->Signature,
sizeof (Info->Signature)
);
if (AsciiStrCmp (Sig, "XenHVMOVMF") == 0) {
mXenHvmloaderInfo = Info;
} else {
@@ -188,14 +198,14 @@ XenConnect (
// booted via the PVH entry point.
//
PVHResetVectorData = (VOID *)(UINTN) PcdGet32 (PcdXenPvhStartOfDayStructPtr);
PVHResetVectorData = (VOID *)(UINTN)PcdGet32 (PcdXenPvhStartOfDayStructPtr);
//
// That magic value is written in XenResetVector/Ia32/XenPVHMain.asm
//
if (PVHResetVectorData[1] == SIGNATURE_32 ('X', 'P', 'V', 'H')) {
struct hvm_start_info *HVMStartInfo;
struct hvm_start_info *HVMStartInfo;
HVMStartInfo = (VOID *)(UINTN) PVHResetVectorData[0];
HVMStartInfo = (VOID *)(UINTN)PVHResetVectorData[0];
if (HVMStartInfo->magic == XEN_HVM_START_MAGIC_VALUE) {
ASSERT (HVMStartInfo->rsdp_paddr != 0);
if (HVMStartInfo->rsdp_paddr != 0) {
@@ -207,7 +217,7 @@ XenConnect (
BuildGuidDataHob (
&gEfiXenInfoGuid,
&mXenInfo,
sizeof(mXenInfo)
sizeof (mXenInfo)
);
//
@@ -232,7 +242,7 @@ XenDetect (
VOID
)
{
UINT8 Signature[13];
UINT8 Signature[13];
if (mXenLeaf != 0) {
return TRUE;
@@ -240,13 +250,15 @@ XenDetect (
Signature[12] = '\0';
for (mXenLeaf = 0x40000000; mXenLeaf < 0x40010000; mXenLeaf += 0x100) {
AsmCpuid (mXenLeaf,
NULL,
(UINT32 *) &Signature[0],
(UINT32 *) &Signature[4],
(UINT32 *) &Signature[8]);
AsmCpuid (
mXenLeaf,
NULL,
(UINT32 *)&Signature[0],
(UINT32 *)&Signature[4],
(UINT32 *)&Signature[8]
);
if (!AsciiStrCmp ((CHAR8 *) Signature, "XenVMMXenVMM")) {
if (!AsciiStrCmp ((CHAR8 *)Signature, "XenVMMXenVMM")) {
return TRUE;
}
}
@@ -281,14 +293,13 @@ XenPublishRamRegions (
VOID
)
{
EFI_E820_ENTRY64 *E820Map;
UINT32 E820EntriesCount;
EFI_STATUS Status;
EFI_E820_ENTRY64 *Entry;
UINTN Index;
UINT64 LapicBase;
UINT64 LapicEnd;
EFI_E820_ENTRY64 *E820Map;
UINT32 E820EntriesCount;
EFI_STATUS Status;
EFI_E820_ENTRY64 *Entry;
UINTN Index;
UINT64 LapicBase;
UINT64 LapicEnd;
DEBUG ((DEBUG_INFO, "Using memory map provided by Xen\n"));
@@ -296,7 +307,7 @@ XenPublishRamRegions (
// Parse RAM in E820 map
//
E820EntriesCount = 0;
Status = XenGetE820Map (&E820Map, &E820EntriesCount);
Status = XenGetE820Map (&E820Map, &E820EntriesCount);
ASSERT_EFI_ERROR (Status);
AddMemoryBaseSizeHob (0, 0xA0000);
@@ -306,14 +317,14 @@ XenPublishRamRegions (
AddReservedMemoryBaseSizeHob (0xA0000, BASE_1MB - 0xA0000, TRUE);
LapicBase = PcdGet32 (PcdCpuLocalApicBaseAddress);
LapicEnd = LapicBase + SIZE_1MB;
LapicEnd = LapicBase + SIZE_1MB;
AddIoMemoryRangeHob (LapicBase, LapicEnd);
for (Index = 0; Index < E820EntriesCount; Index++) {
UINT64 Base;
UINT64 End;
UINT64 ReservedBase;
UINT64 ReservedEnd;
UINT64 Base;
UINT64 End;
UINT64 ReservedBase;
UINT64 ReservedEnd;
Entry = &E820Map[Index];
@@ -321,7 +332,7 @@ XenPublishRamRegions (
// Round up the start address, and round down the end address.
//
Base = ALIGN_VALUE (Entry->BaseAddr, (UINT64)EFI_PAGE_SIZE);
End = (Entry->BaseAddr + Entry->Length) & ~(UINT64)EFI_PAGE_MASK;
End = (Entry->BaseAddr + Entry->Length) & ~(UINT64)EFI_PAGE_MASK;
//
// Ignore the first 1MB, this is handled before the loop.
@@ -329,52 +340,53 @@ XenPublishRamRegions (
if (Base < BASE_1MB) {
Base = BASE_1MB;
}
if (Base >= End) {
continue;
}
switch (Entry->Type) {
case EfiAcpiAddressRangeMemory:
AddMemoryRangeHob (Base, End);
break;
case EfiAcpiAddressRangeACPI:
AddReservedMemoryRangeHob (Base, End, FALSE);
break;
case EfiAcpiAddressRangeReserved:
//
// hvmloader marks a range that overlaps with the local APIC memory
// mapped region as reserved, but CpuDxe wants it as mapped IO. We
// have already added it as mapped IO, so skip it here.
//
case EfiAcpiAddressRangeMemory:
AddMemoryRangeHob (Base, End);
break;
case EfiAcpiAddressRangeACPI:
AddReservedMemoryRangeHob (Base, End, FALSE);
break;
case EfiAcpiAddressRangeReserved:
//
// hvmloader marks a range that overlaps with the local APIC memory
// mapped region as reserved, but CpuDxe wants it as mapped IO. We
// have already added it as mapped IO, so skip it here.
//
//
// add LAPIC predecessor range, if any
//
ReservedBase = Base;
ReservedEnd = MIN (End, LapicBase);
if (ReservedBase < ReservedEnd) {
AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
}
//
// add LAPIC predecessor range, if any
//
ReservedBase = Base;
ReservedEnd = MIN (End, LapicBase);
if (ReservedBase < ReservedEnd) {
AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
}
//
// add LAPIC successor range, if any
//
ReservedBase = MAX (Base, LapicEnd);
ReservedEnd = End;
if (ReservedBase < ReservedEnd) {
AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
}
break;
default:
break;
//
// add LAPIC successor range, if any
//
ReservedBase = MAX (Base, LapicEnd);
ReservedEnd = End;
if (ReservedBase < ReservedEnd) {
AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
}
break;
default:
break;
}
}
}
EFI_STATUS
PhysicalAddressIdentityMapping (
IN EFI_PHYSICAL_ADDRESS AddressToMap
IN EFI_PHYSICAL_ADDRESS AddressToMap
)
{
INTN Index;
@@ -385,7 +397,7 @@ PhysicalAddressIdentityMapping (
// L4 / Top level Page Directory Pointers
L4 = (VOID*)(UINTN)PcdGet32 (PcdOvmfSecPageTablesBase);
L4 = (VOID *)(UINTN)PcdGet32 (PcdOvmfSecPageTablesBase);
Index = PML4_OFFSET (AddressToMap);
if (!L4[Index].Bits.Present) {
@@ -396,15 +408,15 @@ PhysicalAddressIdentityMapping (
ZeroMem (L3, EFI_PAGE_SIZE);
L4[Index].Bits.ReadWrite = 1;
L4[Index].Bits.Accessed = 1;
L4[Index].Bits.ReadWrite = 1;
L4[Index].Bits.Accessed = 1;
L4[Index].Bits.PageTableBaseAddress = (EFI_PHYSICAL_ADDRESS)L3 >> 12;
L4[Index].Bits.Present = 1;
L4[Index].Bits.Present = 1;
}
// L3 / Next level Page Directory Pointers
L3 = (VOID*)(EFI_PHYSICAL_ADDRESS)(L4[Index].Bits.PageTableBaseAddress << 12);
L3 = (VOID *)(EFI_PHYSICAL_ADDRESS)(L4[Index].Bits.PageTableBaseAddress << 12);
Index = PDP_OFFSET (AddressToMap);
if (!L3[Index].Bits.Present) {
@@ -415,24 +427,24 @@ PhysicalAddressIdentityMapping (
ZeroMem (PageTable, EFI_PAGE_SIZE);
L3[Index].Bits.ReadWrite = 1;
L3[Index].Bits.Accessed = 1;
L3[Index].Bits.ReadWrite = 1;
L3[Index].Bits.Accessed = 1;
L3[Index].Bits.PageTableBaseAddress = (EFI_PHYSICAL_ADDRESS)PageTable >> 12;
L3[Index].Bits.Present = 1;
L3[Index].Bits.Present = 1;
}
// L2 / Page Table Entries
PageTable = (VOID*)(EFI_PHYSICAL_ADDRESS)(L3[Index].Bits.PageTableBaseAddress << 12);
Index = PDE_OFFSET (AddressToMap);
PageTable = (VOID *)(EFI_PHYSICAL_ADDRESS)(L3[Index].Bits.PageTableBaseAddress << 12);
Index = PDE_OFFSET (AddressToMap);
if (!PageTable[Index].Bits.Present) {
PageTable[Index].Bits.ReadWrite = 1;
PageTable[Index].Bits.Accessed = 1;
PageTable[Index].Bits.Dirty = 1;
PageTable[Index].Bits.MustBe1 = 1;
PageTable[Index].Bits.ReadWrite = 1;
PageTable[Index].Bits.Accessed = 1;
PageTable[Index].Bits.Dirty = 1;
PageTable[Index].Bits.MustBe1 = 1;
PageTable[Index].Bits.PageTableBaseAddress = AddressToMap >> 21;
PageTable[Index].Bits.Present = 1;
PageTable[Index].Bits.Present = 1;
}
CpuFlushTlb ();
@@ -443,7 +455,7 @@ PhysicalAddressIdentityMapping (
STATIC
EFI_STATUS
MapSharedInfoPage (
IN VOID *PagePtr
IN VOID *PagePtr
)
{
xen_add_to_physmap_t Parameters;
@@ -451,81 +463,85 @@ MapSharedInfoPage (
Parameters.domid = DOMID_SELF;
Parameters.space = XENMAPSPACE_shared_info;
Parameters.idx = 0;
Parameters.gpfn = (UINTN)PagePtr >> EFI_PAGE_SHIFT;
ReturnCode = XenHypercallMemoryOp (XENMEM_add_to_physmap, &Parameters);
Parameters.idx = 0;
Parameters.gpfn = (UINTN)PagePtr >> EFI_PAGE_SHIFT;
ReturnCode = XenHypercallMemoryOp (XENMEM_add_to_physmap, &Parameters);
if (ReturnCode != 0) {
return EFI_NO_MAPPING;
}
return EFI_SUCCESS;
}
STATIC
VOID
UnmapXenPage (
IN VOID *PagePtr
IN VOID *PagePtr
)
{
xen_remove_from_physmap_t Parameters;
INTN ReturnCode;
xen_remove_from_physmap_t Parameters;
INTN ReturnCode;
Parameters.domid = DOMID_SELF;
Parameters.gpfn = (UINTN)PagePtr >> EFI_PAGE_SHIFT;
ReturnCode = XenHypercallMemoryOp (XENMEM_remove_from_physmap, &Parameters);
Parameters.gpfn = (UINTN)PagePtr >> EFI_PAGE_SHIFT;
ReturnCode = XenHypercallMemoryOp (XENMEM_remove_from_physmap, &Parameters);
ASSERT (ReturnCode == 0);
}
STATIC
UINT64
GetCpuFreq (
IN XEN_VCPU_TIME_INFO *VcpuTime
IN XEN_VCPU_TIME_INFO *VcpuTime
)
{
UINT32 Version;
UINT32 TscToSystemMultiplier;
INT8 TscShift;
UINT64 CpuFreq;
UINT32 Version;
UINT32 TscToSystemMultiplier;
INT8 TscShift;
UINT64 CpuFreq;
do {
Version = VcpuTime->Version;
MemoryFence ();
TscToSystemMultiplier = VcpuTime->TscToSystemMultiplier;
TscShift = VcpuTime->TscShift;
TscShift = VcpuTime->TscShift;
MemoryFence ();
} while (((Version & 1) != 0) && (Version != VcpuTime->Version));
CpuFreq = DivU64x32 (LShiftU64 (1000000000ULL, 32), TscToSystemMultiplier);
if (TscShift >= 0) {
CpuFreq = RShiftU64 (CpuFreq, TscShift);
CpuFreq = RShiftU64 (CpuFreq, TscShift);
} else {
CpuFreq = LShiftU64 (CpuFreq, -TscShift);
CpuFreq = LShiftU64 (CpuFreq, -TscShift);
}
return CpuFreq;
}
STATIC
VOID
XenDelay (
IN XEN_VCPU_TIME_INFO *VcpuTimeInfo,
IN UINT64 DelayNs
IN XEN_VCPU_TIME_INFO *VcpuTimeInfo,
IN UINT64 DelayNs
)
{
UINT64 Tick;
UINT64 CpuFreq;
UINT64 Delay;
UINT64 DelayTick;
UINT64 NewTick;
RETURN_STATUS Status;
UINT64 Tick;
UINT64 CpuFreq;
UINT64 Delay;
UINT64 DelayTick;
UINT64 NewTick;
RETURN_STATUS Status;
Tick = AsmReadTsc ();
CpuFreq = GetCpuFreq (VcpuTimeInfo);
Status = SafeUint64Mult (DelayNs, CpuFreq, &Delay);
Status = SafeUint64Mult (DelayNs, CpuFreq, &Delay);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"XenDelay (%lu ns): delay too big in relation to CPU freq %lu Hz\n",
DelayNs, CpuFreq));
DelayNs,
CpuFreq
));
ASSERT_EFI_ERROR (Status);
CpuDeadLoop ();
}
@@ -551,7 +567,6 @@ XenDelay (
}
}
/**
Calculate the frequency of the Local Apic Timer
**/
@@ -560,29 +575,33 @@ CalibrateLapicTimer (
VOID
)
{
XEN_SHARED_INFO *SharedInfo;
XEN_VCPU_TIME_INFO *VcpuTimeInfo;
UINT32 TimerTick, TimerTick2, DiffTimer;
UINT64 TscTick, TscTick2;
UINT64 Freq;
UINT64 Dividend;
EFI_STATUS Status;
XEN_SHARED_INFO *SharedInfo;
XEN_VCPU_TIME_INFO *VcpuTimeInfo;
UINT32 TimerTick, TimerTick2, DiffTimer;
UINT64 TscTick, TscTick2;
UINT64 Freq;
UINT64 Dividend;
EFI_STATUS Status;
SharedInfo = (VOID*)((UINTN)PcdGet32 (PcdCpuLocalApicBaseAddress) + SIZE_1MB);
Status = PhysicalAddressIdentityMapping ((EFI_PHYSICAL_ADDRESS)SharedInfo);
SharedInfo = (VOID *)((UINTN)PcdGet32 (PcdCpuLocalApicBaseAddress) + SIZE_1MB);
Status = PhysicalAddressIdentityMapping ((EFI_PHYSICAL_ADDRESS)SharedInfo);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"Failed to add page table entry for Xen shared info page: %r\n",
Status));
Status
));
ASSERT_EFI_ERROR (Status);
return;
}
Status = MapSharedInfoPage (SharedInfo);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failed to map Xen's shared info page: %r\n",
Status));
DEBUG ((
DEBUG_ERROR,
"Failed to map Xen's shared info page: %r\n",
Status
));
ASSERT_EFI_ERROR (Status);
return;
}
@@ -593,18 +612,21 @@ CalibrateLapicTimer (
DisableApicTimerInterrupt ();
TimerTick = GetApicTimerCurrentCount ();
TscTick = AsmReadTsc ();
TscTick = AsmReadTsc ();
XenDelay (VcpuTimeInfo, 1000000ULL);
TimerTick2 = GetApicTimerCurrentCount ();
TscTick2 = AsmReadTsc ();
TscTick2 = AsmReadTsc ();
DiffTimer = TimerTick - TimerTick2;
Status = SafeUint64Mult (GetCpuFreq (VcpuTimeInfo), DiffTimer, &Dividend);
Status = SafeUint64Mult (GetCpuFreq (VcpuTimeInfo), DiffTimer, &Dividend);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "overflow while calculating APIC frequency\n"));
DEBUG ((DEBUG_ERROR, "CPU freq: %lu Hz; APIC timer tick count for 1 ms: %u\n",
GetCpuFreq (VcpuTimeInfo), DiffTimer));
DEBUG ((
DEBUG_ERROR,
"CPU freq: %lu Hz; APIC timer tick count for 1 ms: %u\n",
GetCpuFreq (VcpuTimeInfo),
DiffTimer
));
ASSERT_EFI_ERROR (Status);
CpuDeadLoop ();
}

16
OvmfPkg/XenPlatformPei/Xen.h
View File

@@ -13,26 +13,26 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PiPei.h>
// Physical address of OVMF info
#define OVMF_INFO_PHYSICAL_ADDRESS 0x00001000
#define OVMF_INFO_PHYSICAL_ADDRESS 0x00001000
// This structure must match the definition on Xen side
#pragma pack(1)
typedef struct {
CHAR8 Signature[14]; // XenHVMOVMF\0
UINT8 Length; // Length of this structure
UINT8 Checksum; // Set such that the sum over bytes 0..length == 0
CHAR8 Signature[14]; // XenHVMOVMF\0
UINT8 Length; // Length of this structure
UINT8 Checksum; // Set such that the sum over bytes 0..length == 0
//
// Physical address of an array of TablesCount elements.
//
// Each element contains the physical address of a BIOS table.
//
EFI_PHYSICAL_ADDRESS Tables;
UINT32 TablesCount;
EFI_PHYSICAL_ADDRESS Tables;
UINT32 TablesCount;
//
// Physical address of the E820 table, contains E820EntriesCount entries.
//
EFI_PHYSICAL_ADDRESS E820;
UINT32 E820EntriesCount;
EFI_PHYSICAL_ADDRESS E820;
UINT32 E820EntriesCount;
} EFI_XEN_OVMF_INFO;
#pragma pack()