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OvmfPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:09 -08:00
committed by mergify[bot]
parent d1050b9dff
commit ac0a286f4d
445 changed files with 30894 additions and 26369 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
OvmfPkg/8254TimerDxe/Timer.c
View File

@ -11,12 +11,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// The handle onto which the Timer Architectural Protocol will be installed
//
EFI_HANDLE mTimerHandle = NULL;
EFI_HANDLE mTimerHandle = NULL;
//
// The Timer Architectural Protocol that this driver produces
//
EFI_TIMER_ARCH_PROTOCOL mTimer = {
EFI_TIMER_ARCH_PROTOCOL mTimer = {
TimerDriverRegisterHandler,
TimerDriverSetTimerPeriod,
TimerDriverGetTimerPeriod,
@ -26,7 +26,7 @@ EFI_TIMER_ARCH_PROTOCOL mTimer = {
//
// Pointer to the CPU Architectural Protocol instance
//
EFI_CPU_ARCH_PROTOCOL *mCpu;
EFI_CPU_ARCH_PROTOCOL *mCpu;
//
// Pointer to the Legacy 8259 Protocol instance
@ -37,16 +37,17 @@ EFI_LEGACY_8259_PROTOCOL *mLegacy8259;
// The notification function to call on every timer interrupt.
// A bug in the compiler prevents us from initializing this here.
//
EFI_TIMER_NOTIFY mTimerNotifyFunction;
EFI_TIMER_NOTIFY mTimerNotifyFunction;
//
// The current period of the timer interrupt
//
volatile UINT64 mTimerPeriod = 0;
volatile UINT64 mTimerPeriod = 0;
//
// Worker Functions
//
/**
Sets the counter value for Timer #0 in a legacy 8254 timer.
@ -71,11 +72,11 @@ SetPitCount (
VOID
EFIAPI
TimerInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
EFI_TPL OriginalTPL;
EFI_TPL OriginalTPL;
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
@ -133,11 +134,11 @@ TimerDriverRegisterHandler (
//
// Check for invalid parameters
//
if (NotifyFunction == NULL && mTimerNotifyFunction == NULL) {
if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (NotifyFunction != NULL && mTimerNotifyFunction != NULL) {
if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
return EFI_ALREADY_STARTED;
}
@ -203,29 +204,30 @@ TimerDriverSetTimerPeriod (
//
mLegacy8259->DisableIrq (mLegacy8259, Efi8259Irq0);
} else {
//
// Convert TimerPeriod into 8254 counts
//
TimerCount = DivU64x32 (MultU64x32 (119318, (UINT32) TimerPeriod) + 500000, 1000000);
TimerCount = DivU64x32 (MultU64x32 (119318, (UINT32)TimerPeriod) + 500000, 1000000);
//
// Check for overflow
//
if (TimerCount >= 65536) {
TimerCount = 0;
TimerCount = 0;
TimerPeriod = MAX_TIMER_TICK_DURATION;
}
//
// Program the 8254 timer with the new count value
//
SetPitCount ((UINT16) TimerCount);
SetPitCount ((UINT16)TimerCount);
//
// Enable timer interrupt
//
mLegacy8259->EnableIrq (mLegacy8259, Efi8259Irq0, FALSE);
}
//
// Save the new timer period
//
@ -253,8 +255,8 @@ TimerDriverSetTimerPeriod (
EFI_STATUS
EFIAPI
TimerDriverGetTimerPeriod (
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
if (TimerPeriod == NULL) {
@ -353,13 +355,13 @@ TimerDriverInitialize (
//
// Find the CPU architectural protocol.
//
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &mCpu);
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
ASSERT_EFI_ERROR (Status);
//
// Find the Legacy8259 protocol.
//
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &mLegacy8259);
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **)&mLegacy8259);
ASSERT_EFI_ERROR (Status);
//
@ -372,7 +374,7 @@ TimerDriverInitialize (
// Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
//
TimerVector = 0;
Status = mLegacy8259->GetVector (mLegacy8259, Efi8259Irq0, (UINT8 *) &TimerVector);
Status = mLegacy8259->GetVector (mLegacy8259, Efi8259Irq0, (UINT8 *)&TimerVector);
ASSERT_EFI_ERROR (Status);
//
@ -392,11 +394,11 @@ TimerDriverInitialize (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mTimerHandle,
&gEfiTimerArchProtocolGuid, &mTimer,
&gEfiTimerArchProtocolGuid,
&mTimer,
NULL
);
ASSERT_EFI_ERROR (Status);
return Status;
}

13
OvmfPkg/8254TimerDxe/Timer.h
View File

@ -32,17 +32,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// The maximum tick duration for 8254 timer
//
#define MAX_TIMER_TICK_DURATION 549254
#define MAX_TIMER_TICK_DURATION 549254
//
// The default timer tick duration is set to 10 ms = 100000 100 ns units
//
#define DEFAULT_TIMER_TICK_DURATION 100000
#define TIMER_CONTROL_PORT 0x43
#define TIMER0_COUNT_PORT 0x40
#define DEFAULT_TIMER_TICK_DURATION 100000
#define TIMER_CONTROL_PORT 0x43
#define TIMER0_COUNT_PORT 0x40
//
// Function Prototypes
//
/**
Initialize the Timer Architectural Protocol driver
@ -153,8 +154,8 @@ TimerDriverSetTimerPeriod (
EFI_STATUS
EFIAPI
TimerDriverGetTimerPeriod (
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
;

58
OvmfPkg/8259InterruptControllerDxe/8259.c
View File

@ -26,15 +26,15 @@ EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {
//
// Global for the handle that the Legacy 8259 Protocol is installed
//
EFI_HANDLE m8259Handle = NULL;
EFI_HANDLE m8259Handle = NULL;
UINT8 mMasterBase = 0xff;
UINT8 mSlaveBase = 0xff;
EFI_8259_MODE mMode = Efi8259ProtectedMode;
UINT16 mProtectedModeMask = 0xffff;
UINT16 mLegacyModeMask;
UINT16 mProtectedModeEdgeLevel = 0x0000;
UINT16 mLegacyModeEdgeLevel;
UINT8 mMasterBase = 0xff;
UINT8 mSlaveBase = 0xff;
EFI_8259_MODE mMode = Efi8259ProtectedMode;
UINT16 mProtectedModeMask = 0xffff;
UINT16 mLegacyModeMask;
UINT16 mProtectedModeEdgeLevel = 0x0000;
UINT16 mLegacyModeEdgeLevel;
//
// Worker Functions
@ -55,10 +55,10 @@ Interrupt8259WriteMask (
IN UINT16 EdgeLevel
)
{
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8) Mask);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8) (Mask >> 8));
IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8) EdgeLevel);
IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8) (EdgeLevel >> 8));
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8)Mask);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8)(Mask >> 8));
IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8)EdgeLevel);
IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8)(EdgeLevel >> 8));
}
/**
@ -83,14 +83,14 @@ Interrupt8259ReadMask (
MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
SlaveValue = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
*Mask = (UINT16) (MasterValue | (SlaveValue << 8));
*Mask = (UINT16)(MasterValue | (SlaveValue << 8));
}
if (EdgeLevel != NULL) {
MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
SlaveValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
*EdgeLevel = (UINT16) (MasterValue | (SlaveValue << 8));
*EdgeLevel = (UINT16)(MasterValue | (SlaveValue << 8));
}
}
@ -117,8 +117,8 @@ Interrupt8259SetVectorBase (
IN UINT8 SlaveBase
)
{
UINT8 Mask;
EFI_TPL OriginalTpl;
UINT8 Mask;
EFI_TPL OriginalTpl;
OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
//
@ -416,9 +416,9 @@ Interrupt8259GetVector (
}
if (Irq <= Efi8259Irq7) {
*Vector = (UINT8) (mMasterBase + Irq);
*Vector = (UINT8)(mMasterBase + Irq);
} else {
*Vector = (UINT8) (mSlaveBase + (Irq - Efi8259Irq8));
*Vector = (UINT8)(mSlaveBase + (Irq - Efi8259Irq8));
}
return EFI_SUCCESS;
@ -447,11 +447,11 @@ Interrupt8259EnableIrq (
return EFI_INVALID_PARAMETER;
}
mProtectedModeMask = (UINT16) (mProtectedModeMask & ~(1 << Irq));
mProtectedModeMask = (UINT16)(mProtectedModeMask & ~(1 << Irq));
if (LevelTriggered) {
mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel | (1 << Irq));
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel | (1 << Irq));
} else {
mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
}
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
@ -480,9 +480,9 @@ Interrupt8259DisableIrq (
return EFI_INVALID_PARAMETER;
}
mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));
mProtectedModeMask = (UINT16)(mProtectedModeMask | (1 << Irq));
mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
@ -507,14 +507,14 @@ Interrupt8259GetInterruptLine (
OUT UINT8 *Vector
)
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT8 InterruptLine;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT8 InterruptLine;
EFI_STATUS Status;
Status = gBS->HandleProtocol (
PciHandle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
return EFI_INVALID_PARAMETER;
@ -583,8 +583,8 @@ Install8259 (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_8259_IRQ Irq;
EFI_STATUS Status;
EFI_8259_IRQ Irq;
//
// Initialze mask values from PCDs

10
OvmfPkg/8259InterruptControllerDxe/8259.h
View File

@ -22,11 +22,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// 8259 Hardware definitions
#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20
#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
@ -35,7 +35,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0
#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1
#define LEGACY_8259_EOI 0x20
#define LEGACY_8259_EOI 0x20
// Protocol Function Prototypes

35
OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h
View File

@ -13,8 +13,8 @@
#include <Protocol/PciIo.h> // EFI_PCI_IO_PROTOCOL
typedef struct {
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
} ORIGINAL_ATTRIBUTES;
typedef struct S3_CONTEXT S3_CONTEXT;
@ -22,51 +22,50 @@ typedef struct S3_CONTEXT S3_CONTEXT;
EFI_STATUS
EFIAPI
InstallQemuFwCfgTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
);
EFI_STATUS
EFIAPI
InstallAcpiTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
);
VOID
EnablePciDecoding (
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
);
VOID
RestorePciDecoding (
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
);
EFI_STATUS
AllocateS3Context (
OUT S3_CONTEXT **S3Context,
IN UINTN WritePointerCount
OUT S3_CONTEXT **S3Context,
IN UINTN WritePointerCount
);
VOID
ReleaseS3Context (
IN S3_CONTEXT *S3Context
IN S3_CONTEXT *S3Context
);
EFI_STATUS
SaveCondensedWritePointerToS3Context (
IN OUT S3_CONTEXT *S3Context,
IN UINT16 PointerItem,
IN UINT8 PointerSize,
IN UINT32 PointerOffset,
IN UINT64 PointerValue
IN OUT S3_CONTEXT *S3Context,
IN UINT16 PointerItem,
IN UINT8 PointerSize,
IN UINT32 PointerOffset,
IN UINT64 PointerValue
);
EFI_STATUS
TransferS3ContextToBootScript (
IN S3_CONTEXT *S3Context
IN S3_CONTEXT *S3Context
);
#endif

115
OvmfPkg/AcpiPlatformDxe/BootScript.c
View File

@ -14,20 +14,18 @@
#include "AcpiPlatform.h"
//
// Condensed structure for capturing the fw_cfg operations -- select, skip,
// write -- inherent in executing a QEMU_LOADER_WRITE_POINTER command.
//
typedef struct {
UINT16 PointerItem; // resolved from QEMU_LOADER_WRITE_POINTER.PointerFile
UINT8 PointerSize; // copied as-is from QEMU_LOADER_WRITE_POINTER
UINT32 PointerOffset; // copied as-is from QEMU_LOADER_WRITE_POINTER
UINT64 PointerValue; // resolved from QEMU_LOADER_WRITE_POINTER.PointeeFile
// and QEMU_LOADER_WRITE_POINTER.PointeeOffset
UINT16 PointerItem; // resolved from QEMU_LOADER_WRITE_POINTER.PointerFile
UINT8 PointerSize; // copied as-is from QEMU_LOADER_WRITE_POINTER
UINT32 PointerOffset; // copied as-is from QEMU_LOADER_WRITE_POINTER
UINT64 PointerValue; // resolved from QEMU_LOADER_WRITE_POINTER.PointeeFile
// and QEMU_LOADER_WRITE_POINTER.PointeeOffset
} CONDENSED_WRITE_POINTER;
//
// Context structure to accumulate CONDENSED_WRITE_POINTER objects from
// QEMU_LOADER_WRITE_POINTER commands.
@ -36,27 +34,25 @@ typedef struct {
// context structure is released, all pointed-to objects must be released too.
//
struct S3_CONTEXT {
CONDENSED_WRITE_POINTER *WritePointers; // one array element per processed
// QEMU_LOADER_WRITE_POINTER
// command
UINTN Allocated; // number of elements allocated for
// WritePointers
UINTN Used; // number of elements populated in
// WritePointers
CONDENSED_WRITE_POINTER *WritePointers; // one array element per processed
// QEMU_LOADER_WRITE_POINTER
// command
UINTN Allocated; // number of elements allocated for
// WritePointers
UINTN Used; // number of elements populated in
// WritePointers
};
//
// Scratch buffer, allocated in EfiReservedMemoryType type memory, for the ACPI
// S3 Boot Script opcodes to work on.
//
#pragma pack (1)
typedef union {
UINT64 PointerValue; // filled in from CONDENSED_WRITE_POINTER.PointerValue
UINT64 PointerValue; // filled in from CONDENSED_WRITE_POINTER.PointerValue
} SCRATCH_BUFFER;
#pragma pack ()
/**
Allocate an S3_CONTEXT object.
@ -75,12 +71,12 @@ typedef union {
**/
EFI_STATUS
AllocateS3Context (
OUT S3_CONTEXT **S3Context,
IN UINTN WritePointerCount
OUT S3_CONTEXT **S3Context,
IN UINTN WritePointerCount
)
{
EFI_STATUS Status;
S3_CONTEXT *Context;
EFI_STATUS Status;
S3_CONTEXT *Context;
if (WritePointerCount == 0) {
return EFI_INVALID_PARAMETER;
@ -91,15 +87,17 @@ AllocateS3Context (
return EFI_OUT_OF_RESOURCES;
}
Context->WritePointers = AllocatePool (WritePointerCount *
sizeof *Context->WritePointers);
Context->WritePointers = AllocatePool (
WritePointerCount *
sizeof *Context->WritePointers
);
if (Context->WritePointers == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto FreeContext;
}
Context->Allocated = WritePointerCount;
*S3Context = Context;
*S3Context = Context;
return EFI_SUCCESS;
FreeContext:
@ -108,7 +106,6 @@ FreeContext:
return Status;
}
/**
Release an S3_CONTEXT object.
@ -116,14 +113,13 @@ FreeContext:
**/
VOID
ReleaseS3Context (
IN S3_CONTEXT *S3Context
IN S3_CONTEXT *S3Context
)
{
FreePool (S3Context->WritePointers);
FreePool (S3Context);
}
/**
Save the information necessary to replicate a QEMU_LOADER_WRITE_POINTER
command during S3 resume, in condensed format.
@ -158,31 +154,38 @@ ReleaseS3Context (
**/
EFI_STATUS
SaveCondensedWritePointerToS3Context (
IN OUT S3_CONTEXT *S3Context,
IN UINT16 PointerItem,
IN UINT8 PointerSize,
IN UINT32 PointerOffset,
IN UINT64 PointerValue
IN OUT S3_CONTEXT *S3Context,
IN UINT16 PointerItem,
IN UINT8 PointerSize,
IN UINT32 PointerOffset,
IN UINT64 PointerValue
)
{
CONDENSED_WRITE_POINTER *Condensed;
CONDENSED_WRITE_POINTER *Condensed;
if (S3Context->Used == S3Context->Allocated) {
return EFI_OUT_OF_RESOURCES;
}
Condensed = S3Context->WritePointers + S3Context->Used;
Condensed = S3Context->WritePointers + S3Context->Used;
Condensed->PointerItem = PointerItem;
Condensed->PointerSize = PointerSize;
Condensed->PointerOffset = PointerOffset;
Condensed->PointerValue = PointerValue;
DEBUG ((DEBUG_VERBOSE, "%a: 0x%04x/[0x%08x+%d] := 0x%Lx (%Lu)\n",
__FUNCTION__, PointerItem, PointerOffset, PointerSize, PointerValue,
(UINT64)S3Context->Used));
DEBUG ((
DEBUG_VERBOSE,
"%a: 0x%04x/[0x%08x+%d] := 0x%Lx (%Lu)\n",
__FUNCTION__,
PointerItem,
PointerOffset,
PointerSize,
PointerValue,
(UINT64)S3Context->Used
));
++S3Context->Used;
return EFI_SUCCESS;
}
/**
FW_CFG_BOOT_SCRIPT_CALLBACK_FUNCTION provided to QemuFwCfgS3Lib.
**/
@ -190,31 +193,33 @@ STATIC
VOID
EFIAPI
AppendFwCfgBootScript (
IN OUT VOID *Context OPTIONAL,
IN OUT VOID *ExternalScratchBuffer
IN OUT VOID *Context OPTIONAL,
IN OUT VOID *ExternalScratchBuffer
)
{
S3_CONTEXT *S3Context;
SCRATCH_BUFFER *ScratchBuffer;
UINTN Index;
S3_CONTEXT *S3Context;
SCRATCH_BUFFER *ScratchBuffer;
UINTN Index;
S3Context = Context;
S3Context = Context;
ScratchBuffer = ExternalScratchBuffer;
for (Index = 0; Index < S3Context->Used; ++Index) {
CONST CONDENSED_WRITE_POINTER *Condensed;
RETURN_STATUS Status;
CONST CONDENSED_WRITE_POINTER *Condensed;
RETURN_STATUS Status;
Condensed = &S3Context->WritePointers[Index];
Status = QemuFwCfgS3ScriptSkipBytes (Condensed->PointerItem,
Condensed->PointerOffset);
Status = QemuFwCfgS3ScriptSkipBytes (
Condensed->PointerItem,
Condensed->PointerOffset
);
if (RETURN_ERROR (Status)) {
goto FatalError;
}
ScratchBuffer->PointerValue = Condensed->PointerValue;
Status = QemuFwCfgS3ScriptWriteBytes (-1, Condensed->PointerSize);
Status = QemuFwCfgS3ScriptWriteBytes (-1, Condensed->PointerSize);
if (RETURN_ERROR (Status)) {
goto FatalError;
}
@ -230,7 +235,6 @@ FatalError:
CpuDeadLoop ();
}
/**
Translate and append the information from an S3_CONTEXT object to the ACPI S3
Boot Script.
@ -253,17 +257,20 @@ FatalError:
**/
EFI_STATUS
TransferS3ContextToBootScript (
IN S3_CONTEXT *S3Context
IN S3_CONTEXT *S3Context
)
{
RETURN_STATUS Status;
RETURN_STATUS Status;
if (S3Context->Used == 0) {
ReleaseS3Context (S3Context);
return EFI_SUCCESS;
}
Status = QemuFwCfgS3CallWhenBootScriptReady (AppendFwCfgBootScript,
S3Context, sizeof (SCRATCH_BUFFER));
Status = QemuFwCfgS3CallWhenBootScriptReady (
AppendFwCfgBootScript,
S3Context,
sizeof (SCRATCH_BUFFER)
);
return (EFI_STATUS)Status;
}

54
OvmfPkg/AcpiPlatformDxe/EntryPoint.c
View File

@ -21,49 +21,50 @@ FindAcpiTableProtocol (
VOID
)
{
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
Status = gBS->LocateProtocol (
&gEfiAcpiTableProtocolGuid,
NULL,
(VOID**)&AcpiTable
(VOID **)&AcpiTable
);
ASSERT_EFI_ERROR (Status);
return AcpiTable;
}
STATIC
VOID
EFIAPI
OnRootBridgesConnected (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: root bridges have been connected, installing ACPI tables\n",
__FUNCTION__));
__FUNCTION__
));
Status = InstallAcpiTables (FindAcpiTableProtocol ());
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: InstallAcpiTables: %r\n", __FUNCTION__, Status));
}
gBS->CloseEvent (Event);
}
EFI_STATUS
EFIAPI
AcpiPlatformEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT RootBridgesConnected;
EFI_STATUS Status;
EFI_EVENT RootBridgesConnected;
//
// If the platform doesn't support PCI, or PCI enumeration has been disabled,
@ -71,8 +72,12 @@ AcpiPlatformEntryPoint (
// the full functionality.
//
if (PcdGetBool (PcdPciDisableBusEnumeration)) {
DEBUG ((DEBUG_INFO, "%a: PCI or its enumeration disabled, installing "
"ACPI tables\n", __FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: PCI or its enumeration disabled, installing "
"ACPI tables\n",
__FUNCTION__
));
return InstallAcpiTables (FindAcpiTableProtocol ());
}
@ -82,13 +87,20 @@ AcpiPlatformEntryPoint (
// setup. (Note that we're a DXE_DRIVER; our entry point function is invoked
// strictly before BDS is entered and can connect the root bridges.)
//
Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
OnRootBridgesConnected, NULL /* Context */,
&gRootBridgesConnectedEventGroupGuid, &RootBridgesConnected);
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
OnRootBridgesConnected,
NULL /* Context */,
&gRootBridgesConnectedEventGroupGuid,
&RootBridgesConnected
);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: waiting for root bridges to be connected, registered callback\n",
__FUNCTION__));
__FUNCTION__
));
}
return Status;

110
OvmfPkg/AcpiPlatformDxe/PciDecoding.c
View File

@ -13,7 +13,6 @@
#include "AcpiPlatform.h"
/**
Collect all PciIo protocol instances in the system. Save their original
attributes, and enable IO and MMIO decoding for each.
@ -40,15 +39,15 @@
**/
VOID
EnablePciDecoding (
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
)
{
EFI_STATUS Status;
UINTN NoHandles;
EFI_HANDLE *Handles;
ORIGINAL_ATTRIBUTES *OrigAttrs;
UINTN Idx;
EFI_STATUS Status;
UINTN NoHandles;
EFI_HANDLE *Handles;
ORIGINAL_ATTRIBUTES *OrigAttrs;
UINTN Idx;
*OriginalAttributes = NULL;
*Count = 0;
@ -61,8 +60,13 @@ EnablePciDecoding (
return;
}
Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiPciIoProtocolGuid,
NULL /* SearchKey */, &NoHandles, &Handles);
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL /* SearchKey */,
&NoHandles,
&Handles
);
if (Status == EFI_NOT_FOUND) {
//
// No PCI devices were found on either of the root bridges. We're done.
@ -71,49 +75,75 @@ EnablePciDecoding (
}
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: LocateHandleBuffer(): %r\n", __FUNCTION__,
Status));
DEBUG ((
DEBUG_WARN,
"%a: LocateHandleBuffer(): %r\n",
__FUNCTION__,
Status
));
return;
}
OrigAttrs = AllocatePool (NoHandles * sizeof *OrigAttrs);
if (OrigAttrs == NULL) {
DEBUG ((DEBUG_WARN, "%a: AllocatePool(): out of resources\n",
__FUNCTION__));
DEBUG ((
DEBUG_WARN,
"%a: AllocatePool(): out of resources\n",
__FUNCTION__
));
goto FreeHandles;
}
for (Idx = 0; Idx < NoHandles; ++Idx) {
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Attributes;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Attributes;
//
// Look up PciIo on the handle and stash it
//
Status = gBS->HandleProtocol (Handles[Idx], &gEfiPciIoProtocolGuid,
(VOID**)&PciIo);
Status = gBS->HandleProtocol (
Handles[Idx],
&gEfiPciIoProtocolGuid,
(VOID **)&PciIo
);
ASSERT_EFI_ERROR (Status);
OrigAttrs[Idx].PciIo = PciIo;
//
// Stash the current attributes
//
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationGet, 0,
&OrigAttrs[Idx].PciAttributes);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationGet,
0,
&OrigAttrs[Idx].PciAttributes
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationGet: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationGet: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
//
// Retrieve supported attributes
//
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationSupported, 0,
&Attributes);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationSupported,
0,
&Attributes
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationSupported: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationSupported: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
@ -121,11 +151,19 @@ EnablePciDecoding (
// Enable IO and MMIO decoding
//
Attributes &= EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY;
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationEnable,
Attributes, NULL);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationEnable,
Attributes,
NULL
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationEnable: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationEnable: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
}
@ -141,19 +179,20 @@ EnablePciDecoding (
RestoreAttributes:
while (Idx > 0) {
--Idx;
OrigAttrs[Idx].PciIo->Attributes (OrigAttrs[Idx].PciIo,
OrigAttrs[Idx].PciIo->Attributes (
OrigAttrs[Idx].PciIo,
EfiPciIoAttributeOperationSet,
OrigAttrs[Idx].PciAttributes,
NULL
);
}
FreePool (OrigAttrs);
FreeHandles:
FreePool (Handles);
}
/**
Restore the original PCI attributes saved with EnablePciDecoding().
@ -171,11 +210,11 @@ FreeHandles:
**/
VOID
RestorePciDecoding (
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
)
{
UINTN Idx;
UINTN Idx;
ASSERT ((OriginalAttributes == NULL) == (Count == 0));
if (OriginalAttributes == NULL) {
@ -190,5 +229,6 @@ RestorePciDecoding (
NULL
);
}
FreePool (OriginalAttributes);
}

709
OvmfPkg/AcpiPlatformDxe/QemuFwCfgAcpi.c
View File

File diff suppressed because it is too large Load Diff

4
OvmfPkg/AcpiPlatformDxe/QemuFwCfgAcpiPlatform.c
View File

@ -23,10 +23,10 @@
EFI_STATUS
EFIAPI
InstallAcpiTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = InstallQemuFwCfgTables (AcpiTable);
return Status;

122
OvmfPkg/AmdSev/BlobVerifierLibSevHashes/BlobVerifierSevHashes.c
View File

@ -42,25 +42,25 @@
#define SEV_CMDLINE_HASH_GUID \
(GUID) { 0x97d02dd8, 0xbd20, 0x4c94, { 0xaa, 0x78, 0xe7, 0x71, 0x4d, 0x36, 0xab, 0x2a } }
STATIC CONST EFI_GUID mSevKernelHashGuid = SEV_KERNEL_HASH_GUID;
STATIC CONST EFI_GUID mSevInitrdHashGuid = SEV_INITRD_HASH_GUID;
STATIC CONST EFI_GUID mSevCmdlineHashGuid = SEV_CMDLINE_HASH_GUID;
STATIC CONST EFI_GUID mSevKernelHashGuid = SEV_KERNEL_HASH_GUID;
STATIC CONST EFI_GUID mSevInitrdHashGuid = SEV_INITRD_HASH_GUID;
STATIC CONST EFI_GUID mSevCmdlineHashGuid = SEV_CMDLINE_HASH_GUID;
#pragma pack (1)
typedef struct {
GUID Guid;
UINT16 Len;
UINT8 Data[];
GUID Guid;
UINT16 Len;
UINT8 Data[];
} HASH_TABLE;
#pragma pack ()
STATIC HASH_TABLE *mHashesTable;
STATIC UINT16 mHashesTableSize;
STATIC HASH_TABLE *mHashesTable;
STATIC UINT16 mHashesTableSize;
STATIC
CONST GUID*
CONST GUID *
FindBlobEntryGuid (
IN CONST CHAR16 *BlobName
IN CONST CHAR16 *BlobName
)
{
if (StrCmp (BlobName, L"kernel") == 0) {
@ -88,26 +88,32 @@ FindBlobEntryGuid (
EFI_STATUS
EFIAPI
VerifyBlob (
IN CONST CHAR16 *BlobName,
IN CONST VOID *Buf,
IN UINT32 BufSize
IN CONST CHAR16 *BlobName,
IN CONST VOID *Buf,
IN UINT32 BufSize
)
{
CONST GUID *Guid;
INT32 Remaining;
HASH_TABLE *Entry;
CONST GUID *Guid;
INT32 Remaining;
HASH_TABLE *Entry;
if (mHashesTable == NULL || mHashesTableSize == 0) {
DEBUG ((DEBUG_ERROR,
if ((mHashesTable == NULL) || (mHashesTableSize == 0)) {
DEBUG ((
DEBUG_ERROR,
"%a: Verifier called but no hashes table discoverd in MEMFD\n",
__FUNCTION__));
__FUNCTION__
));
return EFI_ACCESS_DENIED;
}
Guid = FindBlobEntryGuid (BlobName);
if (Guid == NULL) {
DEBUG ((DEBUG_ERROR, "%a: Unknown blob name \"%s\"\n", __FUNCTION__,
BlobName));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown blob name \"%s\"\n",
__FUNCTION__,
BlobName
));
return EFI_ACCESS_DENIED;
}
@ -118,10 +124,11 @@ VerifyBlob (
for (Entry = mHashesTable, Remaining = mHashesTableSize;
Remaining >= sizeof *Entry && Remaining >= Entry->Len;
Remaining -= Entry->Len,
Entry = (HASH_TABLE *)((UINT8 *)Entry + Entry->Len)) {
UINTN EntrySize;
EFI_STATUS Status;
UINT8 Hash[SHA256_DIGEST_SIZE];
Entry = (HASH_TABLE *)((UINT8 *)Entry + Entry->Len))
{
UINTN EntrySize;
EFI_STATUS Status;
UINT8 Hash[SHA256_DIGEST_SIZE];
if (!CompareGuid (&Entry->Guid, Guid)) {
continue;
@ -131,8 +138,13 @@ VerifyBlob (
EntrySize = Entry->Len - sizeof Entry->Guid - sizeof Entry->Len;
if (EntrySize != SHA256_DIGEST_SIZE) {
DEBUG ((DEBUG_ERROR, "%a: Hash has the wrong size %d != %d\n",
__FUNCTION__, EntrySize, SHA256_DIGEST_SIZE));
DEBUG ((
DEBUG_ERROR,
"%a: Hash has the wrong size %d != %d\n",
__FUNCTION__,
EntrySize,
SHA256_DIGEST_SIZE
));
return EFI_ACCESS_DENIED;
}
@ -144,18 +156,31 @@ VerifyBlob (
if (CompareMem (Entry->Data, Hash, EntrySize) == 0) {
Status = EFI_SUCCESS;
DEBUG ((DEBUG_INFO, "%a: Hash comparison succeeded for \"%s\"\n",
__FUNCTION__, BlobName));
DEBUG ((
DEBUG_INFO,
"%a: Hash comparison succeeded for \"%s\"\n",
__FUNCTION__,
BlobName
));
} else {
Status = EFI_ACCESS_DENIED;
DEBUG ((DEBUG_ERROR, "%a: Hash comparison failed for \"%s\"\n",
__FUNCTION__, BlobName));
DEBUG ((
DEBUG_ERROR,
"%a: Hash comparison failed for \"%s\"\n",
__FUNCTION__,
BlobName
));
}
return Status;
}
DEBUG ((DEBUG_ERROR, "%a: Hash GUID %g not found in table\n", __FUNCTION__,
Guid));
DEBUG ((
DEBUG_ERROR,
"%a: Hash GUID %g not found in table\n",
__FUNCTION__,
Guid
));
return EFI_ACCESS_DENIED;
}
@ -174,29 +199,38 @@ BlobVerifierLibSevHashesConstructor (
VOID
)
{
HASH_TABLE *Ptr;
UINT32 Size;
HASH_TABLE *Ptr;
UINT32 Size;
mHashesTable = NULL;
mHashesTable = NULL;
mHashesTableSize = 0;
Ptr = (void *)(UINTN)FixedPcdGet64 (PcdQemuHashTableBase);
Ptr = (void *)(UINTN)FixedPcdGet64 (PcdQemuHashTableBase);
Size = FixedPcdGet32 (PcdQemuHashTableSize);
if (Ptr == NULL || Size < sizeof *Ptr ||
if ((Ptr == NULL) || (Size < sizeof *Ptr) ||
!CompareGuid (&Ptr->Guid, &SEV_HASH_TABLE_GUID) ||
Ptr->Len < sizeof *Ptr || Ptr->Len > Size) {
(Ptr->Len < sizeof *Ptr) || (Ptr->Len > Size))
{
return RETURN_SUCCESS;
}
DEBUG ((DEBUG_INFO, "%a: Found injected hashes table in secure location\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: Found injected hashes table in secure location\n",
__FUNCTION__
));
mHashesTable = (HASH_TABLE *)Ptr->Data;
mHashesTable = (HASH_TABLE *)Ptr->Data;
mHashesTableSize = Ptr->Len - sizeof Ptr->Guid - sizeof Ptr->Len;
DEBUG ((DEBUG_VERBOSE, "%a: mHashesTable=0x%p, Size=%u\n", __FUNCTION__,
mHashesTable, mHashesTableSize));
DEBUG ((
DEBUG_VERBOSE,
"%a: mHashesTable=0x%p, Size=%u\n",
__FUNCTION__,
mHashesTable,
mHashesTableSize
));
return RETURN_SUCCESS;
}

8
OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
View File

@ -8,16 +8,16 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Guid/ConfidentialComputingSecret.h>
STATIC CONFIDENTIAL_COMPUTING_SECRET_LOCATION mSecretDxeTable = {
STATIC CONFIDENTIAL_COMPUTING_SECRET_LOCATION mSecretDxeTable = {
FixedPcdGet32 (PcdSevLaunchSecretBase),
FixedPcdGet32 (PcdSevLaunchSecretSize),
};
EFI_STATUS
EFIAPI
InitializeSecretDxe(
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
InitializeSecretDxe (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return gBS->InstallConfigurationTable (

23
OvmfPkg/AmdSevDxe/AmdSevDxe.c
View File

@ -22,8 +22,8 @@
EFI_STATUS
EFIAPI
AmdSevDxeEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@ -48,11 +48,12 @@ AmdSevDxeEntryPoint (
Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
if (!EFI_ERROR (Status)) {
for (Index = 0; Index < NumEntries; Index++) {
CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
Desc = &AllDescMap[Index];
if (Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo ||
Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) ||
(Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))
{
Status = MemEncryptSevClearMmioPageEncMask (
0,
Desc->BaseAddress,
@ -101,8 +102,8 @@ AmdSevDxeEntryPoint (
// is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).
//
if (FeaturePcdGet (PcdSmmSmramRequire)) {
UINTN MapPagesBase;
UINTN MapPagesCount;
UINTN MapPagesBase;
UINTN MapPagesCount;
Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (
&MapPagesBase,
@ -123,8 +124,12 @@ AmdSevDxeEntryPoint (
MapPagesCount // NumPages
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: MemEncryptSevClearPageEncMask(): %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: MemEncryptSevClearPageEncMask(): %r\n",
__FUNCTION__,
Status
));
ASSERT (FALSE);
CpuDeadLoop ();
}

85
OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatform.c
View File

@ -13,10 +13,10 @@
EFI_STATUS
EFIAPI
InstallAcpiTable (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
)
{
return AcpiProtocol->InstallAcpiTable (
@ -27,7 +27,6 @@ InstallAcpiTable (
);
}
/**
Locate the first instance of a protocol. If the protocol requested is an
FV protocol, then it will return the first FV that contains the ACPI table
@ -42,18 +41,18 @@ InstallAcpiTable (
**/
EFI_STATUS
LocateFvInstanceWithTables (
OUT EFI_FIRMWARE_VOLUME2_PROTOCOL **Instance
OUT EFI_FIRMWARE_VOLUME2_PROTOCOL **Instance
)
{
EFI_STATUS Status;
EFI_HANDLE *HandleBuffer;
UINTN NumberOfHandles;
EFI_FV_FILETYPE FileType;
UINT32 FvStatus;
EFI_FV_FILE_ATTRIBUTES Attributes;
UINTN Size;
UINTN Index;
EFI_FIRMWARE_VOLUME2_PROTOCOL *FvInstance;
EFI_STATUS Status;
EFI_HANDLE *HandleBuffer;
UINTN NumberOfHandles;
EFI_FV_FILETYPE FileType;
UINT32 FvStatus;
EFI_FV_FILE_ATTRIBUTES Attributes;
UINTN Size;
UINTN Index;
EFI_FIRMWARE_VOLUME2_PROTOCOL *FvInstance;
FvStatus = 0;
@ -61,12 +60,12 @@ LocateFvInstanceWithTables (
// Locate protocol.
//
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiFirmwareVolume2ProtocolGuid,
NULL,
&NumberOfHandles,
&HandleBuffer
);
ByProtocol,
&gEfiFirmwareVolume2ProtocolGuid,
NULL,
&NumberOfHandles,
&HandleBuffer
);
if (EFI_ERROR (Status)) {
//
// Defined errors at this time are not found and out of resources.
@ -83,10 +82,10 @@ LocateFvInstanceWithTables (
// This should not fail because of LocateHandleBuffer
//
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiFirmwareVolume2ProtocolGuid,
(VOID**) &FvInstance
);
HandleBuffer[Index],
&gEfiFirmwareVolume2ProtocolGuid,
(VOID **)&FvInstance
);
ASSERT_EFI_ERROR (Status);
//
@ -94,7 +93,7 @@ LocateFvInstanceWithTables (
//
Status = FvInstance->ReadFile (
FvInstance,
(EFI_GUID*)PcdGetPtr (PcdAcpiTableStorageFile),
(EFI_GUID *)PcdGetPtr (PcdAcpiTableStorageFile),
NULL,
&Size,
&FileType,
@ -124,7 +123,6 @@ LocateFvInstanceWithTables (
return Status;
}
/**
Find ACPI tables in an FV and install them.
@ -140,18 +138,18 @@ LocateFvInstanceWithTables (
EFI_STATUS
EFIAPI
InstallOvmfFvTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
)
{
EFI_STATUS Status;
EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
INTN Instance;
EFI_ACPI_COMMON_HEADER *CurrentTable;
UINTN TableHandle;
UINT32 FvStatus;
UINTN TableSize;
UINTN Size;
EFI_ACPI_TABLE_INSTALL_ACPI_TABLE TableInstallFunction;
EFI_STATUS Status;
EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
INTN Instance;
EFI_ACPI_COMMON_HEADER *CurrentTable;
UINTN TableHandle;
UINT32 FvStatus;
UINTN TableSize;
UINTN Size;
EFI_ACPI_TABLE_INSTALL_ACPI_TABLE TableInstallFunction;
Instance = 0;
CurrentTable = NULL;
@ -171,19 +169,19 @@ InstallOvmfFvTables (
if (EFI_ERROR (Status)) {
return EFI_ABORTED;
}
ASSERT (FwVol != NULL);
//
// Read tables from the storage file.
//
while (Status == EFI_SUCCESS) {
Status = FwVol->ReadSection (
FwVol,
(EFI_GUID*)PcdGetPtr (PcdAcpiTableStorageFile),
(EFI_GUID *)PcdGetPtr (PcdAcpiTableStorageFile),
EFI_SECTION_RAW,
Instance,
(VOID**) &CurrentTable,
(VOID **)&CurrentTable,
&Size,
&FvStatus
);
@ -193,7 +191,7 @@ InstallOvmfFvTables (
//
TableHandle = 0;
TableSize = ((EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable)->Length;
TableSize = ((EFI_ACPI_DESCRIPTION_HEADER *)CurrentTable)->Length;
ASSERT (Size >= TableSize);
//
@ -240,13 +238,12 @@ InstallOvmfFvTables (
EFI_STATUS
EFIAPI
InstallAcpiTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = InstallOvmfFvTables (AcpiTable);
return Status;
}

34
OvmfPkg/Bhyve/AcpiPlatformDxe/AcpiPlatform.h
View File

@ -22,8 +22,8 @@
#include <IndustryStandard/Acpi.h>
typedef struct {
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
} ORIGINAL_ATTRIBUTES;
typedef struct S3_CONTEXT S3_CONTEXT;
@ -31,43 +31,43 @@ typedef struct S3_CONTEXT S3_CONTEXT;
EFI_STATUS
EFIAPI
InstallAcpiTable (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
);
EFI_STATUS
EFIAPI
BhyveInstallAcpiTable(
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
BhyveInstallAcpiTable (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
);
EFI_STATUS
EFIAPI
InstallXenTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
);
EFI_STATUS
EFIAPI
InstallAcpiTables (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
);
VOID
EnablePciDecoding (
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
);
VOID
RestorePciDecoding (
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
);
#endif /* _ACPI_PLATFORM_H_INCLUDED_ */

71
OvmfPkg/Bhyve/AcpiPlatformDxe/Bhyve.c
View File

@ -16,28 +16,28 @@ STATIC
EFI_STATUS
EFIAPI
BhyveInstallAcpiMadtTable (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
)
{
UINT32 CpuCount;
UINTN cSize;
UINTN NewBufferSize;
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApic;
EFI_ACPI_1_0_IO_APIC_STRUCTURE *IoApic;
EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE *Iso;
VOID *Ptr;
UINTN Loop;
EFI_STATUS Status;
UINT32 CpuCount;
UINTN cSize;
UINTN NewBufferSize;
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApic;
EFI_ACPI_1_0_IO_APIC_STRUCTURE *IoApic;
EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE *Iso;
VOID *Ptr;
UINTN Loop;
EFI_STATUS Status;
ASSERT (AcpiTableBufferSize >= sizeof (EFI_ACPI_DESCRIPTION_HEADER));
// Query the host for the number of vCPUs
CpuCount = 0;
cSize = sizeof(CpuCount);
cSize = sizeof (CpuCount);
if (BhyveFwCtlGet ("hw.ncpu", &CpuCount, &cSize) == RETURN_SUCCESS) {
DEBUG ((DEBUG_INFO, "Retrieved CpuCount %d\n", CpuCount));
ASSERT (CpuCount >= 1);
@ -57,44 +57,45 @@ BhyveInstallAcpiMadtTable (
}
CopyMem (&(Madt->Header), AcpiTableBuffer, sizeof (EFI_ACPI_DESCRIPTION_HEADER));
Madt->Header.Length = (UINT32) NewBufferSize;
Madt->Header.Length = (UINT32)NewBufferSize;
Madt->LocalApicAddress = 0xFEE00000;
Madt->Flags = EFI_ACPI_1_0_PCAT_COMPAT;
Ptr = Madt + 1;
Ptr = Madt + 1;
LocalApic = Ptr;
for (Loop = 0; Loop < CpuCount; ++Loop) {
LocalApic->Type = EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC;
LocalApic->Length = sizeof (*LocalApic);
LocalApic->AcpiProcessorId = (UINT8) Loop;
LocalApic->ApicId = (UINT8) Loop;
LocalApic->AcpiProcessorId = (UINT8)Loop;
LocalApic->ApicId = (UINT8)Loop;
LocalApic->Flags = 1; // enabled
++LocalApic;
}
Ptr = LocalApic;
IoApic = Ptr;
IoApic = Ptr;
IoApic->Type = EFI_ACPI_1_0_IO_APIC;
IoApic->Length = sizeof (*IoApic);
IoApic->IoApicId = (UINT8) CpuCount;
IoApic->IoApicId = (UINT8)CpuCount;
IoApic->Reserved = EFI_ACPI_RESERVED_BYTE;
IoApic->IoApicAddress = 0xFEC00000;
IoApic->SystemVectorBase = 0x00000000;
Ptr = IoApic + 1;
Ptr = IoApic + 1;
//
// IRQ0 (8254 Timer) => IRQ2 (PIC) Interrupt Source Override Structure
//
Iso = Ptr;
Iso = Ptr;
Iso->Type = EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE;
Iso->Length = sizeof (*Iso);
Iso->Bus = 0x00; // ISA
Iso->Source = 0x00; // IRQ0
Iso->GlobalSystemInterruptVector = 0x00000002;
Iso->Flags = 0x0000; // Conforms to specs of the bus
Ptr = Iso + 1;
Ptr = Iso + 1;
ASSERT ((UINTN) ((UINT8 *)Ptr - (UINT8 *)Madt) == NewBufferSize);
ASSERT ((UINTN)((UINT8 *)Ptr - (UINT8 *)Madt) == NewBufferSize);
Status = InstallAcpiTable (AcpiProtocol, Madt, NewBufferSize, TableKey);
FreePool (Madt);
@ -105,22 +106,22 @@ BhyveInstallAcpiMadtTable (
EFI_STATUS
EFIAPI
BhyveInstallAcpiTable (
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol,
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
)
{
EFI_ACPI_DESCRIPTION_HEADER *Hdr;
EFI_ACPI_TABLE_INSTALL_ACPI_TABLE TableInstallFunction;
Hdr = (EFI_ACPI_DESCRIPTION_HEADER*) AcpiTableBuffer;
Hdr = (EFI_ACPI_DESCRIPTION_HEADER *)AcpiTableBuffer;
switch (Hdr->Signature) {
case EFI_ACPI_1_0_APIC_SIGNATURE:
TableInstallFunction = BhyveInstallAcpiMadtTable;
break;
default:
TableInstallFunction = InstallAcpiTable;
case EFI_ACPI_1_0_APIC_SIGNATURE:
TableInstallFunction = BhyveInstallAcpiMadtTable;
break;
default:
TableInstallFunction = InstallAcpiTable;
}
return TableInstallFunction (

54
OvmfPkg/Bhyve/AcpiPlatformDxe/EntryPoint.c
View File

@ -16,49 +16,50 @@ FindAcpiTableProtocol (
VOID
)
{
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
Status = gBS->LocateProtocol (
&gEfiAcpiTableProtocolGuid,
NULL,
(VOID**)&AcpiTable
(VOID **)&AcpiTable
);
ASSERT_EFI_ERROR (Status);
return AcpiTable;
}
STATIC
VOID
EFIAPI
OnRootBridgesConnected (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: root bridges have been connected, installing ACPI tables\n",
__FUNCTION__));
__FUNCTION__
));
Status = InstallAcpiTables (FindAcpiTableProtocol ());
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: InstallAcpiTables: %r\n", __FUNCTION__, Status));
}
gBS->CloseEvent (Event);
}
EFI_STATUS
EFIAPI
AcpiPlatformEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT RootBridgesConnected;
EFI_STATUS Status;
EFI_EVENT RootBridgesConnected;
//
// If the platform doesn't support PCI, or PCI enumeration has been disabled,
@ -66,8 +67,12 @@ AcpiPlatformEntryPoint (
// the full functionality.
//
if (PcdGetBool (PcdPciDisableBusEnumeration)) {
DEBUG ((DEBUG_INFO, "%a: PCI or its enumeration disabled, installing "
"ACPI tables\n", __FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: PCI or its enumeration disabled, installing "
"ACPI tables\n",
__FUNCTION__
));
return InstallAcpiTables (FindAcpiTableProtocol ());
}
@ -77,13 +82,20 @@ AcpiPlatformEntryPoint (
// setup. (Note that we're a DXE_DRIVER; our entry point function is invoked
// strictly before BDS is entered and can connect the root bridges.)
//
Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
OnRootBridgesConnected, NULL /* Context */,
&gRootBridgesConnectedEventGroupGuid, &RootBridgesConnected);
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
OnRootBridgesConnected,
NULL /* Context */,
&gRootBridgesConnectedEventGroupGuid,
&RootBridgesConnected
);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: waiting for root bridges to be connected, registered callback\n",
__FUNCTION__));
__FUNCTION__
));
}
return Status;

110
OvmfPkg/Bhyve/AcpiPlatformDxe/PciDecoding.c
View File

@ -11,7 +11,6 @@
#include "AcpiPlatform.h"
/**
Collect all PciIo protocol instances in the system. Save their original
attributes, and enable IO and MMIO decoding for each.
@ -38,15 +37,15 @@
**/
VOID
EnablePciDecoding (
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
OUT ORIGINAL_ATTRIBUTES **OriginalAttributes,
OUT UINTN *Count
)
{
EFI_STATUS Status;
UINTN NoHandles;
EFI_HANDLE *Handles;
ORIGINAL_ATTRIBUTES *OrigAttrs;
UINTN Idx;
EFI_STATUS Status;
UINTN NoHandles;
EFI_HANDLE *Handles;
ORIGINAL_ATTRIBUTES *OrigAttrs;
UINTN Idx;
*OriginalAttributes = NULL;
*Count = 0;
@ -59,8 +58,13 @@ EnablePciDecoding (
return;
}
Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiPciIoProtocolGuid,
NULL /* SearchKey */, &NoHandles, &Handles);
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL /* SearchKey */,
&NoHandles,
&Handles
);
if (Status == EFI_NOT_FOUND) {
//
// No PCI devices were found on either of the root bridges. We're done.
@ -69,49 +73,75 @@ EnablePciDecoding (
}
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: LocateHandleBuffer(): %r\n", __FUNCTION__,
Status));
DEBUG ((
DEBUG_WARN,
"%a: LocateHandleBuffer(): %r\n",
__FUNCTION__,
Status
));
return;
}
OrigAttrs = AllocatePool (NoHandles * sizeof *OrigAttrs);
if (OrigAttrs == NULL) {
DEBUG ((DEBUG_WARN, "%a: AllocatePool(): out of resources\n",
__FUNCTION__));
DEBUG ((
DEBUG_WARN,
"%a: AllocatePool(): out of resources\n",
__FUNCTION__
));
goto FreeHandles;
}
for (Idx = 0; Idx < NoHandles; ++Idx) {
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Attributes;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Attributes;
//
// Look up PciIo on the handle and stash it
//
Status = gBS->HandleProtocol (Handles[Idx], &gEfiPciIoProtocolGuid,
(VOID**)&PciIo);
Status = gBS->HandleProtocol (
Handles[Idx],
&gEfiPciIoProtocolGuid,
(VOID **)&PciIo
);
ASSERT_EFI_ERROR (Status);
OrigAttrs[Idx].PciIo = PciIo;
//
// Stash the current attributes
//
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationGet, 0,
&OrigAttrs[Idx].PciAttributes);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationGet,
0,
&OrigAttrs[Idx].PciAttributes
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationGet: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationGet: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
//
// Retrieve supported attributes
//
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationSupported, 0,
&Attributes);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationSupported,
0,
&Attributes
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationSupported: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationSupported: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
@ -119,11 +149,19 @@ EnablePciDecoding (
// Enable IO and MMIO decoding
//
Attributes &= EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY;
Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationEnable,
Attributes, NULL);
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationEnable,
Attributes,
NULL
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: EfiPciIoAttributeOperationEnable: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_WARN,
"%a: EfiPciIoAttributeOperationEnable: %r\n",
__FUNCTION__,
Status
));
goto RestoreAttributes;
}
}
@ -139,19 +177,20 @@ EnablePciDecoding (
RestoreAttributes:
while (Idx > 0) {
--Idx;
OrigAttrs[Idx].PciIo->Attributes (OrigAttrs[Idx].PciIo,
OrigAttrs[Idx].PciIo->Attributes (
OrigAttrs[Idx].PciIo,
EfiPciIoAttributeOperationSet,
OrigAttrs[Idx].PciAttributes,
NULL
);
}
FreePool (OrigAttrs);
FreeHandles:
FreePool (Handles);
}
/**
Restore the original PCI attributes saved with EnablePciDecoding().
@ -169,11 +208,11 @@ FreeHandles:
**/
VOID
RestorePciDecoding (
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
IN ORIGINAL_ATTRIBUTES *OriginalAttributes,
IN UINTN Count
)
{
UINTN Idx;
UINTN Idx;
ASSERT ((OriginalAttributes == NULL) == (Count == 0));
if (OriginalAttributes == NULL) {
@ -188,5 +227,6 @@ RestorePciDecoding (
NULL
);
}
FreePool (OriginalAttributes);
}

78
OvmfPkg/Bhyve/AcpiTables/Platform.h
View File

@ -20,53 +20,53 @@
//
// ACPI table information used to initialize tables.
//
#define EFI_ACPI_OEM_ID 'B','H','Y','V','E',' ' // OEMID 6 bytes long
#define EFI_ACPI_OEM_REVISION 0x1
#define EFI_ACPI_CREATOR_ID SIGNATURE_32('B','H','Y','V')
#define EFI_ACPI_CREATOR_REVISION 0x00000001
#define EFI_ACPI_OEM_ID 'B','H','Y','V','E',' ' // OEMID 6 bytes long
#define EFI_ACPI_OEM_REVISION 0x1
#define EFI_ACPI_CREATOR_ID SIGNATURE_32('B','H','Y','V')
#define EFI_ACPI_CREATOR_REVISION 0x00000001
#define INT_MODEL 0x01
#define SCI_INT_VECTOR 0x0009
#define SMI_CMD_IO_PORT 0xB2
#define ACPI_ENABLE 0xA0
#define ACPI_DISABLE 0xA1
#define S4BIOS_REQ 0x00
#define PM1a_EVT_BLK 0x00000400 /* TNXXX */
#define PM1b_EVT_BLK 0x00000000
#define PM1a_CNT_BLK 0x00000404 /* TNXXX */
#define PM1b_CNT_BLK 0x00000000
#define PM2_CNT_BLK 0x00000000
#define PM_TMR_BLK 0x00000408
#define GPE0_BLK 0x00000000
#define GPE1_BLK 0x00000000
#define PM1_EVT_LEN 0x04
#define PM1_CNT_LEN 0x02
#define PM2_CNT_LEN 0x00
#define PM_TM_LEN 0x04
#define GPE0_BLK_LEN 0x00
#define GPE1_BLK_LEN 0x00
#define GPE1_BASE 0x00
#define RESERVED 0x00
#define P_LVL2_LAT 0x0000
#define P_LVL3_LAT 0x0000
#define FLUSH_SIZE 0x0000
#define FLUSH_STRIDE 0x0000
#define DUTY_OFFSET 0x00
#define DUTY_WIDTH 0x00
#define DAY_ALRM 0x00
#define MON_ALRM 0x00
#define CENTURY 0x32
#define IAPC_BOOT_ARCH 0x12 /* 8042 present, disable PCIe ASPM */
#define FACP_FLAGS (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | \
#define INT_MODEL 0x01
#define SCI_INT_VECTOR 0x0009
#define SMI_CMD_IO_PORT 0xB2
#define ACPI_ENABLE 0xA0
#define ACPI_DISABLE 0xA1
#define S4BIOS_REQ 0x00
#define PM1a_EVT_BLK 0x00000400 /* TNXXX */
#define PM1b_EVT_BLK 0x00000000
#define PM1a_CNT_BLK 0x00000404 /* TNXXX */
#define PM1b_CNT_BLK 0x00000000
#define PM2_CNT_BLK 0x00000000
#define PM_TMR_BLK 0x00000408
#define GPE0_BLK 0x00000000
#define GPE1_BLK 0x00000000
#define PM1_EVT_LEN 0x04
#define PM1_CNT_LEN 0x02
#define PM2_CNT_LEN 0x00
#define PM_TM_LEN 0x04
#define GPE0_BLK_LEN 0x00
#define GPE1_BLK_LEN 0x00
#define GPE1_BASE 0x00
#define RESERVED 0x00
#define P_LVL2_LAT 0x0000
#define P_LVL3_LAT 0x0000
#define FLUSH_SIZE 0x0000
#define FLUSH_STRIDE 0x0000
#define DUTY_OFFSET 0x00
#define DUTY_WIDTH 0x00
#define DAY_ALRM 0x00
#define MON_ALRM 0x00
#define CENTURY 0x32
#define IAPC_BOOT_ARCH 0x12 /* 8042 present, disable PCIe ASPM */
#define FACP_FLAGS (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | \
EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_TMR_VAL_EXT | \
EFI_ACPI_2_0_RESET_REG_SUP | \
EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE)
#define FACP_RESET_REG { \
#define FACP_RESET_REG { \
EFI_ACPI_3_0_SYSTEM_IO, /* Address Space ID */ \
8, /* Bit Width */ \
0, /* Bit Offset */ \
EFI_ACPI_3_0_BYTE, /* Byte Access */ \
0xCF9 /* I/O Port */ \
}
#define FACP_RESET_VAL 0x6
#define FACP_RESET_VAL 0x6
#endif

35
OvmfPkg/Bhyve/BhyveRfbDxe/ComponentName.c
View File

@ -30,17 +30,17 @@ EmuGopComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EmuGopComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
//
// EFI Component Name Protocol
//
EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName = {
EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName = {
EmuGopComponentNameGetDriverName,
EmuGopComponentNameGetControllerName,
"eng"
@ -49,19 +49,17 @@ EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName = {
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEmuGopComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) EmuGopComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) EmuGopComponentNameGetControllerName,
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEmuGopComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME)EmuGopComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)EmuGopComponentNameGetControllerName,
"en"
};
EFI_UNICODE_STRING_TABLE mEmuGopDriverNameTable[] = {
EFI_UNICODE_STRING_TABLE mEmuGopDriverNameTable[] = {
{ "eng", L"Emulator GOP Driver" },
{ NULL , NULL }
{ NULL, NULL }
};
/**
Retrieves a Unicode string that is the user readable name of the driver.
@ -118,7 +116,6 @@ EmuGopComponentNameGetDriverName (
);
}
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@ -190,11 +187,11 @@ EmuGopComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EmuGopComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;

83
OvmfPkg/Bhyve/BhyveRfbDxe/Gop.h
View File

@ -31,27 +31,27 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Pci.h>
#define GRAPHICS_OUTPUT_INVALID_MODE_NUMBER 0xffff
#define GRAPHICS_OUTPUT_INVALID_MODE_NUMBER 0xffff
typedef struct {
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
} GOP_MODE_DATA;
#define PIXEL_RED_SHIFT 0
#define PIXEL_GREEN_SHIFT 3
#define PIXEL_BLUE_SHIFT 6
#define PIXEL_RED_SHIFT 0
#define PIXEL_GREEN_SHIFT 3
#define PIXEL_BLUE_SHIFT 6
#define PIXEL_RED_MASK (BIT7 | BIT6 | BIT5)
#define PIXEL_GREEN_MASK (BIT4 | BIT3 | BIT2)
#define PIXEL_BLUE_MASK (BIT1 | BIT0)
#define PIXEL_TO_COLOR_BYTE(pixel, mask, shift) ((UINT8) ((pixel & mask) << shift))
#define PIXEL_TO_RED_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_RED_MASK, PIXEL_RED_SHIFT)
#define PIXEL_TO_GREEN_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_GREEN_MASK, PIXEL_GREEN_SHIFT)
#define PIXEL_TO_BLUE_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_BLUE_MASK, PIXEL_BLUE_SHIFT)
#define PIXEL_TO_COLOR_BYTE(pixel, mask, shift) ((UINT8) ((pixel & mask) << shift))
#define PIXEL_TO_RED_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_RED_MASK, PIXEL_RED_SHIFT)
#define PIXEL_TO_GREEN_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_GREEN_MASK, PIXEL_GREEN_SHIFT)
#define PIXEL_TO_BLUE_BYTE(pixel) PIXEL_TO_COLOR_BYTE(pixel, PIXEL_BLUE_MASK, PIXEL_BLUE_SHIFT)
#define RGB_BYTES_TO_PIXEL(Red, Green, Blue) \
(UINT8) ( (((Red) >> PIXEL_RED_SHIFT) & PIXEL_RED_MASK) | \
@ -62,61 +62,60 @@ typedef struct {
#define PIXEL24_GREEN_MASK 0x0000ff00
#define PIXEL24_BLUE_MASK 0x000000ff
extern EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName;
extern EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName;
#define EMU_UGA_CLASS_NAME L"EmuGopWindow"
#define EMU_UGA_CLASS_NAME L"EmuGopWindow"
#define GOP_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('G', 'o', 'p', 'N')
typedef struct {
UINT64 Signature;
UINT64 Signature;
EFI_HANDLE Handle;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_HANDLE Handle;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_UNICODE_STRING_TABLE *ControllerNameTable;
EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// GOP Private Data for QueryMode ()
//
GOP_MODE_DATA *ModeData;
GOP_MODE_DATA *ModeData;
UINT64 FbAddr;
UINT32 FbSize;
UINT64 FbAddr;
UINT32 FbSize;
} GOP_PRIVATE_DATA;
#define GOP_PRIVATE_DATA_FROM_THIS(a) \
CR(a, GOP_PRIVATE_DATA, GraphicsOutput, GOP_PRIVATE_DATA_SIGNATURE)
typedef struct {
UINT32 FbSize;
UINT16 Width;
UINT16 Height;
UINT16 Depth;
UINT16 RefreshRate;
UINT32 FbSize;
UINT16 Width;
UINT16 Height;
UINT16 Depth;
UINT16 RefreshRate;
} BHYVE_FBUF_MEMREGS;
//
// Global Protocol Variables
//
extern EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gEmuGopComponentName2;
extern EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gEmuGopComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gEmuGopComponentName2;
//
// Gop Hardware abstraction internal worker functions
//
EFI_STATUS
EmuGopConstructor (
IN GOP_PRIVATE_DATA *Private
IN GOP_PRIVATE_DATA *Private
);
EFI_STATUS
EmuGopDestructor (
IN GOP_PRIVATE_DATA *Private
IN GOP_PRIVATE_DATA *Private
);
VOID
@ -129,21 +128,21 @@ ShutdownGopEvent (
VOID
BhyveSetGraphicsMode (
GOP_PRIVATE_DATA *Private,
UINT16 Width,
UINT16 Height,
UINT16 Depth
UINT16 Width,
UINT16 Height,
UINT16 Depth
);
VOID
BhyveGetMemregs (
GOP_PRIVATE_DATA *Private,
BHYVE_FBUF_MEMREGS *Memregs
GOP_PRIVATE_DATA *Private,
BHYVE_FBUF_MEMREGS *Memregs
);
VOID
InstallVbeShim (
IN CONST CHAR16 *CardName,
IN EFI_PHYSICAL_ADDRESS FrameBufferBase
IN CONST CHAR16 *CardName,
IN EFI_PHYSICAL_ADDRESS FrameBufferBase
);
#endif /* _GOP_H_ */

256
OvmfPkg/Bhyve/BhyveRfbDxe/GopDriver.c
View File

@ -13,13 +13,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
STATIC VOID
BhyveGetGraphicsMode (
EFI_PCI_IO_PROTOCOL *PciIo,
UINT16 *Width,
UINT16 *Height,
UINT16 *Depth
EFI_PCI_IO_PROTOCOL *PciIo,
UINT16 *Width,
UINT16 *Height,
UINT16 *Depth
);
/**
Tests to see if this driver supports a given controller. If a child device is provided,
it further tests to see if this driver supports creating a handle for the specified child device.
@ -65,15 +64,15 @@ BhyveGetGraphicsMode (
EFI_STATUS
EFIAPI
EmuGopDriverBindingSupported (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Handle,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Handle,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT16 Width, Height, Depth;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT16 Width, Height, Depth;
//
// Open the IO Abstraction(s) needed to perform the supported test
@ -81,7 +80,7 @@ EmuGopDriverBindingSupported (
Status = gBS->OpenProtocol (
Handle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo,
(VOID **)&PciIo,
This->DriverBindingHandle,
Handle,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -107,11 +106,11 @@ EmuGopDriverBindingSupported (
}
Status = EFI_UNSUPPORTED;
if (Pci.Hdr.VendorId == 0xFB5D && Pci.Hdr.DeviceId == 0x40FB) {
DEBUG((DEBUG_INFO, "BHYVE framebuffer device detected\n"));
if ((Pci.Hdr.VendorId == 0xFB5D) && (Pci.Hdr.DeviceId == 0x40FB)) {
DEBUG ((DEBUG_INFO, "BHYVE framebuffer device detected\n"));
Status = EFI_SUCCESS;
BhyveGetGraphicsMode(PciIo, &Width, &Height, &Depth);
BhyveGetGraphicsMode (PciIo, &Width, &Height, &Depth);
PcdSet32S (PcdVideoHorizontalResolution, Width);
PcdSet32S (PcdVideoVerticalResolution, Height);
}
@ -121,16 +120,15 @@ Done:
// Close the PCI I/O Protocol
//
gBS->CloseProtocol (
Handle,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Handle
);
Handle,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Handle
);
return Status;
}
/**
Starts a device controller or a bus controller.
@ -169,25 +167,25 @@ Done:
EFI_STATUS
EFIAPI
EmuGopDriverBindingStart (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Handle,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Handle,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
BHYVE_FBUF_MEMREGS Memregs;
GOP_PRIVATE_DATA *Private;
EFI_STATUS Status;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *MmioDesc;
BHYVE_FBUF_MEMREGS Memregs;
GOP_PRIVATE_DATA *Private;
EFI_STATUS Status;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *MmioDesc;
//
// Allocate Private context data for SGO inteface.
//
Private = NULL;
Status = gBS->AllocatePool (
EfiBootServicesData,
sizeof (GOP_PRIVATE_DATA),
(VOID **)&Private
);
Status = gBS->AllocatePool (
EfiBootServicesData,
sizeof (GOP_PRIVATE_DATA),
(VOID **)&Private
);
if (EFI_ERROR (Status)) {
goto Done;
}
@ -204,7 +202,7 @@ EmuGopDriverBindingStart (
Status = gBS->OpenProtocol (
Handle,
&gEfiPciIoProtocolGuid,
(VOID **) &Private->PciIo,
(VOID **)&Private->PciIo,
This->DriverBindingHandle,
Handle,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -217,24 +215,30 @@ EmuGopDriverBindingStart (
// Check if fbuf mmio BAR is present
//
MmioDesc = NULL;
Status = Private->PciIo->GetBarAttributes (
Private->PciIo,
PCI_BAR_IDX0,
NULL,
(VOID**) &MmioDesc
);
Status = Private->PciIo->GetBarAttributes (
Private->PciIo,
PCI_BAR_IDX0,
NULL,
(VOID **)&MmioDesc
);
if (EFI_ERROR (Status) ||
MmioDesc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM) {
(MmioDesc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM))
{
DEBUG ((DEBUG_INFO, "BHYVE GOP: No mmio bar\n"));
} else {
DEBUG ((DEBUG_INFO, "BHYVE GOP: Using mmio bar @ 0x%lx\n",
MmioDesc->AddrRangeMin));
BhyveGetMemregs(Private, &Memregs);
DEBUG ((
DEBUG_INFO,
"BHYVE GOP: Using mmio bar @ 0x%lx\n",
MmioDesc->AddrRangeMin
));
BhyveGetMemregs (Private, &Memregs);
Private->FbSize = Memregs.FbSize;
}
if (MmioDesc != NULL) {
FreePool (MmioDesc);
}
if (EFI_ERROR (Status)) {
goto Done;
}
@ -243,18 +247,22 @@ EmuGopDriverBindingStart (
// Check if fbuf frame-buffer BAR is present
//
MmioDesc = NULL;
Status = Private->PciIo->GetBarAttributes (
Private->PciIo,
PCI_BAR_IDX1,
NULL,
(VOID**) &MmioDesc
);
Status = Private->PciIo->GetBarAttributes (
Private->PciIo,
PCI_BAR_IDX1,
NULL,
(VOID **)&MmioDesc
);
if (EFI_ERROR (Status) ||
MmioDesc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM) {
(MmioDesc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM))
{
DEBUG ((DEBUG_INFO, "BHYVE GOP: No frame-buffer bar\n"));
} else {
DEBUG ((DEBUG_INFO, "BHYVE GOP: Using frame-buffer bar @ 0x%lx\n",
MmioDesc->AddrRangeMin));
DEBUG ((
DEBUG_INFO,
"BHYVE GOP: Using frame-buffer bar @ 0x%lx\n",
MmioDesc->AddrRangeMin
));
Private->FbAddr = MmioDesc->AddrRangeMin;
// XXX assert BAR is >= size
}
@ -262,12 +270,17 @@ EmuGopDriverBindingStart (
if (MmioDesc != NULL) {
FreePool (MmioDesc);
}
if (EFI_ERROR (Status)) {
goto Done;
}
DEBUG ((DEBUG_INFO, "BHYVE GOP: Framebuf addr 0x%lx, size %x\n",
Private->FbAddr, Private->FbSize));
DEBUG ((
DEBUG_INFO,
"BHYVE GOP: Framebuf addr 0x%lx, size %x\n",
Private->FbAddr,
Private->FbSize
));
Status = EmuGopConstructor (Private);
if (EFI_ERROR (Status)) {
@ -279,18 +292,19 @@ EmuGopDriverBindingStart (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&Private->Handle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
NULL
);
DEBUG((DEBUG_INFO, "BHYVE framebuffer device started\n"));
DEBUG ((DEBUG_INFO, "BHYVE framebuffer device started\n"));
//
// Install int10 handler
//
#ifndef CSM_ENABLE
#ifndef CSM_ENABLE
InstallVbeShim (L"Framebuffer", Private->FbAddr);
#endif
#endif
Done:
if (EFI_ERROR (Status)) {
@ -309,8 +323,6 @@ Done:
return Status;
}
/**
Stops a device controller or a bus controller.
@ -346,11 +358,11 @@ EmuGopDriverBindingStop (
IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
EFI_STATUS Status;
GOP_PRIVATE_DATA *Private;
EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
EFI_STATUS Status;
GOP_PRIVATE_DATA *Private;
DEBUG((DEBUG_INFO, "BHYVE framebuffer device stopping\n"));
DEBUG ((DEBUG_INFO, "BHYVE framebuffer device stopping\n"));
Status = gBS->OpenProtocol (
Handle,
@ -377,7 +389,8 @@ EmuGopDriverBindingStop (
//
Status = gBS->UninstallMultipleProtocolInterfaces (
Private->Handle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
NULL
);
if (!EFI_ERROR (Status)) {
@ -390,11 +403,11 @@ EmuGopDriverBindingStop (
}
gBS->CloseProtocol (
Handle,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Private->Handle
);
Handle,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Private->Handle
);
//
// Free our instance data
@ -402,18 +415,16 @@ EmuGopDriverBindingStop (
FreeUnicodeStringTable (Private->ControllerNameTable);
gBS->FreePool (Private);
}
return Status;
}
///
/// This protocol provides the services required to determine if a driver supports a given controller.
/// If a controller is supported, then it also provides routines to start and stop the controller.
///
EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding = {
EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding = {
EmuGopDriverBindingSupported,
EmuGopDriverBindingStart,
EmuGopDriverBindingStop,
@ -422,8 +433,6 @@ EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding = {
NULL
};
/**
The user Entry Point for module EmuGop. The user code starts with this function.
@ -437,11 +446,11 @@ EFI_DRIVER_BINDING_PROTOCOL gEmuGopDriverBinding = {
EFI_STATUS
EFIAPI
InitializeEmuGop (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@ -453,33 +462,31 @@ InitializeEmuGop (
);
ASSERT_EFI_ERROR (Status);
return Status;
}
STATIC VOID
BhyveGetGraphicsMode (
EFI_PCI_IO_PROTOCOL *PciIo,
UINT16 *Width,
UINT16 *Height,
UINT16 *Depth
EFI_PCI_IO_PROTOCOL *PciIo,
UINT16 *Width,
UINT16 *Height,
UINT16 *Depth
)
{
BHYVE_FBUF_MEMREGS BhyveRegs;
UINT64 Offset;
EFI_STATUS Status;
BHYVE_FBUF_MEMREGS BhyveRegs;
UINT64 Offset;
EFI_STATUS Status;
Offset = (UINT64)&BhyveRegs.Width - (UINT64)&BhyveRegs;
Status = PciIo->Mem.Read (
PciIo,
EfiPciIoWidthUint16,
PCI_BAR_IDX0,
Offset,
3,
&BhyveRegs.Width
);
PciIo,
EfiPciIoWidthUint16,
PCI_BAR_IDX0,
Offset,
3,
&BhyveRegs.Width
);
*Width = BhyveRegs.Width;
*Height = BhyveRegs.Height;
@ -493,51 +500,56 @@ BhyveGetGraphicsMode (
VOID
BhyveSetGraphicsMode (
GOP_PRIVATE_DATA *Private,
UINT16 Width,
UINT16 Height,
UINT16 Depth
UINT16 Width,
UINT16 Height,
UINT16 Depth
)
{
BHYVE_FBUF_MEMREGS BhyveRegs;
UINT64 Offset;
EFI_STATUS Status;
BHYVE_FBUF_MEMREGS BhyveRegs;
UINT64 Offset;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "BHYVE Set Graphics Mode: w %d, h %d\n", Width, Height));
BhyveRegs.Width = Width;
BhyveRegs.Height = Height;
BhyveRegs.Depth = Depth;
Offset = (UINT64)&BhyveRegs.Width - (UINT64)&BhyveRegs;
Offset = (UINT64)&BhyveRegs.Width - (UINT64)&BhyveRegs;
Status = Private->PciIo->Mem.Write (
Private->PciIo,
EfiPciIoWidthUint16,
PCI_BAR_IDX0,
Offset,
3,
&BhyveRegs.Width
);
Private->PciIo,
EfiPciIoWidthUint16,
PCI_BAR_IDX0,
Offset,
3,
&BhyveRegs.Width
);
ASSERT_EFI_ERROR (Status);
}
VOID
BhyveGetMemregs (
GOP_PRIVATE_DATA *Private,
BHYVE_FBUF_MEMREGS *Memregs
GOP_PRIVATE_DATA *Private,
BHYVE_FBUF_MEMREGS *Memregs
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = Private->PciIo->Mem.Read (
Private->PciIo,
EfiPciIoWidthUint32,
PCI_BAR_IDX0,
0,
3,
Memregs
);
Private->PciIo,
EfiPciIoWidthUint32,
PCI_BAR_IDX0,
0,
3,
Memregs
);
ASSERT_EFI_ERROR (Status);
DEBUG ((DEBUG_INFO, "BHYVE Get Memregs, size %d width %d height %d\n",
Memregs->FbSize, Memregs->Width, Memregs->Height));
DEBUG ((
DEBUG_INFO,
"BHYVE Get Memregs, size %d width %d height %d\n",
Memregs->FbSize,
Memregs->Width,
Memregs->Height
));
}

220
OvmfPkg/Bhyve/BhyveRfbDxe/GopScreen.c
View File

@ -22,45 +22,48 @@ Abstract:
#include "Gop.h"
#include <Library/FrameBufferBltLib.h>
EFI_EVENT mGopScreenExitBootServicesEvent;
EFI_EVENT mGopScreenExitBootServicesEvent;
GOP_MODE_DATA mGopModeData[] = {
{ 0, 0, 32, 0 }, // Filled in with user-spec'd resolution
{ 1024, 768, 32, 0 },
{ 800, 600, 32, 0 },
{ 640, 480, 32, 0 }
};
GOP_MODE_DATA mGopModeData[] = {
{ 0, 0, 32, 0 }, // Filled in with user-spec'd resolution
{ 1024, 768, 32, 0 },
{ 800, 600, 32, 0 },
{ 640, 480, 32, 0 }
};
STATIC
VOID
BhyveGopCompleteModeInfo (
IN GOP_MODE_DATA *ModeData,
IN GOP_MODE_DATA *ModeData,
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
)
{
Info->Version = 0;
if (ModeData->ColorDepth == 8) {
Info->PixelFormat = PixelBitMask;
Info->PixelInformation.RedMask = PIXEL_RED_MASK;
Info->PixelInformation.GreenMask = PIXEL_GREEN_MASK;
Info->PixelInformation.BlueMask = PIXEL_BLUE_MASK;
Info->PixelFormat = PixelBitMask;
Info->PixelInformation.RedMask = PIXEL_RED_MASK;
Info->PixelInformation.GreenMask = PIXEL_GREEN_MASK;
Info->PixelInformation.BlueMask = PIXEL_BLUE_MASK;
Info->PixelInformation.ReservedMask = 0;
} else if (ModeData->ColorDepth == 24) {
Info->PixelFormat = PixelBitMask;
Info->PixelInformation.RedMask = PIXEL24_RED_MASK;
Info->PixelInformation.GreenMask = PIXEL24_GREEN_MASK;
Info->PixelInformation.BlueMask = PIXEL24_BLUE_MASK;
Info->PixelFormat = PixelBitMask;
Info->PixelInformation.RedMask = PIXEL24_RED_MASK;
Info->PixelInformation.GreenMask = PIXEL24_GREEN_MASK;
Info->PixelInformation.BlueMask = PIXEL24_BLUE_MASK;
Info->PixelInformation.ReservedMask = 0;
} else if (ModeData->ColorDepth == 32) {
DEBUG ((DEBUG_INFO, "%dx%d PixelBlueGreenRedReserved8BitPerColor\n",
ModeData->HorizontalResolution, ModeData->VerticalResolution));
DEBUG ((
DEBUG_INFO,
"%dx%d PixelBlueGreenRedReserved8BitPerColor\n",
ModeData->HorizontalResolution,
ModeData->VerticalResolution
));
Info->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;
}
Info->PixelsPerScanLine = Info->HorizontalResolution;
}
/**
Returns information for an available graphics mode that the graphics device
and the set of active video output devices supports.
@ -91,7 +94,7 @@ EmuGopQuerytMode (
Private = GOP_PRIVATE_DATA_FROM_THIS (This);
if (Info == NULL || SizeOfInfo == NULL || (UINTN) ModeNumber >= This->Mode->MaxMode) {
if ((Info == NULL) || (SizeOfInfo == NULL) || ((UINTN)ModeNumber >= This->Mode->MaxMode)) {
return EFI_INVALID_PARAMETER;
}
@ -102,18 +105,16 @@ EmuGopQuerytMode (
*SizeOfInfo = sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
ModeData = &Private->ModeData[ModeNumber];
(*Info)->Version = 0;
ModeData = &Private->ModeData[ModeNumber];
(*Info)->Version = 0;
(*Info)->HorizontalResolution = ModeData->HorizontalResolution;
(*Info)->VerticalResolution = ModeData->VerticalResolution;
(*Info)->PixelFormat = PixelBitMask;
(*Info)->PixelsPerScanLine = (*Info)->HorizontalResolution;
BhyveGopCompleteModeInfo(ModeData, *Info);
(*Info)->PixelFormat = PixelBitMask;
(*Info)->PixelsPerScanLine = (*Info)->HorizontalResolution;
BhyveGopCompleteModeInfo (ModeData, *Info);
return EFI_SUCCESS;
}
/**
Set the video device into the specified mode and clears the visible portions of
the output display to black.
@ -127,7 +128,7 @@ EmuGopQuerytMode (
**/
FRAME_BUFFER_CONFIGURE *fbconf;
FRAME_BUFFER_CONFIGURE *fbconf;
EFI_STATUS
EFIAPI
@ -136,37 +137,38 @@ EmuGopSetMode (
IN UINT32 ModeNumber
)
{
GOP_PRIVATE_DATA *Private;
GOP_MODE_DATA *ModeData;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Fill;
GOP_PRIVATE_DATA *Private;
GOP_MODE_DATA *ModeData;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Fill;
EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info;
UINTN confsize = 0;
UINTN confsize = 0;
fbconf = NULL;
Private = GOP_PRIVATE_DATA_FROM_THIS (This);
if (ModeNumber >= This->Mode->MaxMode) {
// Tell bhyve that we are switching out of vesa
BhyveSetGraphicsMode(Private, 0, 0, 0);
BhyveSetGraphicsMode (Private, 0, 0, 0);
return EFI_UNSUPPORTED;
}
DEBUG ((DEBUG_INFO, "BHYVE GopSetMode %d\n", ModeNumber));
ModeData = &Private->ModeData[ModeNumber];
This->Mode->Mode = ModeNumber;
ModeData = &Private->ModeData[ModeNumber];
This->Mode->Mode = ModeNumber;
Private->GraphicsOutput.Mode->Info->HorizontalResolution = ModeData->HorizontalResolution;
Private->GraphicsOutput.Mode->Info->VerticalResolution = ModeData->VerticalResolution;
Private->GraphicsOutput.Mode->Info->PixelsPerScanLine = ModeData->HorizontalResolution;
Private->GraphicsOutput.Mode->Info->VerticalResolution = ModeData->VerticalResolution;
Private->GraphicsOutput.Mode->Info->PixelsPerScanLine = ModeData->HorizontalResolution;
Info = This->Mode->Info;
BhyveGopCompleteModeInfo(ModeData, Info);
BhyveGopCompleteModeInfo (ModeData, Info);
This->Mode->Info->HorizontalResolution = ModeData->HorizontalResolution;
This->Mode->Info->VerticalResolution = ModeData->VerticalResolution;
This->Mode->SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
This->Mode->FrameBufferBase = Private->GraphicsOutput.Mode->FrameBufferBase;
This->Mode->Info->VerticalResolution = ModeData->VerticalResolution;
This->Mode->SizeOfInfo = sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
This->Mode->FrameBufferBase = Private->GraphicsOutput.Mode->FrameBufferBase;
/*
This->Mode->FrameBufferSize = Info->HorizontalResolution * Info->VerticalResolution
@ -175,18 +177,24 @@ EmuGopSetMode (
This->Mode->FrameBufferSize = Private->FbSize;
DEBUG ((DEBUG_INFO, "BHYVE GOP FrameBufferBase: 0x%x, FrameBufferSize: 0x%x\n", This->Mode->FrameBufferBase, This->Mode->FrameBufferSize));
BhyveSetGraphicsMode(Private, (UINT16)ModeData->HorizontalResolution, (UINT16)ModeData->VerticalResolution, (UINT16)ModeData->ColorDepth);
BhyveSetGraphicsMode (Private, (UINT16)ModeData->HorizontalResolution, (UINT16)ModeData->VerticalResolution, (UINT16)ModeData->ColorDepth);
RETURN_STATUS ret = FrameBufferBltConfigure (
(VOID*)(UINTN) This->Mode->FrameBufferBase,
This->Mode->Info, fbconf, &confsize
);
if (ret == EFI_BUFFER_TOO_SMALL || ret == EFI_INVALID_PARAMETER) {
fbconf = AllocatePool(confsize);
ret = FrameBufferBltConfigure(
(VOID*)(UINTN)This->Mode->FrameBufferBase,
This->Mode->Info, fbconf, &confsize);
ASSERT(ret == EFI_SUCCESS);
RETURN_STATUS ret = FrameBufferBltConfigure (
(VOID *)(UINTN)This->Mode->FrameBufferBase,
This->Mode->Info,
fbconf,
&confsize
);
if ((ret == EFI_BUFFER_TOO_SMALL) || (ret == EFI_INVALID_PARAMETER)) {
fbconf = AllocatePool (confsize);
ret = FrameBufferBltConfigure (
(VOID *)(UINTN)This->Mode->FrameBufferBase,
This->Mode->Info,
fbconf,
&confsize
);
ASSERT (ret == EFI_SUCCESS);
}
Fill.Red = 0;
@ -207,8 +215,6 @@ EmuGopSetMode (
return EFI_SUCCESS;
}
/**
Blt a rectangle of pixels on the graphics screen. Blt stands for BLock Transfer.
@ -232,26 +238,26 @@ EmuGopSetMode (
EFI_STATUS
EFIAPI
EmuGopBlt (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,
IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
IN UINTN DestinationX,
IN UINTN DestinationY,
IN UINTN Width,
IN UINTN Height,
IN UINTN Delta OPTIONAL
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,
IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
IN UINTN DestinationX,
IN UINTN DestinationY,
IN UINTN Width,
IN UINTN Height,
IN UINTN Delta OPTIONAL
)
{
EFI_TPL OriginalTPL;
EFI_STATUS Status;
EFI_TPL OriginalTPL;
EFI_STATUS Status;
if ((UINT32)BltOperation >= EfiGraphicsOutputBltOperationMax) {
return EFI_INVALID_PARAMETER;
}
if (Width == 0 || Height == 0) {
if ((Width == 0) || (Height == 0)) {
return EFI_INVALID_PARAMETER;
}
@ -263,27 +269,27 @@ EmuGopBlt (
OriginalTPL = gBS->RaiseTPL (TPL_NOTIFY);
switch (BltOperation) {
case EfiBltVideoToBltBuffer:
case EfiBltBufferToVideo:
case EfiBltVideoFill:
case EfiBltVideoToVideo:
Status = FrameBufferBlt (
fbconf,
BltBuffer,
BltOperation,
SourceX,
SourceY,
DestinationX,
DestinationY,
Width,
Height,
Delta
);
break;
case EfiBltVideoToBltBuffer:
case EfiBltBufferToVideo:
case EfiBltVideoFill:
case EfiBltVideoToVideo:
Status = FrameBufferBlt (
fbconf,
BltBuffer,
BltOperation,
SourceX,
SourceY,
DestinationX,
DestinationY,
Width,
Height,
Delta
);
break;
default:
Status = EFI_INVALID_PARAMETER;
ASSERT (FALSE);
default:
Status = EFI_INVALID_PARAMETER;
ASSERT (FALSE);
}
gBS->RestoreTPL (OriginalTPL);
@ -291,25 +297,24 @@ EmuGopBlt (
return Status;
}
//
// Construction and Destruction functions
//
EFI_STATUS
EmuGopConstructor (
GOP_PRIVATE_DATA *Private
GOP_PRIVATE_DATA *Private
)
{
// Set mode 0 to be the requested resolution
mGopModeData[0].HorizontalResolution = PcdGet32 ( PcdVideoHorizontalResolution);
mGopModeData[0].VerticalResolution = PcdGet32 ( PcdVideoVerticalResolution );
mGopModeData[0].HorizontalResolution = PcdGet32 (PcdVideoHorizontalResolution);
mGopModeData[0].VerticalResolution = PcdGet32 (PcdVideoVerticalResolution);
Private->ModeData = mGopModeData;
Private->GraphicsOutput.QueryMode = EmuGopQuerytMode;
Private->GraphicsOutput.SetMode = EmuGopSetMode;
Private->GraphicsOutput.Blt = EmuGopBlt;
Private->GraphicsOutput.QueryMode = EmuGopQuerytMode;
Private->GraphicsOutput.SetMode = EmuGopSetMode;
Private->GraphicsOutput.Blt = EmuGopBlt;
//
// Allocate buffer for Graphics Output Protocol mode information
@ -318,35 +323,33 @@ EmuGopConstructor (
if (Private->GraphicsOutput.Mode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Private->GraphicsOutput.Mode->Info = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION));
if (Private->GraphicsOutput.Mode->Info == NULL) {
return EFI_OUT_OF_RESOURCES;
}
DEBUG ((DEBUG_INFO, "BHYVE Gop Constructor\n"));
Private->GraphicsOutput.Mode->MaxMode = sizeof(mGopModeData) / sizeof(GOP_MODE_DATA);
Private->GraphicsOutput.Mode->MaxMode = sizeof (mGopModeData) / sizeof (GOP_MODE_DATA);
//
// Till now, we have no idea about the window size.
//
Private->GraphicsOutput.Mode->Mode = GRAPHICS_OUTPUT_INVALID_MODE_NUMBER;
Private->GraphicsOutput.Mode->Info->Version = 0;
Private->GraphicsOutput.Mode->Mode = GRAPHICS_OUTPUT_INVALID_MODE_NUMBER;
Private->GraphicsOutput.Mode->Info->Version = 0;
Private->GraphicsOutput.Mode->Info->HorizontalResolution = 0;
Private->GraphicsOutput.Mode->Info->VerticalResolution = 0;
Private->GraphicsOutput.Mode->Info->PixelFormat = PixelBitMask;
Private->GraphicsOutput.Mode->SizeOfInfo = sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
Private->GraphicsOutput.Mode->FrameBufferBase = (EFI_PHYSICAL_ADDRESS) Private->FbAddr;
Private->GraphicsOutput.Mode->FrameBufferSize = Private->FbSize;
Private->GraphicsOutput.Mode->Info->VerticalResolution = 0;
Private->GraphicsOutput.Mode->Info->PixelFormat = PixelBitMask;
Private->GraphicsOutput.Mode->SizeOfInfo = sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
Private->GraphicsOutput.Mode->FrameBufferBase = (EFI_PHYSICAL_ADDRESS)Private->FbAddr;
Private->GraphicsOutput.Mode->FrameBufferSize = Private->FbSize;
return EFI_SUCCESS;
}
EFI_STATUS
EmuGopDestructor (
GOP_PRIVATE_DATA *Private
GOP_PRIVATE_DATA *Private
)
{
//
@ -356,6 +359,7 @@ EmuGopDestructor (
if (Private->GraphicsOutput.Mode->Info != NULL) {
FreePool (Private->GraphicsOutput.Mode->Info);
}
FreePool (Private->GraphicsOutput.Mode);
Private->GraphicsOutput.Mode = NULL;
}
@ -363,13 +367,13 @@ EmuGopDestructor (
return EFI_SUCCESS;
}
VOID
EFIAPI
ShutdownGopEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
/*++
Routine Description:

139
OvmfPkg/Bhyve/BhyveRfbDxe/VbeShim.c
View File

@ -28,8 +28,8 @@
#pragma pack (1)
typedef struct {
UINT16 Offset;
UINT16 Segment;
UINT16 Offset;
UINT16 Segment;
} IVT_ENTRY;
#pragma pack ()
@ -37,52 +37,49 @@ typedef struct {
// This string is displayed by Windows 2008 R2 SP1 in the Screen Resolution,
// Advanced Settings dialog. It should be short.
//
STATIC CONST CHAR8 mProductRevision[] = "2.0";
STATIC CONST CHAR8 mProductRevision[] = "2.0";
#define NUM_VBE_MODES 3
STATIC CONST UINT16 vbeModeIds[] = {
#define NUM_VBE_MODES 3
STATIC CONST UINT16 vbeModeIds[] = {
0x13f, // 640x480x32
0x140, // 800x600x32
0x141 // 1024x768x32
};
// Modes can be toggled with bit-0
#define VBE_MODE_ENABLED 0x00BB
#define VBE_MODE_DISABLED 0x00BA
#define VBE_MODE_ENABLED 0x00BB
#define VBE_MODE_DISABLED 0x00BA
STATIC VBE2_MODE_INFO vbeModes[] = {
STATIC VBE2_MODE_INFO vbeModes[] = {
{ // 0x13f 640x480x32
// ModeAttr - BytesPerScanLine
VBE_MODE_DISABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 640*4,
VBE_MODE_DISABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 640*4,
// Width, Height..., Vbe3
640, 480, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
640, 480, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
// Masks
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
// Framebuffer
0xdeadbeef, 0x0000, 0x0000
0xdeadbeef, 0x0000, 0x0000
},
{ // 0x140 800x600x32
// ModeAttr - BytesPerScanLine
VBE_MODE_DISABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 800*4,
VBE_MODE_DISABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 800*4,
// Width, Height..., Vbe3
800, 600, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
800, 600, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
// Masks
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
// Framebuffer
0xdeadbeef, 0x0000, 0x0000
0xdeadbeef, 0x0000, 0x0000
},
{ // 0x141 1024x768x32
// ModeAttr - BytesPerScanLine
VBE_MODE_ENABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 1024*4,
VBE_MODE_ENABLED, 0x07, 0x00, 0x40, 0x40, 0xA000, 0x00, 0x0000, 1024*4,
// Width, Height..., Vbe3
1024, 768, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
1024, 768, 16, 8, 1, 32, 1, 0x06, 0, 0, 1,
// Masks
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
0x08, 0x10, 0x08, 0x08, 0x08, 0x00, 0x08, 0x18, 0x00,
// Framebuffer
0xdeadbeef, 0x0000, 0x0000
0xdeadbeef, 0x0000, 0x0000
}
};
@ -98,23 +95,23 @@ STATIC VBE2_MODE_INFO vbeModes[] = {
**/
VOID
InstallVbeShim (
IN CONST CHAR16 *CardName,
IN EFI_PHYSICAL_ADDRESS FrameBufferBase
IN CONST CHAR16 *CardName,
IN EFI_PHYSICAL_ADDRESS FrameBufferBase
)
{
EFI_PHYSICAL_ADDRESS Segment0, SegmentC, SegmentF;
UINTN Segment0Pages;
IVT_ENTRY *Int0x10;
EFI_STATUS Status;
UINTN Pam1Address;
UINT8 Pam1;
UINTN SegmentCPages;
VBE_INFO *VbeInfoFull;
VBE_INFO_BASE *VbeInfo;
UINT8 *Ptr;
UINTN Printed;
VBE_MODE_INFO *VbeModeInfo;
UINTN i;
EFI_PHYSICAL_ADDRESS Segment0, SegmentC, SegmentF;
UINTN Segment0Pages;
IVT_ENTRY *Int0x10;
EFI_STATUS Status;
UINTN Pam1Address;
UINT8 Pam1;
UINTN SegmentCPages;
VBE_INFO *VbeInfoFull;
VBE_INFO_BASE *VbeInfo;
UINT8 *Ptr;
UINTN Printed;
VBE_MODE_INFO *VbeModeInfo;
UINTN i;
Segment0 = 0x00000;
SegmentC = 0xC0000;
@ -130,11 +127,15 @@ InstallVbeShim (
//
Segment0Pages = 1;
Int0x10 = (IVT_ENTRY *)(UINTN)Segment0 + 0x10;
Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode,
Segment0Pages, &Segment0);
Status = gBS->AllocatePages (
AllocateAddress,
EfiBootServicesCode,
Segment0Pages,
&Segment0
);
if (EFI_ERROR (Status)) {
EFI_PHYSICAL_ADDRESS Handler;
EFI_PHYSICAL_ADDRESS Handler;
//
// Check if a video BIOS handler has been installed previously -- we
@ -142,9 +143,14 @@ InstallVbeShim (
// it's already present.
//
Handler = (Int0x10->Segment << 4) + Int0x10->Offset;
if (Handler >= SegmentC && Handler < SegmentF) {
DEBUG ((DEBUG_VERBOSE, "%a: Video BIOS handler found at %04x:%04x\n",
__FUNCTION__, Int0x10->Segment, Int0x10->Offset));
if ((Handler >= SegmentC) && (Handler < SegmentF)) {
DEBUG ((
DEBUG_VERBOSE,
"%a: Video BIOS handler found at %04x:%04x\n",
__FUNCTION__,
Int0x10->Segment,
Int0x10->Offset
));
return;
}
@ -152,8 +158,12 @@ InstallVbeShim (
// Otherwise we'll overwrite the Int10h vector, even though we may not own
// the page at zero.
//
DEBUG ((DEBUG_VERBOSE, "%a: failed to allocate page at zero: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_VERBOSE,
"%a: failed to allocate page at zero: %r\n",
__FUNCTION__,
Status
));
} else {
//
// We managed to allocate the page at zero. SVN r14218 guarantees that it
@ -203,14 +213,15 @@ InstallVbeShim (
VbeInfo->Capabilities = BIT1 | BIT0; // DAC can be switched into 8-bit mode
VbeInfo->ModeListAddress = (UINT32)SegmentC << 12 | (UINT16)((UINTN)Ptr-SegmentC);
for (i = 0; i < NUM_VBE_MODES; i ++) {
*(UINT16*)Ptr = vbeModeIds[i]; // mode number
Ptr += 2;
for (i = 0; i < NUM_VBE_MODES; i++) {
*(UINT16 *)Ptr = vbeModeIds[i]; // mode number
Ptr += 2;
}
*(UINT16*)Ptr = 0xFFFF; // mode list terminator
Ptr += 2;
VbeInfo->VideoMem64K = (UINT16)((1024 * 768 * 4 + 65535) / 65536);
*(UINT16 *)Ptr = 0xFFFF; // mode list terminator
Ptr += 2;
VbeInfo->VideoMem64K = (UINT16)((1024 * 768 * 4 + 65535) / 65536);
VbeInfo->OemSoftwareVersion = 0x0200;
VbeInfo->VendorNameAddress = (UINT32)SegmentC << 12 | (UINT16)((UINTN)Ptr-SegmentC);
@ -218,9 +229,12 @@ InstallVbeShim (
Ptr += 5;
VbeInfo->ProductNameAddress = (UINT32)SegmentC << 12 | (UINT16)((UINTN)Ptr-SegmentC);
Printed = AsciiSPrint ((CHAR8 *)Ptr,
sizeof VbeInfoFull->Buffer - (Ptr - VbeInfoFull->Buffer), "%s",
CardName);
Printed = AsciiSPrint (
(CHAR8 *)Ptr,
sizeof VbeInfoFull->Buffer - (Ptr - VbeInfoFull->Buffer),
"%s",
CardName
);
Ptr += Printed + 1;
VbeInfo->ProductRevAddress = (UINT32)SegmentC << 12 | (UINT16)((UINTN)Ptr-SegmentC);
@ -234,7 +248,7 @@ InstallVbeShim (
// Fill in the VBE MODE INFO structure list
//
VbeModeInfo = (VBE_MODE_INFO *)(VbeInfoFull + 1);
Ptr = (UINT8 *)VbeModeInfo;
Ptr = (UINT8 *)VbeModeInfo;
for (i = 0; i < NUM_VBE_MODES; i++) {
vbeModes[i].LfbAddress = (UINT32)FrameBufferBase;
CopyMem (Ptr, &vbeModes[i], 0x32);
@ -251,9 +265,14 @@ InstallVbeShim (
//
// Second, point the Int10h vector at the shim.
//
Int0x10->Segment = (UINT16) ((UINT32)SegmentC >> 4);
Int0x10->Offset = (UINT16) ((UINTN) (VbeModeInfo + 1) - SegmentC);
Int0x10->Segment = (UINT16)((UINT32)SegmentC >> 4);
Int0x10->Offset = (UINT16)((UINTN)(VbeModeInfo + 1) - SegmentC);
DEBUG ((DEBUG_INFO, "%a: VBE shim installed to %x:%x\n",
__FUNCTION__, Int0x10->Segment, Int0x10->Offset));
DEBUG ((
DEBUG_INFO,
"%a: VBE shim installed to %x:%x\n",
__FUNCTION__,
Int0x10->Segment,
Int0x10->Offset
));
}

1811
OvmfPkg/Bhyve/BhyveRfbDxe/VbeShim.h
View File

File diff suppressed because it is too large Load Diff

12
OvmfPkg/Bhyve/PlatformPei/AmdSev.c
View File

@ -30,8 +30,8 @@ AmdSevInitialize (
VOID
)
{
UINT64 EncryptionMask;
RETURN_STATUS PcdStatus;
UINT64 EncryptionMask;
RETURN_STATUS PcdStatus;
//
// Check if SEV is enabled
@ -44,7 +44,7 @@ AmdSevInitialize (
// Set Memory Encryption Mask PCD
//
EncryptionMask = MemEncryptSevGetEncryptionMask ();
PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
ASSERT_RETURN_ERROR (PcdStatus);
DEBUG ((DEBUG_INFO, "SEV is enabled (mask 0x%lx)\n", EncryptionMask));
@ -67,9 +67,9 @@ AmdSevInitialize (
// hypervisor.
//
if (FeaturePcdGet (PcdSmmSmramRequire) && (mBootMode != BOOT_ON_S3_RESUME)) {
RETURN_STATUS LocateMapStatus;
UINTN MapPagesBase;
UINTN MapPagesCount;
RETURN_STATUS LocateMapStatus;
UINTN MapPagesBase;
UINTN MapPagesCount;
LocateMapStatus = MemEncryptSevLocateInitialSmramSaveStateMapPages (
&MapPagesBase,

36
OvmfPkg/Bhyve/PlatformPei/ClearCache.c
View File

@ -29,7 +29,7 @@ STATIC
VOID
EFIAPI
ClearCache (
IN OUT VOID *WorkSpace
IN OUT VOID *WorkSpace
)
{
WriteBackInvalidateDataCache ();
@ -56,8 +56,8 @@ ClearCacheOnMpServicesAvailable (
IN VOID *Ppi
)
{
EFI_PEI_MP_SERVICES_PPI *MpServices;
EFI_STATUS Status;
EFI_PEI_MP_SERVICES_PPI *MpServices;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "%a: %a\n", gEfiCallerBaseName, __FUNCTION__));
@ -65,15 +65,15 @@ ClearCacheOnMpServicesAvailable (
// Clear cache on all the APs in parallel.
//
MpServices = Ppi;
Status = MpServices->StartupAllAPs (
(CONST EFI_PEI_SERVICES **)PeiServices,
MpServices,
ClearCache, // Procedure
FALSE, // SingleThread
0, // TimeoutInMicroSeconds: inf.
NULL // ProcedureArgument
);
if (EFI_ERROR (Status) && Status != EFI_NOT_STARTED) {
Status = MpServices->StartupAllAPs (
(CONST EFI_PEI_SERVICES **)PeiServices,
MpServices,
ClearCache, // Procedure
FALSE, // SingleThread
0, // TimeoutInMicroSeconds: inf.
NULL // ProcedureArgument
);
if (EFI_ERROR (Status) && (Status != EFI_NOT_STARTED)) {
DEBUG ((DEBUG_ERROR, "%a: StartupAllAps(): %r\n", __FUNCTION__, Status));
return Status;
}
@ -89,7 +89,7 @@ ClearCacheOnMpServicesAvailable (
// Notification object for registering the callback, for when
// EFI_PEI_MP_SERVICES_PPI becomes available.
//
STATIC CONST EFI_PEI_NOTIFY_DESCRIPTOR mMpServicesNotify = {
STATIC CONST EFI_PEI_NOTIFY_DESCRIPTOR mMpServicesNotify = {
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | // Flags
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMpServicesPpiGuid, // Guid
@ -101,11 +101,15 @@ InstallClearCacheCallback (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = PeiServicesNotifyPpi (&mMpServicesNotify);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to set up MP Services callback: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to set up MP Services callback: %r\n",
__FUNCTION__,
Status
));
}
}

13
OvmfPkg/Bhyve/PlatformPei/Cmos.c
View File

@ -6,7 +6,6 @@
**/
#include "Cmos.h"
#include "Library/IoLib.h"
@ -24,14 +23,13 @@
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
IN UINTN Index
)
{
IoWrite8 (0x70, (UINT8) Index);
IoWrite8 (0x70, (UINT8)Index);
return IoRead8 (0x71);
}
/**
Writes 8-bits of CMOS data.
@ -47,12 +45,11 @@ CmosRead8 (
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
IN UINTN Index,
IN UINT8 Value
)
{
IoWrite8 (0x70, (UINT8) Index);
IoWrite8 (0x70, (UINT8)Index);
IoWrite8 (0x71, Value);
return Value;
}

8
OvmfPkg/Bhyve/PlatformPei/Cmos.h
View File

@ -23,7 +23,7 @@
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
IN UINTN Index
);
/**
@ -41,10 +41,8 @@ CmosRead8 (
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
IN UINTN Index,
IN UINT8 Value
);
#endif /* _CMOS_H_ */

8
OvmfPkg/Bhyve/PlatformPei/Fv.c
View File

@ -13,7 +13,6 @@
#include <Library/PcdLib.h>
#include <Library/PeiServicesLib.h>
/**
Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
and DXE know about them.
@ -26,7 +25,7 @@ PeiFvInitialization (
VOID
)
{
BOOLEAN SecureS3Needed;
BOOLEAN SecureS3Needed;
DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
@ -67,7 +66,7 @@ PeiFvInitialization (
// of DXEFV, so let's keep away the OS from there too.
//
if (SecureS3Needed) {
UINT32 DxeMemFvEnd;
UINT32 DxeMemFvEnd;
DxeMemFvEnd = PcdGet32 (PcdOvmfDxeMemFvBase) +
PcdGet32 (PcdOvmfDxeMemFvSize);
@ -83,7 +82,7 @@ PeiFvInitialization (
//
PeiServicesInstallFvInfoPpi (
NULL,
(VOID *)(UINTN) PcdGet32 (PcdOvmfDxeMemFvBase),
(VOID *)(UINTN)PcdGet32 (PcdOvmfDxeMemFvBase),
PcdGet32 (PcdOvmfDxeMemFvSize),
NULL,
NULL
@ -91,4 +90,3 @@ PeiFvInitialization (
return EFI_SUCCESS;
}

172
OvmfPkg/Bhyve/PlatformPei/MemDetect.c
View File

@ -36,22 +36,22 @@ Module Name:
#include "Platform.h"
#include "Cmos.h"
UINT8 mPhysMemAddressWidth;
UINT8 mPhysMemAddressWidth;
STATIC UINT32 mS3AcpiReservedMemoryBase;
STATIC UINT32 mS3AcpiReservedMemorySize;
STATIC UINT32 mS3AcpiReservedMemoryBase;
STATIC UINT32 mS3AcpiReservedMemorySize;
STATIC UINT16 mQ35TsegMbytes;
STATIC UINT16 mQ35TsegMbytes;
BOOLEAN mQ35SmramAtDefaultSmbase = FALSE;
BOOLEAN mQ35SmramAtDefaultSmbase = FALSE;
VOID
Q35TsegMbytesInitialization (
VOID
)
{
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {
DEBUG ((
@ -100,14 +100,13 @@ Q35TsegMbytesInitialization (
mQ35TsegMbytes = ExtendedTsegMbytes;
}
UINT32
GetSystemMemorySizeBelow4gb (
VOID
)
{
UINT8 Cmos0x34;
UINT8 Cmos0x35;
UINT8 Cmos0x34;
UINT8 Cmos0x35;
//
// CMOS 0x34/0x35 specifies the system memory above 16 MB.
@ -118,20 +117,19 @@ GetSystemMemorySizeBelow4gb (
// into the calculation to get the total memory size.
//
Cmos0x34 = (UINT8) CmosRead8 (0x34);
Cmos0x35 = (UINT8) CmosRead8 (0x35);
Cmos0x34 = (UINT8)CmosRead8 (0x34);
Cmos0x35 = (UINT8)CmosRead8 (0x35);
return (UINT32) (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
}
STATIC
UINT64
GetSystemMemorySizeAbove4gb (
)
{
UINT32 Size;
UINTN CmosIndex;
UINT32 Size;
UINTN CmosIndex;
//
// CMOS 0x5b-0x5d specifies the system memory above 4GB MB.
@ -143,13 +141,12 @@ GetSystemMemorySizeAbove4gb (
Size = 0;
for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {
Size = (UINT32) (Size << 8) + (UINT32) CmosRead8 (CmosIndex);
Size = (UINT32)(Size << 8) + (UINT32)CmosRead8 (CmosIndex);
}
return LShiftU64 (Size, 16);
}
/**
Return the highest address that DXE could possibly use, plus one.
**/
@ -159,9 +156,9 @@ GetFirstNonAddress (
VOID
)
{
UINT64 FirstNonAddress;
UINT64 Pci64Base, Pci64Size;
RETURN_STATUS PcdStatus;
UINT64 FirstNonAddress;
UINT64 Pci64Base, Pci64Size;
RETURN_STATUS PcdStatus;
FirstNonAddress = BASE_4GB + GetSystemMemorySizeAbove4gb ();
@ -170,11 +167,12 @@ GetFirstNonAddress (
// resources to 32-bit anyway. See DegradeResource() in
// "PciResourceSupport.c".
//
#ifdef MDE_CPU_IA32
#ifdef MDE_CPU_IA32
if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
return FirstNonAddress;
}
#endif
#endif
//
// Otherwise, in order to calculate the highest address plus one, we must
@ -184,8 +182,11 @@ GetFirstNonAddress (
if (Pci64Size == 0) {
if (mBootMode != BOOT_ON_S3_RESUME) {
DEBUG ((DEBUG_INFO, "%a: disabling 64-bit PCI host aperture\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: disabling 64-bit PCI host aperture\n",
__FUNCTION__
));
PcdStatus = PcdSet64S (PcdPciMmio64Size, 0);
ASSERT_RETURN_ERROR (PcdStatus);
}
@ -224,8 +225,13 @@ GetFirstNonAddress (
PcdStatus = PcdSet64S (PcdPciMmio64Size, Pci64Size);
ASSERT_RETURN_ERROR (PcdStatus);
DEBUG ((DEBUG_INFO, "%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n",
__FUNCTION__, Pci64Base, Pci64Size));
DEBUG ((
DEBUG_INFO,
"%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n",
__FUNCTION__,
Pci64Base,
Pci64Size
));
}
//
@ -235,7 +241,6 @@ GetFirstNonAddress (
return FirstNonAddress;
}
/**
Initialize the mPhysMemAddressWidth variable, based on guest RAM size.
**/
@ -244,7 +249,7 @@ AddressWidthInitialization (
VOID
)
{
UINT64 FirstNonAddress;
UINT64 FirstNonAddress;
//
// As guest-physical memory size grows, the permanent PEI RAM requirements
@ -272,10 +277,10 @@ AddressWidthInitialization (
if (mPhysMemAddressWidth <= 36) {
mPhysMemAddressWidth = 36;
}
ASSERT (mPhysMemAddressWidth <= 48);
}
/**
Calculate the cap for the permanent PEI memory.
**/
@ -285,21 +290,22 @@ GetPeiMemoryCap (
VOID
)
{
BOOLEAN Page1GSupport;
UINT32 RegEax;
UINT32 RegEdx;
UINT32 Pml4Entries;
UINT32 PdpEntries;
UINTN TotalPages;
BOOLEAN Page1GSupport;
UINT32 RegEax;
UINT32 RegEdx;
UINT32 Pml4Entries;
UINT32 PdpEntries;
UINTN TotalPages;
//
// If DXE is 32-bit, then just return the traditional 64 MB cap.
//
#ifdef MDE_CPU_IA32
#ifdef MDE_CPU_IA32
if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
return SIZE_64MB;
}
#endif
#endif
//
// Dependent on physical address width, PEI memory allocations can be
@ -320,7 +326,7 @@ GetPeiMemoryCap (
if (mPhysMemAddressWidth <= 39) {
Pml4Entries = 1;
PdpEntries = 1 << (mPhysMemAddressWidth - 30);
PdpEntries = 1 << (mPhysMemAddressWidth - 30);
ASSERT (PdpEntries <= 0x200);
} else {
Pml4Entries = 1 << (mPhysMemAddressWidth - 39);
@ -329,7 +335,7 @@ GetPeiMemoryCap (
}
TotalPages = Page1GSupport ? Pml4Entries + 1 :
(PdpEntries + 1) * Pml4Entries + 1;
(PdpEntries + 1) * Pml4Entries + 1;
ASSERT (TotalPages <= 0x40201);
//
@ -340,7 +346,6 @@ GetPeiMemoryCap (
return (UINT32)(EFI_PAGES_TO_SIZE (TotalPages) + SIZE_64MB);
}
/**
Publish PEI core memory
@ -352,11 +357,11 @@ PublishPeiMemory (
VOID
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
UINT32 LowerMemorySize;
UINT32 PeiMemoryCap;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
UINT32 LowerMemorySize;
UINT32 PeiMemoryCap;
LowerMemorySize = GetSystemMemorySizeBelow4gb ();
if (FeaturePcdGet (PcdSmmSmramRequire)) {
@ -373,10 +378,10 @@ PublishPeiMemory (
//
if (mS3Supported) {
mS3AcpiReservedMemorySize = SIZE_512KB +
mMaxCpuCount *
PcdGet32 (PcdCpuApStackSize);
mMaxCpuCount *
PcdGet32 (PcdCpuApStackSize);
mS3AcpiReservedMemoryBase = LowerMemorySize - mS3AcpiReservedMemorySize;
LowerMemorySize = mS3AcpiReservedMemoryBase;
LowerMemorySize = mS3AcpiReservedMemoryBase;
}
if (mBootMode == BOOT_ON_S3_RESUME) {
@ -384,8 +389,13 @@ PublishPeiMemory (
MemorySize = mS3AcpiReservedMemorySize;
} else {
PeiMemoryCap = GetPeiMemoryCap ();
DEBUG ((DEBUG_INFO, "%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",
__FUNCTION__, mPhysMemAddressWidth, PeiMemoryCap >> 10));
DEBUG ((
DEBUG_INFO,
"%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",
__FUNCTION__,
mPhysMemAddressWidth,
PeiMemoryCap >> 10
));
//
// Determine the range of memory to use during PEI
@ -398,8 +408,8 @@ PublishPeiMemory (
// shouldn't overlap with that HOB.
//
MemoryBase = mS3Supported && FeaturePcdGet (PcdSmmSmramRequire) ?
PcdGet32 (PcdOvmfDecompressionScratchEnd) :
PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
PcdGet32 (PcdOvmfDecompressionScratchEnd) :
PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
MemorySize = LowerMemorySize - MemoryBase;
if (MemorySize > PeiMemoryCap) {
MemoryBase = LowerMemorySize - PeiMemoryCap;
@ -410,13 +420,12 @@ PublishPeiMemory (
//
// Publish this memory to the PEI Core
//
Status = PublishSystemMemory(MemoryBase, MemorySize);
Status = PublishSystemMemory (MemoryBase, MemorySize);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Peform Memory Detection for QEMU / KVM
@ -427,10 +436,10 @@ QemuInitializeRam (
VOID
)
{
UINT64 LowerMemorySize;
UINT64 UpperMemorySize;
MTRR_SETTINGS MtrrSettings;
EFI_STATUS Status;
UINT64 LowerMemorySize;
UINT64 UpperMemorySize;
MTRR_SETTINGS MtrrSettings;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__));
@ -469,12 +478,15 @@ QemuInitializeRam (
AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
if (FeaturePcdGet (PcdSmmSmramRequire)) {
UINT32 TsegSize;
UINT32 TsegSize;
TsegSize = mQ35TsegMbytes * SIZE_1MB;
AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
TRUE);
AddReservedMemoryBaseSizeHob (
LowerMemorySize - TsegSize,
TsegSize,
TRUE
);
} else {
AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
}
@ -516,16 +528,22 @@ QemuInitializeRam (
//
// Set memory range from 640KB to 1MB to uncacheable
//
Status = MtrrSetMemoryAttribute (BASE_512KB + BASE_128KB,
BASE_1MB - (BASE_512KB + BASE_128KB), CacheUncacheable);
Status = MtrrSetMemoryAttribute (
BASE_512KB + BASE_128KB,
BASE_1MB - (BASE_512KB + BASE_128KB),
CacheUncacheable
);
ASSERT_EFI_ERROR (Status);
//
// Set memory range from the "top of lower RAM" (RAM below 4GB) to 4GB as
// uncacheable
//
Status = MtrrSetMemoryAttribute (LowerMemorySize,
SIZE_4GB - LowerMemorySize, CacheUncacheable);
Status = MtrrSetMemoryAttribute (
LowerMemorySize,
SIZE_4GB - LowerMemorySize,
CacheUncacheable
);
ASSERT_EFI_ERROR (Status);
}
}
@ -541,7 +559,7 @@ InitializeRamRegions (
{
QemuInitializeRam ();
if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
if (mS3Supported && (mBootMode != BOOT_ON_S3_RESUME)) {
//
// This is the memory range that will be used for PEI on S3 resume
//
@ -571,7 +589,7 @@ InitializeRamRegions (
EfiACPIMemoryNVS
);
#ifdef MDE_CPU_X64
#ifdef MDE_CPU_X64
//
// Reserve the initial page tables built by the reset vector code.
//
@ -579,11 +597,11 @@ InitializeRamRegions (
// resume, it must be reserved as ACPI NVS.
//
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),
(UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),
(EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32 (PcdOvmfSecPageTablesBase),
(UINT64)(UINTN)PcdGet32 (PcdOvmfSecPageTablesSize),
EfiACPIMemoryNVS
);
#endif
#endif
}
if (mBootMode != BOOT_ON_S3_RESUME) {
@ -599,18 +617,18 @@ InitializeRamRegions (
// such that they would overlap the LockBox storage.
//
ZeroMem (
(VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)
(VOID *)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINTN)PcdGet32 (PcdOvmfLockBoxStorageSize)
);
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),
(EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageBase),
(UINT64)(UINTN)PcdGet32 (PcdOvmfLockBoxStorageSize),
mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
);
}
if (FeaturePcdGet (PcdSmmSmramRequire)) {
UINT32 TsegSize;
UINT32 TsegSize;
//
// Make sure the TSEG area that we reported as a reserved memory resource
@ -618,7 +636,7 @@ InitializeRamRegions (
//
TsegSize = mQ35TsegMbytes * SIZE_1MB;
BuildMemoryAllocationHob (
GetSystemMemorySizeBelow4gb() - TsegSize,
GetSystemMemorySizeBelow4gb () - TsegSize,
TsegSize,
EfiReservedMemoryType
);

203
OvmfPkg/Bhyve/PlatformPei/Platform.c
View File

@ -36,7 +36,7 @@
#include "Platform.h"
#include "Cmos.h"
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiACPIMemoryNVS, 0x004 },
{ EfiACPIReclaimMemory, 0x008 },
{ EfiReservedMemoryType, 0x004 },
@ -47,8 +47,7 @@ EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiMaxMemoryType, 0x000 }
};
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMasterBootModePpiGuid,
@ -56,27 +55,26 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
}
};
UINT16 mHostBridgeDevId;
UINT16 mHostBridgeDevId;
EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
BOOLEAN mS3Supported = FALSE;
BOOLEAN mS3Supported = FALSE;
UINT32 mMaxCpuCount;
UINT32 mMaxCpuCount;
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_MAPPED_IO,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
@ -84,23 +82,23 @@ AddIoMemoryBaseSizeHob (
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_RESERVED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
(Cacheable ?
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE :
0
) |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
(Cacheable ?
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE :
0
) |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
@ -108,53 +106,50 @@ AddReservedMemoryBaseSizeHob (
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
}
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
MemMapInitialization (
VOID
)
{
UINT64 PciIoBase;
UINT64 PciIoSize;
RETURN_STATUS PcdStatus;
UINT64 PciIoBase;
UINT64 PciIoSize;
RETURN_STATUS PcdStatus;
PciIoBase = 0xC000;
PciIoSize = 0x4000;
@ -165,7 +160,7 @@ MemMapInitialization (
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
sizeof (mDefaultMemoryTypeInformation)
);
//
@ -179,7 +174,7 @@ MemMapInitialization (
UINT32 PciBase;
UINT32 PciSize;
TopOfLowRam = GetSystemMemorySizeBelow4gb ();
TopOfLowRam = GetSystemMemorySizeBelow4gb ();
PciExBarBase = 0;
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
@ -192,8 +187,9 @@ MemMapInitialization (
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
} else {
PciBase = (UINT32)PcdGet64 (PcdPciMmio32Base);
if (PciBase == 0)
if (PciBase == 0) {
PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
}
}
//
@ -242,10 +238,14 @@ MemMapInitialization (
// uncacheable reserved memory right here.
//
AddReservedMemoryBaseSizeHob (PciExBarBase, SIZE_256MB, FALSE);
BuildMemoryAllocationHob (PciExBarBase, SIZE_256MB,
EfiReservedMemoryType);
BuildMemoryAllocationHob (
PciExBarBase,
SIZE_256MB,
EfiReservedMemoryType
);
}
AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
AddIoMemoryBaseSizeHob (PcdGet32 (PcdCpuLocalApicBaseAddress), SIZE_1MB);
//
// On Q35, the IO Port space is available for PCI resource allocations from
@ -287,8 +287,8 @@ PciExBarInitialization (
)
{
union {
UINT64 Uint64;
UINT32 Uint32[2];
UINT64 Uint64;
UINT32 Uint32[2];
} PciExBarBase;
//
@ -327,13 +327,13 @@ MiscInitialization (
VOID
)
{
UINTN PmCmd;
UINTN Pmba;
UINT32 PmbaAndVal;
UINT32 PmbaOrVal;
UINTN AcpiCtlReg;
UINT8 AcpiEnBit;
RETURN_STATUS PcdStatus;
UINTN PmCmd;
UINTN Pmba;
UINT32 PmbaAndVal;
UINT32 PmbaOrVal;
UINTN AcpiCtlReg;
UINT8 AcpiEnBit;
RETURN_STATUS PcdStatus;
//
// Disable A20 Mask
@ -370,11 +370,16 @@ MiscInitialization (
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, mHostBridgeDevId));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
mHostBridgeDevId
));
ASSERT (FALSE);
return;
}
PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, mHostBridgeDevId);
ASSERT_RETURN_ERROR (PcdStatus);
@ -417,17 +422,17 @@ MiscInitialization (
}
}
VOID
BootModeInitialization (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
if (CmosRead8 (0xF) == 0xFE) {
mBootMode = BOOT_ON_S3_RESUME;
}
CmosWrite8 (0xF, 0x00);
Status = PeiServicesSetBootMode (mBootMode);
@ -437,13 +442,12 @@ BootModeInitialization (
ASSERT_EFI_ERROR (Status);
}
VOID
ReserveEmuVariableNvStore (
)
{
EFI_PHYSICAL_ADDRESS VariableStore;
RETURN_STATUS PcdStatus;
EFI_PHYSICAL_ADDRESS VariableStore;
RETURN_STATUS PcdStatus;
//
// Allocate storage for NV variables early on so it will be
@ -453,25 +457,25 @@ ReserveEmuVariableNvStore (
//
VariableStore =
(EFI_PHYSICAL_ADDRESS)(UINTN)
AllocateRuntimePages (
EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize))
);
DEBUG ((DEBUG_INFO,
"Reserved variable store memory: 0x%lX; size: %dkb\n",
VariableStore,
(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
));
AllocateRuntimePages (
EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize))
);
DEBUG ((
DEBUG_INFO,
"Reserved variable store memory: 0x%lX; size: %dkb\n",
VariableStore,
(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
));
PcdStatus = PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore);
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID
DebugDumpCmos (
VOID
)
{
UINT32 Loop;
UINT32 Loop;
DEBUG ((DEBUG_INFO, "CMOS:\n"));
@ -479,6 +483,7 @@ DebugDumpCmos (
if ((Loop % 0x10) == 0) {
DEBUG ((DEBUG_INFO, "%02x:", Loop));
}
DEBUG ((DEBUG_INFO, " %02x", CmosRead8 (Loop)));
if ((Loop % 0x10) == 0xf) {
DEBUG ((DEBUG_INFO, "\n"));
@ -486,27 +491,34 @@ DebugDumpCmos (
}
}
VOID
S3Verification (
VOID
)
{
#if defined (MDE_CPU_X64)
#if defined (MDE_CPU_X64)
if (FeaturePcdGet (PcdSmmSmramRequire) && mS3Supported) {
DEBUG ((DEBUG_ERROR,
"%a: S3Resume2Pei doesn't support X64 PEI + SMM yet.\n", __FUNCTION__));
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"%a: S3Resume2Pei doesn't support X64 PEI + SMM yet.\n",
__FUNCTION__
));
DEBUG ((
DEBUG_ERROR,
"%a: Please disable S3 on the QEMU command line (see the README),\n",
__FUNCTION__));
DEBUG ((DEBUG_ERROR,
"%a: or build OVMF with \"OvmfPkgIa32X64.dsc\".\n", __FUNCTION__));
__FUNCTION__
));
DEBUG ((
DEBUG_ERROR,
"%a: or build OVMF with \"OvmfPkgIa32X64.dsc\".\n",
__FUNCTION__
));
ASSERT (FALSE);
CpuDeadLoop ();
}
#endif
}
#endif
}
/**
Fetch the number of boot CPUs from QEMU and expose it to UefiCpuPkg modules.
@ -517,8 +529,8 @@ MaxCpuCountInitialization (
VOID
)
{
UINT16 ProcessorCount = 0;
RETURN_STATUS PcdStatus;
UINT16 ProcessorCount = 0;
RETURN_STATUS PcdStatus;
//
// If the fw_cfg key or fw_cfg entirely is unavailable, load mMaxCpuCount
@ -528,6 +540,7 @@ MaxCpuCountInitialization (
mMaxCpuCount = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
return;
}
//
// Otherwise, set mMaxCpuCount to the value reported by QEMU.
//
@ -542,11 +555,14 @@ MaxCpuCountInitialization (
ASSERT_RETURN_ERROR (PcdStatus);
PcdStatus = PcdSet32S (PcdCpuApInitTimeOutInMicroSeconds, MAX_UINT32);
ASSERT_RETURN_ERROR (PcdStatus);
DEBUG ((DEBUG_INFO, "%a: QEMU reports %d processor(s)\n", __FUNCTION__,
ProcessorCount));
DEBUG ((
DEBUG_INFO,
"%a: QEMU reports %d processor(s)\n",
__FUNCTION__,
ProcessorCount
));
}
/**
Perform Platform PEI initialization.
@ -596,6 +612,7 @@ InitializePlatform (
if (!FeaturePcdGet (PcdSmmSmramRequire)) {
ReserveEmuVariableNvStore ();
}
PeiFvInitialization ();
MemMapInitialization ();
NoexecDxeInitialization ();

38
OvmfPkg/Bhyve/PlatformPei/Platform.h
View File

@ -14,33 +14,33 @@
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize,
BOOLEAN Cacheable
);
VOID
@ -113,25 +113,25 @@ AmdSevInitialize (
VOID
);
extern BOOLEAN mXen;
extern BOOLEAN mXen;
VOID
XenPublishRamRegions (
VOID
);
extern EFI_BOOT_MODE mBootMode;
extern EFI_BOOT_MODE mBootMode;
extern BOOLEAN mS3Supported;
extern BOOLEAN mS3Supported;
extern UINT8 mPhysMemAddressWidth;
extern UINT8 mPhysMemAddressWidth;
extern UINT32 mMaxCpuCount;
extern UINT32 mMaxCpuCount;
extern UINT16 mHostBridgeDevId;
extern UINT16 mHostBridgeDevId;
extern BOOLEAN mQ35SmramAtDefaultSmbase;
extern BOOLEAN mQ35SmramAtDefaultSmbase;
extern UINT32 mQemuUc32Base;
extern UINT32 mQemuUc32Base;
#endif // _PLATFORM_PEI_H_INCLUDED_

23
OvmfPkg/Bhyve/SmbiosPlatformDxe/Bhyve.c
View File

@ -7,8 +7,8 @@
#include "SmbiosPlatformDxe.h"
#define BHYVE_SMBIOS_PHYSICAL_ADDRESS 0x000F0000
#define BHYVE_SMBIOS_PHYSICAL_END 0x000FFFFF
#define BHYVE_SMBIOS_PHYSICAL_ADDRESS 0x000F0000
#define BHYVE_SMBIOS_PHYSICAL_END 0x000FFFFF
/**
Locates the bhyve SMBIOS data if it exists
@ -24,18 +24,17 @@ GetBhyveSmbiosTables (
UINT8 *BhyveSmbiosPtr;
SMBIOS_TABLE_ENTRY_POINT *BhyveSmbiosEntryPointStructure;
for (BhyveSmbiosPtr = (UINT8*)(UINTN) BHYVE_SMBIOS_PHYSICAL_ADDRESS;
BhyveSmbiosPtr < (UINT8*)(UINTN) BHYVE_SMBIOS_PHYSICAL_END;
BhyveSmbiosPtr += 0x10) {
BhyveSmbiosEntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *) BhyveSmbiosPtr;
if (!AsciiStrnCmp ((CHAR8 *) BhyveSmbiosEntryPointStructure->AnchorString, "_SM_", 4) &&
!AsciiStrnCmp ((CHAR8 *) BhyveSmbiosEntryPointStructure->IntermediateAnchorString, "_DMI_", 5) &&
IsEntryPointStructureValid (BhyveSmbiosEntryPointStructure)) {
for (BhyveSmbiosPtr = (UINT8 *)(UINTN)BHYVE_SMBIOS_PHYSICAL_ADDRESS;
BhyveSmbiosPtr < (UINT8 *)(UINTN)BHYVE_SMBIOS_PHYSICAL_END;
BhyveSmbiosPtr += 0x10)
{
BhyveSmbiosEntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *)BhyveSmbiosPtr;
if (!AsciiStrnCmp ((CHAR8 *)BhyveSmbiosEntryPointStructure->AnchorString, "_SM_", 4) &&
!AsciiStrnCmp ((CHAR8 *)BhyveSmbiosEntryPointStructure->IntermediateAnchorString, "_DMI_", 5) &&
IsEntryPointStructureValid (BhyveSmbiosEntryPointStructure))
{
return BhyveSmbiosEntryPointStructure;
}
}

91
OvmfPkg/Bhyve/SmbiosPlatformDxe/SmbiosPlatformDxe.c
View File

@ -20,34 +20,34 @@
//
#pragma pack(1)
typedef struct {
SMBIOS_TABLE_TYPE0 Base;
UINT8 Strings[sizeof(TYPE0_STRINGS)];
SMBIOS_TABLE_TYPE0 Base;
UINT8 Strings[sizeof (TYPE0_STRINGS)];
} OVMF_TYPE0;
#pragma pack()
STATIC CONST OVMF_TYPE0 mOvmfDefaultType0 = {
STATIC CONST OVMF_TYPE0 mOvmfDefaultType0 = {
{
// SMBIOS_STRUCTURE Hdr
{
EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type
sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length
},
1, // SMBIOS_TABLE_STRING Vendor
2, // SMBIOS_TABLE_STRING BiosVersion
0xE800,// UINT16 BiosSegment
3, // SMBIOS_TABLE_STRING BiosReleaseDate
0, // UINT8 BiosSize
1, // SMBIOS_TABLE_STRING Vendor
2, // SMBIOS_TABLE_STRING BiosVersion
0xE800, // UINT16 BiosSegment
3, // SMBIOS_TABLE_STRING BiosReleaseDate
0, // UINT8 BiosSize
{ // MISC_BIOS_CHARACTERISTICS BiosCharacteristics
0, // Reserved :2
0, // Unknown :1
1, // BiosCharacteristicsNotSupported :1
// Remaining BiosCharacteristics bits left unset :60
0, // Reserved :2
0, // Unknown :1
1, // BiosCharacteristicsNotSupported :1
// Remaining BiosCharacteristics bits left unset :60
},
{ // BIOSCharacteristicsExtensionBytes[2]
0, // BiosReserved
0x1C // SystemReserved = VirtualMachineSupported |
// UefiSpecificationSupported |
// TargetContentDistributionEnabled
0, // BiosReserved
0x1C // SystemReserved = VirtualMachineSupported |
// UefiSpecificationSupported |
// TargetContentDistributionEnabled
},
0, // UINT8 SystemBiosMajorRelease
0, // UINT8 SystemBiosMinorRelease
@ -58,7 +58,6 @@ STATIC CONST OVMF_TYPE0 mOvmfDefaultType0 = {
TYPE0_STRINGS
};
/**
Validates the SMBIOS entry point structure
@ -73,17 +72,17 @@ IsEntryPointStructureValid (
IN SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure
)
{
UINTN Index;
UINT8 Length;
UINT8 Checksum;
UINT8 *BytePtr;
UINTN Index;
UINT8 Length;
UINT8 Checksum;
UINT8 *BytePtr;
BytePtr = (UINT8*) EntryPointStructure;
Length = EntryPointStructure->EntryPointLength;
BytePtr = (UINT8 *)EntryPointStructure;
Length = EntryPointStructure->EntryPointLength;
Checksum = 0;
for (Index = 0; Index < Length; Index++) {
Checksum = Checksum + (UINT8) BytePtr[Index];
Checksum = Checksum + (UINT8)BytePtr[Index];
}
if (Checksum != 0) {
@ -93,7 +92,6 @@ IsEntryPointStructureValid (
}
}
/**
Get SMBIOS record length.
@ -102,7 +100,7 @@ IsEntryPointStructureValid (
**/
UINTN
SmbiosTableLength (
IN SMBIOS_STRUCTURE_POINTER SmbiosTable
IN SMBIOS_STRUCTURE_POINTER SmbiosTable
)
{
CHAR8 *AChar;
@ -114,14 +112,14 @@ SmbiosTableLength (
// Each structure shall be terminated by a double-null (SMBIOS spec.7.1)
//
while ((*AChar != 0) || (*(AChar + 1) != 0)) {
AChar ++;
AChar++;
}
Length = ((UINTN)AChar - (UINTN)SmbiosTable.Raw + 2);
return Length;
}
/**
Install all structures from the given SMBIOS structures block
@ -131,8 +129,8 @@ SmbiosTableLength (
**/
EFI_STATUS
InstallAllStructures (
IN EFI_SMBIOS_PROTOCOL *Smbios,
IN UINT8 *TableAddress
IN EFI_SMBIOS_PROTOCOL *Smbios,
IN UINT8 *TableAddress
)
{
EFI_STATUS Status;
@ -152,12 +150,12 @@ InstallAllStructures (
// Log the SMBIOS data for this structure
//
SmbiosHandle = SmbiosTable.Hdr->Handle;
Status = Smbios->Add (
Smbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER*) SmbiosTable.Raw
);
Status = Smbios->Add (
Smbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)SmbiosTable.Raw
);
ASSERT_EFI_ERROR (Status);
if (SmbiosTable.Hdr->Type == 0) {
@ -175,19 +173,18 @@ InstallAllStructures (
// Add OVMF default Type 0 (BIOS Information) table
//
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
Status = Smbios->Add (
Smbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER*) &mOvmfDefaultType0
);
Status = Smbios->Add (
Smbios,
NULL,
&SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)&mOvmfDefaultType0
);
ASSERT_EFI_ERROR (Status);
}
return EFI_SUCCESS;
}
/**
Installs SMBIOS information for OVMF
@ -201,8 +198,8 @@ InstallAllStructures (
EFI_STATUS
EFIAPI
SmbiosTablePublishEntry (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@ -216,7 +213,7 @@ SmbiosTablePublishEntry (
Status = gBS->LocateProtocol (
&gEfiSmbiosProtocolGuid,
NULL,
(VOID**)&Smbios
(VOID **)&Smbios
);
if (EFI_ERROR (Status)) {
return Status;
@ -227,7 +224,7 @@ SmbiosTablePublishEntry (
//
EntryPointStructure = GetBhyveSmbiosTables ();
if (EntryPointStructure != NULL) {
SmbiosTables = (UINT8*)(UINTN)EntryPointStructure->TableAddress;
SmbiosTables = (UINT8 *)(UINTN)EntryPointStructure->TableAddress;
}
if (SmbiosTables != NULL) {

2
OvmfPkg/Bhyve/SmbiosPlatformDxe/SmbiosPlatformDxe.h
View File

@ -21,7 +21,6 @@
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
/**
Locates the bhyve SMBIOS data if it exists
@ -33,7 +32,6 @@ GetBhyveSmbiosTables (
VOID
);
/**
Validates the SMBIOS entry point structure

67
OvmfPkg/CompatImageLoaderDxe/CompatImageLoaderDxe.c
View File

@ -19,10 +19,10 @@
#pragma pack (1)
typedef struct {
UINT8 Type;
UINT8 Size;
UINT16 MachineType;
UINT32 EntryPoint;
UINT8 Type;
UINT8 Size;
UINT16 MachineType;
UINT32 EntryPoint;
} PE_COMPAT_TYPE1;
#pragma pack ()
@ -30,9 +30,9 @@ STATIC
BOOLEAN
EFIAPI
IsImageSupported (
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN UINT16 ImageType,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath OPTIONAL
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN UINT16 ImageType,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath OPTIONAL
)
{
return ImageType == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION;
@ -42,16 +42,16 @@ STATIC
EFI_IMAGE_ENTRY_POINT
EFIAPI
GetCompatEntryPoint (
IN EFI_PHYSICAL_ADDRESS ImageBase
IN EFI_PHYSICAL_ADDRESS ImageBase
)
{
EFI_IMAGE_DOS_HEADER *DosHdr;
UINTN PeCoffHeaderOffset;
EFI_IMAGE_NT_HEADERS32 *Pe32;
EFI_IMAGE_SECTION_HEADER *Section;
UINTN NumberOfSections;
PE_COMPAT_TYPE1 *PeCompat;
UINTN PeCompatEnd;
EFI_IMAGE_DOS_HEADER *DosHdr;
UINTN PeCoffHeaderOffset;
EFI_IMAGE_NT_HEADERS32 *Pe32;
EFI_IMAGE_SECTION_HEADER *Section;
UINTN NumberOfSections;
PE_COMPAT_TYPE1 *PeCompat;
UINTN PeCompatEnd;
DosHdr = (EFI_IMAGE_DOS_HEADER *)(UINTN)ImageBase;
if (DosHdr->e_magic != EFI_IMAGE_DOS_SIGNATURE) {
@ -59,7 +59,7 @@ GetCompatEntryPoint (
}
PeCoffHeaderOffset = DosHdr->e_lfanew;
Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)ImageBase + PeCoffHeaderOffset);
Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)ImageBase + PeCoffHeaderOffset);
Section = (EFI_IMAGE_SECTION_HEADER *)((UINTN)&Pe32->OptionalHeader +
Pe32->FileHeader.SizeOfOptionalHeader);
@ -70,22 +70,25 @@ GetCompatEntryPoint (
//
// Dereference the section contents to find the mixed mode entry point
//
PeCompat = (PE_COMPAT_TYPE1 *)((UINTN)ImageBase + Section->VirtualAddress);
PeCompat = (PE_COMPAT_TYPE1 *)((UINTN)ImageBase + Section->VirtualAddress);
PeCompatEnd = (UINTN)(VOID *)PeCompat + Section->Misc.VirtualSize;
while (PeCompat->Type != 0 && (UINTN)(VOID *)PeCompat < PeCompatEnd) {
if (PeCompat->Type == 1 &&
PeCompat->Size >= sizeof (PE_COMPAT_TYPE1) &&
EFI_IMAGE_MACHINE_TYPE_SUPPORTED (PeCompat->MachineType)) {
if ((PeCompat->Type == 1) &&
(PeCompat->Size >= sizeof (PE_COMPAT_TYPE1)) &&
EFI_IMAGE_MACHINE_TYPE_SUPPORTED (PeCompat->MachineType))
{
return (EFI_IMAGE_ENTRY_POINT)((UINTN)ImageBase + PeCompat->EntryPoint);
}
PeCompat = (PE_COMPAT_TYPE1 *)((UINTN)PeCompat + PeCompat->Size);
ASSERT ((UINTN)(VOID *)PeCompat < PeCompatEnd);
}
}
Section++;
}
return NULL;
}
@ -93,13 +96,13 @@ STATIC
EFI_STATUS
EFIAPI
RegisterImage (
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS ImageBase,
IN UINT64 ImageSize,
IN OUT EFI_IMAGE_ENTRY_POINT *EntryPoint
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS ImageBase,
IN UINT64 ImageSize,
IN OUT EFI_IMAGE_ENTRY_POINT *EntryPoint
)
{
EFI_IMAGE_ENTRY_POINT CompatEntryPoint;
EFI_IMAGE_ENTRY_POINT CompatEntryPoint;
CompatEntryPoint = GetCompatEntryPoint (ImageBase);
if (CompatEntryPoint == NULL) {
@ -114,14 +117,14 @@ STATIC
EFI_STATUS
EFIAPI
UnregisterImage (
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS ImageBase
IN EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS ImageBase
)
{
return EFI_SUCCESS;
}
STATIC EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL mCompatLoaderPeCoffEmuProtocol = {
STATIC EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL mCompatLoaderPeCoffEmuProtocol = {
IsImageSupported,
RegisterImage,
UnregisterImage,
@ -136,8 +139,10 @@ CompatImageLoaderDxeEntryPoint (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return gBS->InstallProtocolInterface (&ImageHandle,
return gBS->InstallProtocolInterface (
&ImageHandle,
&gEdkiiPeCoffImageEmulatorProtocolGuid,
EFI_NATIVE_INTERFACE,
&mCompatLoaderPeCoffEmuProtocol);
&mCompatLoaderPeCoffEmuProtocol
);
}

2
OvmfPkg/CpuHotplugSmm/ApicId.h
View File

@ -18,6 +18,6 @@ typedef UINT32 APIC_ID;
//
// The PrintLib conversion specification for formatting an APIC_ID.
//
#define FMT_APIC_ID "0x%08x"
#define FMT_APIC_ID "0x%08x"
#endif // APIC_ID_H_

313
OvmfPkg/CpuHotplugSmm/CpuHotplug.c
View File

@ -28,19 +28,19 @@
//
// We use this protocol for accessing IO Ports.
//
STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo;
STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo;
//
// The following protocol is used to report the addition or removal of a CPU to
// the SMM CPU driver (PiSmmCpuDxeSmm).
//
STATIC EFI_SMM_CPU_SERVICE_PROTOCOL *mMmCpuService;
STATIC EFI_SMM_CPU_SERVICE_PROTOCOL *mMmCpuService;
//
// These structures serve as communication side-channels between the
// EFI_SMM_CPU_SERVICE_PROTOCOL consumer (i.e., this driver) and provider
// (i.e., PiSmmCpuDxeSmm).
//
STATIC CPU_HOT_PLUG_DATA *mCpuHotPlugData;
STATIC CPU_HOT_EJECT_DATA *mCpuHotEjectData;
STATIC CPU_HOT_PLUG_DATA *mCpuHotPlugData;
STATIC CPU_HOT_EJECT_DATA *mCpuHotEjectData;
//
// SMRAM arrays for fetching the APIC IDs of processors with pending events (of
// known event types), for the time of just one MMI.
@ -56,18 +56,18 @@ STATIC CPU_HOT_EJECT_DATA *mCpuHotEjectData;
// in a single MMI. The numbers of used (populated) elements in the arrays are
// determined on every MMI separately.
//
STATIC APIC_ID *mPluggedApicIds;
STATIC APIC_ID *mToUnplugApicIds;
STATIC UINT32 *mToUnplugSelectors;
STATIC APIC_ID *mPluggedApicIds;
STATIC APIC_ID *mToUnplugApicIds;
STATIC UINT32 *mToUnplugSelectors;
//
// Address of the non-SMRAM reserved memory page that contains the Post-SMM Pen
// for hot-added CPUs.
//
STATIC UINT32 mPostSmmPenAddress;
STATIC UINT32 mPostSmmPenAddress;
//
// Represents the registration of the CPU Hotplug MMI handler.
//
STATIC EFI_HANDLE mDispatchHandle;
STATIC EFI_HANDLE mDispatchHandle;
/**
Process CPUs that have been hot-added, per QemuCpuhpCollectApicIds().
@ -93,13 +93,13 @@ STATIC EFI_HANDLE mDispatchHandle;
STATIC
EFI_STATUS
ProcessHotAddedCpus (
IN APIC_ID *PluggedApicIds,
IN UINT32 PluggedCount
IN APIC_ID *PluggedApicIds,
IN UINT32 PluggedCount
)
{
EFI_STATUS Status;
UINT32 PluggedIdx;
UINT32 NewSlot;
EFI_STATUS Status;
UINT32 PluggedIdx;
UINT32 NewSlot;
//
// The Post-SMM Pen need not be reinstalled multiple times within a single
@ -110,11 +110,11 @@ ProcessHotAddedCpus (
SmbaseReinstallPostSmmPen (mPostSmmPenAddress);
PluggedIdx = 0;
NewSlot = 0;
NewSlot = 0;
while (PluggedIdx < PluggedCount) {
APIC_ID NewApicId;
UINT32 CheckSlot;
UINTN NewProcessorNumberByProtocol;
APIC_ID NewApicId;
UINT32 CheckSlot;
UINTN NewProcessorNumberByProtocol;
NewApicId = PluggedApicIds[PluggedIdx];
@ -123,14 +123,21 @@ ProcessHotAddedCpus (
//
for (CheckSlot = 0;
CheckSlot < mCpuHotPlugData->ArrayLength;
CheckSlot++) {
CheckSlot++)
{
if (mCpuHotPlugData->ApicId[CheckSlot] == NewApicId) {
break;
}
}
if (CheckSlot < mCpuHotPlugData->ArrayLength) {
DEBUG ((DEBUG_VERBOSE, "%a: APIC ID " FMT_APIC_ID " was hot-plugged "
"before; ignoring it\n", __FUNCTION__, NewApicId));
DEBUG ((
DEBUG_VERBOSE,
"%a: APIC ID " FMT_APIC_ID " was hot-plugged "
"before; ignoring it\n",
__FUNCTION__,
NewApicId
));
PluggedIdx++;
continue;
}
@ -139,12 +146,18 @@ ProcessHotAddedCpus (
// Find the first empty slot in CPU_HOT_PLUG_DATA.
//
while (NewSlot < mCpuHotPlugData->ArrayLength &&
mCpuHotPlugData->ApicId[NewSlot] != MAX_UINT64) {
mCpuHotPlugData->ApicId[NewSlot] != MAX_UINT64)
{
NewSlot++;
}
if (NewSlot == mCpuHotPlugData->ArrayLength) {
DEBUG ((DEBUG_ERROR, "%a: no room for APIC ID " FMT_APIC_ID "\n",
__FUNCTION__, NewApicId));
DEBUG ((
DEBUG_ERROR,
"%a: no room for APIC ID " FMT_APIC_ID "\n",
__FUNCTION__,
NewApicId
));
return EFI_OUT_OF_RESOURCES;
}
@ -156,8 +169,11 @@ ProcessHotAddedCpus (
//
// Relocate the SMBASE of the new CPU.
//
Status = SmbaseRelocate (NewApicId, mCpuHotPlugData->SmBase[NewSlot],
mPostSmmPenAddress);
Status = SmbaseRelocate (
NewApicId,
mCpuHotPlugData->SmBase[NewSlot],
mPostSmmPenAddress
);
if (EFI_ERROR (Status)) {
goto RevokeNewSlot;
}
@ -165,18 +181,31 @@ ProcessHotAddedCpus (
//
// Add the new CPU with EFI_SMM_CPU_SERVICE_PROTOCOL.
//
Status = mMmCpuService->AddProcessor (mMmCpuService, NewApicId,
&NewProcessorNumberByProtocol);
Status = mMmCpuService->AddProcessor (
mMmCpuService,
NewApicId,
&NewProcessorNumberByProtocol
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: AddProcessor(" FMT_APIC_ID "): %r\n",
__FUNCTION__, NewApicId, Status));
DEBUG ((
DEBUG_ERROR,
"%a: AddProcessor(" FMT_APIC_ID "): %r\n",
__FUNCTION__,
NewApicId,
Status
));
goto RevokeNewSlot;
}
DEBUG ((DEBUG_INFO, "%a: hot-added APIC ID " FMT_APIC_ID ", SMBASE 0x%Lx, "
"EFI_SMM_CPU_SERVICE_PROTOCOL assigned number %Lu\n", __FUNCTION__,
NewApicId, (UINT64)mCpuHotPlugData->SmBase[NewSlot],
(UINT64)NewProcessorNumberByProtocol));
DEBUG ((
DEBUG_INFO,
"%a: hot-added APIC ID " FMT_APIC_ID ", SMBASE 0x%Lx, "
"EFI_SMM_CPU_SERVICE_PROTOCOL assigned number %Lu\n",
__FUNCTION__,
NewApicId,
(UINT64)mCpuHotPlugData->SmBase[NewSlot],
(UINT64)NewProcessorNumberByProtocol
));
NewSlot++;
PluggedIdx++;
@ -210,11 +239,11 @@ CheckIfBsp (
VOID
)
{
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
BOOLEAN IsBsp;
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
BOOLEAN IsBsp;
ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
IsBsp = (BOOLEAN)(ApicBaseMsr.Bits.BSP == 1);
IsBsp = (BOOLEAN)(ApicBaseMsr.Bits.BSP == 1);
return IsBsp;
}
@ -238,13 +267,13 @@ CheckIfBsp (
VOID
EFIAPI
EjectCpu (
IN UINTN ProcessorNum
IN UINTN ProcessorNum
)
{
UINT64 QemuSelector;
UINT64 QemuSelector;
if (CheckIfBsp ()) {
UINT32 Idx;
UINT32 Idx;
for (Idx = 0; Idx < mCpuHotEjectData->ArrayLength; Idx++) {
QemuSelector = mCpuHotEjectData->QemuSelectorMap[Idx];
@ -258,7 +287,7 @@ EjectCpu (
//
// Tell QEMU to context-switch it out.
//
QemuCpuhpWriteCpuSelector (mMmCpuIo, (UINT32) QemuSelector);
QemuCpuhpWriteCpuSelector (mMmCpuIo, (UINT32)QemuSelector);
QemuCpuhpWriteCpuStatus (mMmCpuIo, QEMU_CPUHP_STAT_EJECT);
//
@ -277,8 +306,14 @@ EjectCpu (
mCpuHotEjectData->QemuSelectorMap[Idx] =
CPU_EJECT_QEMU_SELECTOR_INVALID;
DEBUG ((DEBUG_INFO, "%a: Unplugged ProcessorNum %u, "
"QemuSelector %Lu\n", __FUNCTION__, Idx, QemuSelector));
DEBUG ((
DEBUG_INFO,
"%a: Unplugged ProcessorNum %u, "
"QemuSelector %Lu\n",
__FUNCTION__,
Idx,
QemuSelector
));
}
}
@ -330,7 +365,7 @@ EjectCpu (
//
// Keep them penned here until the BSP tells QEMU to eject them.
//
for (;;) {
for ( ; ;) {
DisableInterrupts ();
CpuSleep ();
}
@ -371,21 +406,21 @@ EjectCpu (
STATIC
EFI_STATUS
UnplugCpus (
IN APIC_ID *ToUnplugApicIds,
IN UINT32 *ToUnplugSelectors,
IN UINT32 ToUnplugCount
IN APIC_ID *ToUnplugApicIds,
IN UINT32 *ToUnplugSelectors,
IN UINT32 ToUnplugCount
)
{
EFI_STATUS Status;
UINT32 ToUnplugIdx;
UINT32 EjectCount;
UINTN ProcessorNum;
EFI_STATUS Status;
UINT32 ToUnplugIdx;
UINT32 EjectCount;
UINTN ProcessorNum;
ToUnplugIdx = 0;
EjectCount = 0;
EjectCount = 0;
while (ToUnplugIdx < ToUnplugCount) {
APIC_ID RemoveApicId;
UINT32 QemuSelector;
APIC_ID RemoveApicId;
UINT32 QemuSelector;
RemoveApicId = ToUnplugApicIds[ToUnplugIdx];
QemuSelector = ToUnplugSelectors[ToUnplugIdx];
@ -404,7 +439,8 @@ UnplugCpus (
for (ProcessorNum = 0;
ProcessorNum < mCpuHotPlugData->ArrayLength;
ProcessorNum++) {
ProcessorNum++)
{
if (mCpuHotPlugData->ApicId[ProcessorNum] == RemoveApicId) {
break;
}
@ -414,8 +450,13 @@ UnplugCpus (
// Ignore the unplug if APIC ID not found
//
if (ProcessorNum == mCpuHotPlugData->ArrayLength) {
DEBUG ((DEBUG_VERBOSE, "%a: did not find APIC ID " FMT_APIC_ID
" to unplug\n", __FUNCTION__, RemoveApicId));
DEBUG ((
DEBUG_VERBOSE,
"%a: did not find APIC ID " FMT_APIC_ID
" to unplug\n",
__FUNCTION__,
RemoveApicId
));
ToUnplugIdx++;
continue;
}
@ -425,13 +466,19 @@ UnplugCpus (
//
Status = mMmCpuService->RemoveProcessor (mMmCpuService, ProcessorNum);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: RemoveProcessor(" FMT_APIC_ID "): %r\n",
__FUNCTION__, RemoveApicId, Status));
DEBUG ((
DEBUG_ERROR,
"%a: RemoveProcessor(" FMT_APIC_ID "): %r\n",
__FUNCTION__,
RemoveApicId,
Status
));
return Status;
}
if (mCpuHotEjectData->QemuSelectorMap[ProcessorNum] !=
CPU_EJECT_QEMU_SELECTOR_INVALID) {
CPU_EJECT_QEMU_SELECTOR_INVALID)
{
//
// mCpuHotEjectData->QemuSelectorMap[ProcessorNum] is set to
// CPU_EJECT_QEMU_SELECTOR_INVALID when mCpuHotEjectData->QemuSelectorMap
@ -442,9 +489,15 @@ UnplugCpus (
// never match more than one APIC ID -- nor, by transitivity, designate
// more than one QemuSelector -- in a single invocation of UnplugCpus().
//
DEBUG ((DEBUG_ERROR, "%a: ProcessorNum %Lu maps to QemuSelector %Lu, "
"cannot also map to %u\n", __FUNCTION__, (UINT64)ProcessorNum,
mCpuHotEjectData->QemuSelectorMap[ProcessorNum], QemuSelector));
DEBUG ((
DEBUG_ERROR,
"%a: ProcessorNum %Lu maps to QemuSelector %Lu, "
"cannot also map to %u\n",
__FUNCTION__,
(UINT64)ProcessorNum,
mCpuHotEjectData->QemuSelectorMap[ProcessorNum],
QemuSelector
));
return EFI_ALREADY_STARTED;
}
@ -454,9 +507,15 @@ UnplugCpus (
//
mCpuHotEjectData->QemuSelectorMap[ProcessorNum] = (UINT64)QemuSelector;
DEBUG ((DEBUG_INFO, "%a: Started hot-unplug on ProcessorNum %Lu, APIC ID "
FMT_APIC_ID ", QemuSelector %u\n", __FUNCTION__, (UINT64)ProcessorNum,
RemoveApicId, QemuSelector));
DEBUG ((
DEBUG_INFO,
"%a: Started hot-unplug on ProcessorNum %Lu, APIC ID "
FMT_APIC_ID ", QemuSelector %u\n",
__FUNCTION__,
(UINT64)ProcessorNum,
RemoveApicId,
QemuSelector
));
EjectCount++;
ToUnplugIdx++;
@ -539,16 +598,16 @@ STATIC
EFI_STATUS
EFIAPI
CpuHotplugMmi (
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *Context OPTIONAL,
IN OUT VOID *CommBuffer OPTIONAL,
IN OUT UINTN *CommBufferSize OPTIONAL
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *Context OPTIONAL,
IN OUT VOID *CommBuffer OPTIONAL,
IN OUT UINTN *CommBufferSize OPTIONAL
)
{
EFI_STATUS Status;
UINT8 ApmControl;
UINT32 PluggedCount;
UINT32 ToUnplugCount;
EFI_STATUS Status;
UINT8 ApmControl;
UINT32 PluggedCount;
UINT32 ToUnplugCount;
//
// Assert that we are entering this function due to our root MMI handler
@ -565,11 +624,20 @@ CpuHotplugMmi (
// Read the MMI command value from the APM Control Port, to see if this is an
// MMI we should care about.
//
Status = mMmCpuIo->Io.Read (mMmCpuIo, MM_IO_UINT8, ICH9_APM_CNT, 1,
&ApmControl);
Status = mMmCpuIo->Io.Read (
mMmCpuIo,
MM_IO_UINT8,
ICH9_APM_CNT,
1,
&ApmControl
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to read ICH9_APM_CNT: %r\n", __FUNCTION__,
Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to read ICH9_APM_CNT: %r\n",
__FUNCTION__,
Status
));
//
// We couldn't even determine if the MMI was for us or not.
//
@ -628,21 +696,20 @@ Fatal:
return EFI_INTERRUPT_PENDING;
}
//
// Entry point function of this driver.
//
EFI_STATUS
EFIAPI
CpuHotplugEntry (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINTN Len;
UINTN Size;
UINTN SizeSel;
EFI_STATUS Status;
UINTN Len;
UINTN Size;
UINTN SizeSel;
//
// This module should only be included when SMM support is required.
@ -663,17 +730,28 @@ CpuHotplugEntry (
// First, collect the protocols needed later. All of these protocols are
// listed in our module DEPEX.
//
Status = gMmst->MmLocateProtocol (&gEfiMmCpuIoProtocolGuid,
NULL /* Registration */, (VOID **)&mMmCpuIo);
Status = gMmst->MmLocateProtocol (
&gEfiMmCpuIoProtocolGuid,
NULL /* Registration */,
(VOID **)&mMmCpuIo
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: locate MmCpuIo: %r\n", __FUNCTION__, Status));
goto Fatal;
}
Status = gMmst->MmLocateProtocol (&gEfiSmmCpuServiceProtocolGuid,
NULL /* Registration */, (VOID **)&mMmCpuService);
Status = gMmst->MmLocateProtocol (
&gEfiSmmCpuServiceProtocolGuid,
NULL /* Registration */,
(VOID **)&mMmCpuService
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: locate MmCpuService: %r\n", __FUNCTION__,
Status));
DEBUG ((
DEBUG_ERROR,
"%a: locate MmCpuService: %r\n",
__FUNCTION__,
Status
));
goto Fatal;
}
@ -684,7 +762,7 @@ CpuHotplugEntry (
// - PcdCpuHotEjectDataAddress to CPU_HOT_EJECT_DATA in SMRAM, if the
// possible CPU count is greater than 1.
//
mCpuHotPlugData = (VOID *)(UINTN)PcdGet64 (PcdCpuHotPlugDataAddress);
mCpuHotPlugData = (VOID *)(UINTN)PcdGet64 (PcdCpuHotPlugDataAddress);
mCpuHotEjectData = (VOID *)(UINTN)PcdGet64 (PcdCpuHotEjectDataAddress);
if (mCpuHotPlugData == NULL) {
@ -692,6 +770,7 @@ CpuHotplugEntry (
DEBUG ((DEBUG_ERROR, "%a: CPU_HOT_PLUG_DATA: %r\n", __FUNCTION__, Status));
goto Fatal;
}
//
// If the possible CPU count is 1, there's nothing for this driver to do.
//
@ -706,6 +785,7 @@ CpuHotplugEntry (
} else {
Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: CPU_HOT_EJECT_DATA: %r\n", __FUNCTION__, Status));
goto Fatal;
@ -716,25 +796,38 @@ CpuHotplugEntry (
//
if (RETURN_ERROR (SafeUintnSub (mCpuHotPlugData->ArrayLength, 1, &Len)) ||
RETURN_ERROR (SafeUintnMult (sizeof (APIC_ID), Len, &Size)) ||
RETURN_ERROR (SafeUintnMult (sizeof (UINT32), Len, &SizeSel))) {
RETURN_ERROR (SafeUintnMult (sizeof (UINT32), Len, &SizeSel)))
{
Status = EFI_ABORTED;
DEBUG ((DEBUG_ERROR, "%a: invalid CPU_HOT_PLUG_DATA\n", __FUNCTION__));
goto Fatal;
}
Status = gMmst->MmAllocatePool (EfiRuntimeServicesData, Size,
(VOID **)&mPluggedApicIds);
Status = gMmst->MmAllocatePool (
EfiRuntimeServicesData,
Size,
(VOID **)&mPluggedApicIds
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Status));
goto Fatal;
}
Status = gMmst->MmAllocatePool (EfiRuntimeServicesData, Size,
(VOID **)&mToUnplugApicIds);
Status = gMmst->MmAllocatePool (
EfiRuntimeServicesData,
Size,
(VOID **)&mToUnplugApicIds
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Status));
goto ReleasePluggedApicIds;
}
Status = gMmst->MmAllocatePool (EfiRuntimeServicesData, SizeSel,
(VOID **)&mToUnplugSelectors);
Status = gMmst->MmAllocatePool (
EfiRuntimeServicesData,
SizeSel,
(VOID **)&mToUnplugSelectors
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Status));
goto ReleaseToUnplugApicIds;
@ -743,8 +836,10 @@ CpuHotplugEntry (
//
// Allocate the Post-SMM Pen for hot-added CPUs.
//
Status = SmbaseAllocatePostSmmPen (&mPostSmmPenAddress,
SystemTable->BootServices);
Status = SmbaseAllocatePostSmmPen (
&mPostSmmPenAddress,
SystemTable->BootServices
);
if (EFI_ERROR (Status)) {
goto ReleaseToUnplugSelectors;
}
@ -776,8 +871,12 @@ CpuHotplugEntry (
QemuCpuhpWriteCommand (mMmCpuIo, QEMU_CPUHP_CMD_GET_PENDING);
if (QemuCpuhpReadCommandData2 (mMmCpuIo) != 0) {
Status = EFI_NOT_FOUND;
DEBUG ((DEBUG_ERROR, "%a: modern CPU hotplug interface: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: modern CPU hotplug interface: %r\n",
__FUNCTION__,
Status
));
goto ReleasePostSmmPen;
}
@ -790,8 +889,12 @@ CpuHotplugEntry (
&mDispatchHandle
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__,
Status));
DEBUG ((
DEBUG_ERROR,
"%a: MmiHandlerRegister(): %r\n",
__FUNCTION__,
Status
));
goto ReleasePostSmmPen;
}

6
OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h
View File

@ -29,18 +29,18 @@ typedef struct {
// This field is intentionally wider than APIC_ID (UINT32) because we need a
// "gate locked" value that is different from all possible APIC_IDs.
//
UINT64 ApicIdGate;
UINT64 ApicIdGate;
//
// The new SMBASE value for the hot-added CPU to set in the SMRAM Save State
// Map, before leaving SMM with the RSM instruction.
//
UINT32 NewSmbase;
UINT32 NewSmbase;
//
// The hot-added CPU sets this field to 1 right before executing the RSM
// instruction. This tells the SMM Monarch to proceed to polling the last
// byte of the normal RAM reserved page (Post-SMM Pen).
//
UINT8 AboutToLeaveSmm;
UINT8 AboutToLeaveSmm;
} FIRST_SMI_HANDLER_CONTEXT;
#pragma pack ()

205
OvmfPkg/CpuHotplugSmm/QemuCpuhp.c
View File

@ -21,83 +21,86 @@
UINT32
QemuCpuhpReadCommandData2 (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
)
{
UINT32 CommandData2;
EFI_STATUS Status;
UINT32 CommandData2;
EFI_STATUS Status;
CommandData2 = 0;
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT32,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CMD_DATA2,
1,
&CommandData2
);
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT32,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CMD_DATA2,
1,
&CommandData2
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status));
ASSERT (FALSE);
CpuDeadLoop ();
}
return CommandData2;
}
UINT8
QemuCpuhpReadCpuStatus (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
)
{
UINT8 CpuStatus;
EFI_STATUS Status;
UINT8 CpuStatus;
EFI_STATUS Status;
CpuStatus = 0;
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT8,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CPU_STAT,
1,
&CpuStatus
);
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT8,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CPU_STAT,
1,
&CpuStatus
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status));
ASSERT (FALSE);
CpuDeadLoop ();
}
return CpuStatus;
}
UINT32
QemuCpuhpReadCommandData (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
)
{
UINT32 CommandData;
EFI_STATUS Status;
UINT32 CommandData;
EFI_STATUS Status;
CommandData = 0;
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT32,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_RW_CMD_DATA,
1,
&CommandData
);
Status = MmCpuIo->Io.Read (
MmCpuIo,
MM_IO_UINT32,
ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_RW_CMD_DATA,
1,
&CommandData
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status));
ASSERT (FALSE);
CpuDeadLoop ();
}
return CommandData;
}
VOID
QemuCpuhpWriteCpuSelector (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 Selector
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 Selector
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = MmCpuIo->Io.Write (
MmCpuIo,
@ -115,11 +118,11 @@ QemuCpuhpWriteCpuSelector (
VOID
QemuCpuhpWriteCpuStatus (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 CpuStatus
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 CpuStatus
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = MmCpuIo->Io.Write (
MmCpuIo,
@ -137,11 +140,11 @@ QemuCpuhpWriteCpuStatus (
VOID
QemuCpuhpWriteCommand (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 Command
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 Command
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = MmCpuIo->Io.Write (
MmCpuIo,
@ -206,33 +209,33 @@ QemuCpuhpWriteCommand (
**/
EFI_STATUS
QemuCpuhpCollectApicIds (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 PossibleCpuCount,
IN UINT32 ApicIdCount,
OUT APIC_ID *PluggedApicIds,
OUT UINT32 *PluggedCount,
OUT APIC_ID *ToUnplugApicIds,
OUT UINT32 *ToUnplugSelectors,
OUT UINT32 *ToUnplugCount
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 PossibleCpuCount,
IN UINT32 ApicIdCount,
OUT APIC_ID *PluggedApicIds,
OUT UINT32 *PluggedCount,
OUT APIC_ID *ToUnplugApicIds,
OUT UINT32 *ToUnplugSelectors,
OUT UINT32 *ToUnplugCount
)
{
UINT32 CurrentSelector;
UINT32 CurrentSelector;
if (PossibleCpuCount == 0 || ApicIdCount == 0) {
if ((PossibleCpuCount == 0) || (ApicIdCount == 0)) {
return EFI_INVALID_PARAMETER;
}
*PluggedCount = 0;
*PluggedCount = 0;
*ToUnplugCount = 0;
CurrentSelector = 0;
do {
UINT32 PendingSelector;
UINT8 CpuStatus;
APIC_ID *ExtendIds;
UINT32 *ExtendSels;
UINT32 *ExtendCount;
APIC_ID NewApicId;
UINT32 PendingSelector;
UINT8 CpuStatus;
APIC_ID *ExtendIds;
UINT32 *ExtendSels;
UINT32 *ExtendCount;
APIC_ID NewApicId;
//
// Write CurrentSelector (which is valid) to the CPU selector register.
@ -259,10 +262,17 @@ QemuCpuhpCollectApicIds (
QemuCpuhpWriteCommand (MmCpuIo, QEMU_CPUHP_CMD_GET_PENDING);
PendingSelector = QemuCpuhpReadCommandData (MmCpuIo);
if (PendingSelector < CurrentSelector) {
DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=%u PendingSelector=%u: "
"wrap-around\n", __FUNCTION__, CurrentSelector, PendingSelector));
DEBUG ((
DEBUG_VERBOSE,
"%a: CurrentSelector=%u PendingSelector=%u: "
"wrap-around\n",
__FUNCTION__,
CurrentSelector,
PendingSelector
));
break;
}
CurrentSelector = PendingSelector;
//
@ -274,16 +284,26 @@ QemuCpuhpCollectApicIds (
// The "insert" event guarantees the "enabled" status; plus it excludes
// the "fw_remove" event.
//
if ((CpuStatus & QEMU_CPUHP_STAT_ENABLED) == 0 ||
(CpuStatus & QEMU_CPUHP_STAT_FW_REMOVE) != 0) {
DEBUG ((DEBUG_ERROR, "%a: CurrentSelector=%u CpuStatus=0x%x: "
"inconsistent CPU status\n", __FUNCTION__, CurrentSelector,
CpuStatus));
if (((CpuStatus & QEMU_CPUHP_STAT_ENABLED) == 0) ||
((CpuStatus & QEMU_CPUHP_STAT_FW_REMOVE) != 0))
{
DEBUG ((
DEBUG_ERROR,
"%a: CurrentSelector=%u CpuStatus=0x%x: "
"inconsistent CPU status\n",
__FUNCTION__,
CurrentSelector,
CpuStatus
));
return EFI_PROTOCOL_ERROR;
}
DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=%u: insert\n", __FUNCTION__,
CurrentSelector));
DEBUG ((
DEBUG_VERBOSE,
"%a: CurrentSelector=%u: insert\n",
__FUNCTION__,
CurrentSelector
));
ExtendIds = PluggedApicIds;
ExtendSels = NULL;
@ -293,14 +313,23 @@ QemuCpuhpCollectApicIds (
// "fw_remove" event guarantees "enabled".
//
if ((CpuStatus & QEMU_CPUHP_STAT_ENABLED) == 0) {
DEBUG ((DEBUG_ERROR, "%a: CurrentSelector=%u CpuStatus=0x%x: "
"inconsistent CPU status\n", __FUNCTION__, CurrentSelector,
CpuStatus));
DEBUG ((
DEBUG_ERROR,
"%a: CurrentSelector=%u CpuStatus=0x%x: "
"inconsistent CPU status\n",
__FUNCTION__,
CurrentSelector,
CpuStatus
));
return EFI_PROTOCOL_ERROR;
}
DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=%u: fw_remove\n",
__FUNCTION__, CurrentSelector));
DEBUG ((
DEBUG_VERBOSE,
"%a: CurrentSelector=%u: fw_remove\n",
__FUNCTION__,
CurrentSelector
));
ExtendIds = ToUnplugApicIds;
ExtendSels = ToUnplugSelectors;
@ -309,15 +338,23 @@ QemuCpuhpCollectApicIds (
//
// Let the OSPM deal with the "remove" event.
//
DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=%u: remove (ignored)\n",
__FUNCTION__, CurrentSelector));
DEBUG ((
DEBUG_VERBOSE,
"%a: CurrentSelector=%u: remove (ignored)\n",
__FUNCTION__,
CurrentSelector
));
ExtendIds = NULL;
ExtendSels = NULL;
ExtendCount = NULL;
} else {
DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=%u: no event\n",
__FUNCTION__, CurrentSelector));
DEBUG ((
DEBUG_VERBOSE,
"%a: CurrentSelector=%u: no event\n",
__FUNCTION__,
CurrentSelector
));
break;
}
@ -334,15 +371,22 @@ QemuCpuhpCollectApicIds (
DEBUG ((DEBUG_ERROR, "%a: APIC ID array too small\n", __FUNCTION__));
return EFI_BUFFER_TOO_SMALL;
}
QemuCpuhpWriteCommand (MmCpuIo, QEMU_CPUHP_CMD_GET_ARCH_ID);
NewApicId = QemuCpuhpReadCommandData (MmCpuIo);
DEBUG ((DEBUG_VERBOSE, "%a: ApicId=" FMT_APIC_ID "\n", __FUNCTION__,
NewApicId));
DEBUG ((
DEBUG_VERBOSE,
"%a: ApicId=" FMT_APIC_ID "\n",
__FUNCTION__,
NewApicId
));
if (ExtendSels != NULL) {
ExtendSels[(*ExtendCount)] = CurrentSelector;
}
ExtendIds[(*ExtendCount)++] = NewApicId;
}
//
// We've processed the CPU with (known) pending events, but we must never
// clear events. Therefore we need to advance past this CPU manually;
@ -352,7 +396,12 @@ QemuCpuhpCollectApicIds (
CurrentSelector++;
} while (CurrentSelector < PossibleCpuCount);
DEBUG ((DEBUG_VERBOSE, "%a: PluggedCount=%u ToUnplugCount=%u\n",
__FUNCTION__, *PluggedCount, *ToUnplugCount));
DEBUG ((
DEBUG_VERBOSE,
"%a: PluggedCount=%u ToUnplugCount=%u\n",
__FUNCTION__,
*PluggedCount,
*ToUnplugCount
));
return EFI_SUCCESS;
}

34
OvmfPkg/CpuHotplugSmm/QemuCpuhp.h
View File

@ -22,47 +22,47 @@
UINT32
QemuCpuhpReadCommandData2 (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
);
UINT8
QemuCpuhpReadCpuStatus (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
);
UINT32
QemuCpuhpReadCommandData (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo
);
VOID
QemuCpuhpWriteCpuSelector (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 Selector
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 Selector
);
VOID
QemuCpuhpWriteCpuStatus (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 CpuStatus
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 CpuStatus
);
VOID
QemuCpuhpWriteCommand (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 Command
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT8 Command
);
EFI_STATUS
QemuCpuhpCollectApicIds (
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 PossibleCpuCount,
IN UINT32 ApicIdCount,
OUT APIC_ID *PluggedApicIds,
OUT UINT32 *PluggedCount,
OUT APIC_ID *ToUnplugApicIds,
OUT UINT32 *ToUnplugSelectors,
OUT UINT32 *ToUnplugCount
IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo,
IN UINT32 PossibleCpuCount,
IN UINT32 ApicIdCount,
OUT APIC_ID *PluggedApicIds,
OUT UINT32 *PluggedCount,
OUT APIC_ID *ToUnplugApicIds,
OUT UINT32 *ToUnplugSelectors,
OUT UINT32 *ToUnplugCount
);
#endif // QEMU_CPUHP_H_

93
OvmfPkg/CpuHotplugSmm/Smbase.c
View File

@ -18,10 +18,10 @@
#include "Smbase.h"
extern CONST UINT8 mPostSmmPen[];
extern CONST UINT16 mPostSmmPenSize;
extern CONST UINT8 mFirstSmiHandler[];
extern CONST UINT16 mFirstSmiHandlerSize;
extern CONST UINT8 mPostSmmPen[];
extern CONST UINT16 mPostSmmPenSize;
extern CONST UINT8 mFirstSmiHandler[];
extern CONST UINT16 mFirstSmiHandlerSize;
/**
Allocate a non-SMRAM reserved memory page for the Post-SMM Pen for hot-added
@ -46,12 +46,12 @@ extern CONST UINT16 mFirstSmiHandlerSize;
**/
EFI_STATUS
SmbaseAllocatePostSmmPen (
OUT UINT32 *PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
OUT UINT32 *PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS Address;
//
// The pen code must fit in one page, and the last byte must remain free for
@ -59,14 +59,23 @@ SmbaseAllocatePostSmmPen (
//
if (mPostSmmPenSize >= EFI_PAGE_SIZE) {
Status = EFI_BAD_BUFFER_SIZE;
DEBUG ((DEBUG_ERROR, "%a: mPostSmmPenSize=%u: %r\n", __FUNCTION__,
mPostSmmPenSize, Status));
DEBUG ((
DEBUG_ERROR,
"%a: mPostSmmPenSize=%u: %r\n",
__FUNCTION__,
mPostSmmPenSize,
Status
));
return Status;
}
Address = BASE_1MB - 1;
Status = BootServices->AllocatePages (AllocateMaxAddress,
EfiReservedMemoryType, 1, &Address);
Status = BootServices->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
1,
&Address
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: AllocatePages(): %r\n", __FUNCTION__, Status));
return Status;
@ -90,7 +99,7 @@ SmbaseAllocatePostSmmPen (
**/
VOID
SmbaseReinstallPostSmmPen (
IN UINT32 PenAddress
IN UINT32 PenAddress
)
{
CopyMem ((VOID *)(UINTN)PenAddress, mPostSmmPen, mPostSmmPenSize);
@ -110,8 +119,8 @@ SmbaseReinstallPostSmmPen (
**/
VOID
SmbaseReleasePostSmmPen (
IN UINT32 PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
IN UINT32 PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
)
{
BootServices->FreePages (PenAddress, 1);
@ -133,12 +142,15 @@ SmbaseInstallFirstSmiHandler (
VOID
)
{
FIRST_SMI_HANDLER_CONTEXT *Context;
FIRST_SMI_HANDLER_CONTEXT *Context;
CopyMem ((VOID *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET),
mFirstSmiHandler, mFirstSmiHandlerSize);
CopyMem (
(VOID *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET),
mFirstSmiHandler,
mFirstSmiHandlerSize
);
Context = (VOID *)(UINTN)SMM_DEFAULT_SMBASE;
Context = (VOID *)(UINTN)SMM_DEFAULT_SMBASE;
Context->ApicIdGate = MAX_UINT64;
}
@ -184,25 +196,31 @@ SmbaseInstallFirstSmiHandler (
**/
EFI_STATUS
SmbaseRelocate (
IN APIC_ID ApicId,
IN UINTN Smbase,
IN UINT32 PenAddress
IN APIC_ID ApicId,
IN UINTN Smbase,
IN UINT32 PenAddress
)
{
EFI_STATUS Status;
volatile UINT8 *SmmVacated;
volatile FIRST_SMI_HANDLER_CONTEXT *Context;
UINT64 ExchangeResult;
EFI_STATUS Status;
volatile UINT8 *SmmVacated;
volatile FIRST_SMI_HANDLER_CONTEXT *Context;
UINT64 ExchangeResult;
if (Smbase > MAX_UINT32) {
Status = EFI_INVALID_PARAMETER;
DEBUG ((DEBUG_ERROR, "%a: ApicId=" FMT_APIC_ID " Smbase=0x%Lx: %r\n",
__FUNCTION__, ApicId, (UINT64)Smbase, Status));
DEBUG ((
DEBUG_ERROR,
"%a: ApicId=" FMT_APIC_ID " Smbase=0x%Lx: %r\n",
__FUNCTION__,
ApicId,
(UINT64)Smbase,
Status
));
return Status;
}
SmmVacated = (UINT8 *)(UINTN)PenAddress + (EFI_PAGE_SIZE - 1);
Context = (VOID *)(UINTN)SMM_DEFAULT_SMBASE;
Context = (VOID *)(UINTN)SMM_DEFAULT_SMBASE;
//
// Clear AboutToLeaveSmm, so we notice when the hot-added CPU is just about
@ -261,12 +279,21 @@ SmbaseRelocate (
//
// Un-gate SMBASE relocation for the hot-added CPU whose APIC ID is ApicId.
//
ExchangeResult = InterlockedCompareExchange64 (&Context->ApicIdGate,
MAX_UINT64, ApicId);
ExchangeResult = InterlockedCompareExchange64 (
&Context->ApicIdGate,
MAX_UINT64,
ApicId
);
if (ExchangeResult != MAX_UINT64) {
Status = EFI_PROTOCOL_ERROR;
DEBUG ((DEBUG_ERROR, "%a: ApicId=" FMT_APIC_ID " ApicIdGate=0x%Lx: %r\n",
__FUNCTION__, ApicId, ExchangeResult, Status));
DEBUG ((
DEBUG_ERROR,
"%a: ApicId=" FMT_APIC_ID " ApicIdGate=0x%Lx: %r\n",
__FUNCTION__,
ApicId,
ExchangeResult,
Status
));
return Status;
}

16
OvmfPkg/CpuHotplugSmm/Smbase.h
View File

@ -16,19 +16,19 @@
EFI_STATUS
SmbaseAllocatePostSmmPen (
OUT UINT32 *PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
OUT UINT32 *PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
);
VOID
SmbaseReinstallPostSmmPen (
IN UINT32 PenAddress
IN UINT32 PenAddress
);
VOID
SmbaseReleasePostSmmPen (
IN UINT32 PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
IN UINT32 PenAddress,
IN CONST EFI_BOOT_SERVICES *BootServices
);
VOID
@ -38,9 +38,9 @@ SmbaseInstallFirstSmiHandler (
EFI_STATUS
SmbaseRelocate (
IN APIC_ID ApicId,
IN UINTN Smbase,
IN UINT32 PenAddress
IN APIC_ID ApicId,
IN UINTN Smbase,
IN UINT32 PenAddress
);
#endif // SMBASE_H_

78
OvmfPkg/CpuS3DataDxe/CpuS3Data.c
View File

@ -34,10 +34,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Data structure used to allocate ACPI_CPU_DATA and its supporting structures
//
typedef struct {
ACPI_CPU_DATA AcpiCpuData;
MTRR_SETTINGS MtrrTable;
IA32_DESCRIPTOR GdtrProfile;
IA32_DESCRIPTOR IdtrProfile;
ACPI_CPU_DATA AcpiCpuData;
MTRR_SETTINGS MtrrTable;
IA32_DESCRIPTOR GdtrProfile;
IA32_DESCRIPTOR IdtrProfile;
} ACPI_CPU_DATA_EX;
/**
@ -57,12 +57,12 @@ AllocateAcpiNvsMemory (
EFI_STATUS Status;
VOID *Buffer;
Status = gBS->AllocatePages (
AllocateAnyPages,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (Size),
&Address
);
Status = gBS->AllocatePages (
AllocateAnyPages,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (Size),
&Address
);
if (EFI_ERROR (Status)) {
return NULL;
}
@ -86,7 +86,7 @@ AllocateZeroPages (
IN UINTN Size
)
{
VOID *Buffer;
VOID *Buffer;
Buffer = AllocatePages (EFI_SIZE_TO_PAGES (Size));
if (Buffer != NULL) {
@ -95,6 +95,7 @@ AllocateZeroPages (
return Buffer;
}
/**
Callback function executed when the EndOfDxe event group is signaled.
@ -110,20 +111,20 @@ CpuS3DataOnEndOfDxe (
OUT VOID *Context
)
{
EFI_STATUS Status;
ACPI_CPU_DATA_EX *AcpiCpuDataEx;
EFI_STATUS Status;
ACPI_CPU_DATA_EX *AcpiCpuDataEx;
AcpiCpuDataEx = (ACPI_CPU_DATA_EX *) Context;
AcpiCpuDataEx = (ACPI_CPU_DATA_EX *)Context;
//
// Allocate a 4KB reserved page below 1MB
//
AcpiCpuDataEx->AcpiCpuData.StartupVector = BASE_1MB - 1;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
1,
&AcpiCpuDataEx->AcpiCpuData.StartupVector
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
1,
&AcpiCpuDataEx->AcpiCpuData.StartupVector
);
ASSERT_EFI_ERROR (Status);
DEBUG ((DEBUG_VERBOSE, "%a\n", __FUNCTION__));
@ -158,18 +159,18 @@ CpuS3DataInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
ACPI_CPU_DATA_EX *AcpiCpuDataEx;
ACPI_CPU_DATA *AcpiCpuData;
EFI_MP_SERVICES_PROTOCOL *MpServices;
UINTN NumberOfCpus;
VOID *Stack;
UINTN GdtSize;
UINTN IdtSize;
VOID *Gdt;
VOID *Idt;
EFI_EVENT Event;
ACPI_CPU_DATA *OldAcpiCpuData;
EFI_STATUS Status;
ACPI_CPU_DATA_EX *AcpiCpuDataEx;
ACPI_CPU_DATA *AcpiCpuData;
EFI_MP_SERVICES_PROTOCOL *MpServices;
UINTN NumberOfCpus;
VOID *Stack;
UINTN GdtSize;
UINTN IdtSize;
VOID *Gdt;
VOID *Idt;
EFI_EVENT Event;
ACPI_CPU_DATA *OldAcpiCpuData;
if (!PcdGetBool (PcdAcpiS3Enable)) {
return EFI_UNSUPPORTED;
@ -178,7 +179,7 @@ CpuS3DataInitialize (
//
// Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA structure
//
OldAcpiCpuData = (ACPI_CPU_DATA *) (UINTN) PcdGet64 (PcdCpuS3DataAddress);
OldAcpiCpuData = (ACPI_CPU_DATA *)(UINTN)PcdGet64 (PcdCpuS3DataAddress);
AcpiCpuDataEx = AllocateZeroPages (sizeof (ACPI_CPU_DATA_EX));
ASSERT (AcpiCpuDataEx != NULL);
@ -187,7 +188,7 @@ CpuS3DataInitialize (
if (PcdGetBool (PcdQ35SmramAtDefaultSmbase)) {
NumberOfCpus = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
} else {
UINTN NumberOfEnabledProcessors;
UINTN NumberOfEnabledProcessors;
//
// Get MP Services Protocol
@ -209,6 +210,7 @@ CpuS3DataInitialize (
);
ASSERT_EFI_ERROR (Status);
}
AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;
//
@ -217,9 +219,9 @@ CpuS3DataInitialize (
AcpiCpuData->StackSize = PcdGet32 (PcdCpuApStackSize);
AcpiCpuData->ApMachineCheckHandlerBase = 0;
AcpiCpuData->ApMachineCheckHandlerSize = 0;
AcpiCpuData->GdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->GdtrProfile;
AcpiCpuData->IdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->IdtrProfile;
AcpiCpuData->MtrrTable = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->MtrrTable;
AcpiCpuData->GdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->GdtrProfile;
AcpiCpuData->IdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->IdtrProfile;
AcpiCpuData->MtrrTable = (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataEx->MtrrTable;
//
// Allocate stack space for all CPUs.
@ -243,7 +245,7 @@ CpuS3DataInitialize (
//
GdtSize = AcpiCpuDataEx->GdtrProfile.Limit + 1;
IdtSize = AcpiCpuDataEx->IdtrProfile.Limit + 1;
Gdt = AllocateZeroPages (GdtSize + IdtSize);
Gdt = AllocateZeroPages (GdtSize + IdtSize);
ASSERT (Gdt != NULL);
Idt = (VOID *)((UINTN)Gdt + GdtSize);
CopyMem (Gdt, (VOID *)AcpiCpuDataEx->GdtrProfile.Base, GdtSize);

1845
OvmfPkg/Csm/BiosThunk/VideoDxe/BiosVideo.c
View File

File diff suppressed because it is too large Load Diff

164
OvmfPkg/Csm/BiosThunk/VideoDxe/BiosVideo.h
View File

@ -42,88 +42,88 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// position of RGB in the frame buffer is specified in the VBE Mode information
//
typedef struct {
UINT8 Position; // Position of the color
UINT8 Mask; // The number of bits expressed as a mask
UINT8 Position; // Position of the color
UINT8 Mask; // The number of bits expressed as a mask
} BIOS_VIDEO_COLOR_PLACEMENT;
//
// BIOS Graphics Output Graphical Mode Data
//
typedef struct {
UINT16 VbeModeNumber;
UINT16 BytesPerScanLine;
VOID *LinearFrameBuffer;
UINTN FrameBufferSize;
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
UINT32 BitsPerPixel;
BIOS_VIDEO_COLOR_PLACEMENT Red;
BIOS_VIDEO_COLOR_PLACEMENT Green;
BIOS_VIDEO_COLOR_PLACEMENT Blue;
BIOS_VIDEO_COLOR_PLACEMENT Reserved;
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
EFI_PIXEL_BITMASK PixelBitMask;
UINT16 VbeModeNumber;
UINT16 BytesPerScanLine;
VOID *LinearFrameBuffer;
UINTN FrameBufferSize;
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
UINT32 BitsPerPixel;
BIOS_VIDEO_COLOR_PLACEMENT Red;
BIOS_VIDEO_COLOR_PLACEMENT Green;
BIOS_VIDEO_COLOR_PLACEMENT Blue;
BIOS_VIDEO_COLOR_PLACEMENT Reserved;
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
EFI_PIXEL_BITMASK PixelBitMask;
} BIOS_VIDEO_MODE_DATA;
//
// BIOS video child handle private data Structure
//
#define BIOS_VIDEO_DEV_SIGNATURE SIGNATURE_32 ('B', 'V', 'M', 'p')
#define BIOS_VIDEO_DEV_SIGNATURE SIGNATURE_32 ('B', 'V', 'M', 'p')
typedef struct {
UINTN Signature;
EFI_HANDLE Handle;
UINTN Signature;
EFI_HANDLE Handle;
//
// Consumed Protocols
//
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
//
// Produced Protocols
//
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_EDID_DISCOVERED_PROTOCOL EdidDiscovered;
EFI_EDID_ACTIVE_PROTOCOL EdidActive;
EFI_VGA_MINI_PORT_PROTOCOL VgaMiniPort;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_EDID_DISCOVERED_PROTOCOL EdidDiscovered;
EFI_EDID_ACTIVE_PROTOCOL EdidActive;
EFI_VGA_MINI_PORT_PROTOCOL VgaMiniPort;
//
// General fields
//
BOOLEAN VgaCompatible;
BOOLEAN ProduceGraphicsOutput;
BOOLEAN VgaCompatible;
BOOLEAN ProduceGraphicsOutput;
//
// Graphics Output Protocol related fields
//
BOOLEAN HardwareNeedsStarting;
UINTN CurrentMode;
UINTN MaxMode;
BIOS_VIDEO_MODE_DATA *ModeData;
UINT8 *LineBuffer;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;
UINT8 *VgaFrameBuffer;
BOOLEAN HardwareNeedsStarting;
UINTN CurrentMode;
UINTN MaxMode;
BIOS_VIDEO_MODE_DATA *ModeData;
UINT8 *LineBuffer;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;
UINT8 *VgaFrameBuffer;
//
// VESA Bios Extensions related fields
//
UINTN NumberOfPagesBelow1MB; // Number of 4KB pages in PagesBelow1MB
EFI_PHYSICAL_ADDRESS PagesBelow1MB; // Buffer for all VBE Information Blocks
VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK *VbeInformationBlock; // 0x200 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK *VbeModeInformationBlock; // 0x100 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK *VbeEdidDataBlock; // 0x80 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK *VbeCrtcInformationBlock; // 59 bytes. Must be allocated below 1MB
UINTN VbeSaveRestorePages; // Number of 4KB pages in VbeSaveRestoreBuffer
EFI_PHYSICAL_ADDRESS VbeSaveRestoreBuffer; // Must be allocated below 1MB
UINTN NumberOfPagesBelow1MB; // Number of 4KB pages in PagesBelow1MB
EFI_PHYSICAL_ADDRESS PagesBelow1MB; // Buffer for all VBE Information Blocks
VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK *VbeInformationBlock; // 0x200 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK *VbeModeInformationBlock; // 0x100 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK *VbeEdidDataBlock; // 0x80 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK *VbeCrtcInformationBlock; // 59 bytes. Must be allocated below 1MB
UINTN VbeSaveRestorePages; // Number of 4KB pages in VbeSaveRestoreBuffer
EFI_PHYSICAL_ADDRESS VbeSaveRestoreBuffer; // Must be allocated below 1MB
//
// Status code
//
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_EVENT ExitBootServicesEvent;
EFI_EVENT ExitBootServicesEvent;
} BIOS_VIDEO_DEV;
#define BIOS_VIDEO_DEV_FROM_PCI_IO_THIS(a) CR (a, BIOS_VIDEO_DEV, PciIo, BIOS_VIDEO_DEV_SIGNATURE)
@ -164,7 +164,6 @@ BiosVideoDriverBindingSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Install Graphics Output Protocol onto VGA device handles.
@ -184,7 +183,6 @@ BiosVideoDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Stop.
@ -223,7 +221,6 @@ BiosVideoCheckForVbe (
IN OUT BIOS_VIDEO_DEV *BiosVideoPrivate
);
/**
Check for VGA device.
@ -237,9 +234,6 @@ BiosVideoCheckForVga (
IN OUT BIOS_VIDEO_DEV *BiosVideoPrivate
);
/**
Release resource for BIOS video instance.
@ -282,7 +276,6 @@ BiosVideoGraphicsOutputQueryMode (
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
);
/**
Graphics Output protocol interface to set video mode.
@ -298,11 +291,10 @@ BiosVideoGraphicsOutputQueryMode (
EFI_STATUS
EFIAPI
BiosVideoGraphicsOutputSetMode (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL * This,
IN UINT32 ModeNumber
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN UINT32 ModeNumber
);
/**
Graphics Output protocol instance to block transfer for VBE device.
@ -345,7 +337,6 @@ BiosVideoGraphicsOutputVbeBlt (
IN UINTN Delta
);
/**
Graphics Output protocol instance to block transfer for VGA device.
@ -419,50 +410,50 @@ BiosVideoVgaMiniPortSetMode (
VOID
EFIAPI
BiosVideoNotifyExitBootServices (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
);
//
// Standard VGA Definitions
//
#define VGA_HORIZONTAL_RESOLUTION 640
#define VGA_VERTICAL_RESOLUTION 480
#define VGA_NUMBER_OF_BIT_PLANES 4
#define VGA_PIXELS_PER_BYTE 8
#define VGA_BYTES_PER_SCAN_LINE (VGA_HORIZONTAL_RESOLUTION / VGA_PIXELS_PER_BYTE)
#define VGA_BYTES_PER_BIT_PLANE (VGA_VERTICAL_RESOLUTION * VGA_BYTES_PER_SCAN_LINE)
#define VGA_HORIZONTAL_RESOLUTION 640
#define VGA_VERTICAL_RESOLUTION 480
#define VGA_NUMBER_OF_BIT_PLANES 4
#define VGA_PIXELS_PER_BYTE 8
#define VGA_BYTES_PER_SCAN_LINE (VGA_HORIZONTAL_RESOLUTION / VGA_PIXELS_PER_BYTE)
#define VGA_BYTES_PER_BIT_PLANE (VGA_VERTICAL_RESOLUTION * VGA_BYTES_PER_SCAN_LINE)
#define VGA_GRAPHICS_CONTROLLER_ADDRESS_REGISTER 0x3ce
#define VGA_GRAPHICS_CONTROLLER_DATA_REGISTER 0x3cf
#define VGA_GRAPHICS_CONTROLLER_ADDRESS_REGISTER 0x3ce
#define VGA_GRAPHICS_CONTROLLER_DATA_REGISTER 0x3cf
#define VGA_GRAPHICS_CONTROLLER_SET_RESET_REGISTER 0x00
#define VGA_GRAPHICS_CONTROLLER_SET_RESET_REGISTER 0x00
#define VGA_GRAPHICS_CONTROLLER_ENABLE_SET_RESET_REGISTER 0x01
#define VGA_GRAPHICS_CONTROLLER_ENABLE_SET_RESET_REGISTER 0x01
#define VGA_GRAPHICS_CONTROLLER_COLOR_COMPARE_REGISTER 0x02
#define VGA_GRAPHICS_CONTROLLER_COLOR_COMPARE_REGISTER 0x02
#define VGA_GRAPHICS_CONTROLLER_DATA_ROTATE_REGISTER 0x03
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_REPLACE 0x00
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_AND 0x08
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_OR 0x10
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_XOR 0x18
#define VGA_GRAPHICS_CONTROLLER_DATA_ROTATE_REGISTER 0x03
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_REPLACE 0x00
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_AND 0x08
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_OR 0x10
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_XOR 0x18
#define VGA_GRAPHICS_CONTROLLER_READ_MAP_SELECT_REGISTER 0x04
#define VGA_GRAPHICS_CONTROLLER_MODE_REGISTER 0x05
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_1 0x08
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_1 0x01
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_2 0x02
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_3 0x03
#define VGA_GRAPHICS_CONTROLLER_MODE_REGISTER 0x05
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_1 0x08
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_1 0x01
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_2 0x02
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_3 0x03
#define VGA_GRAPHICS_CONTROLLER_MISCELLANEOUS_REGISTER 0x06
#define VGA_GRAPHICS_CONTROLLER_MISCELLANEOUS_REGISTER 0x06
#define VGA_GRAPHICS_CONTROLLER_COLOR_DONT_CARE_REGISTER 0x07
#define VGA_GRAPHICS_CONTROLLER_BIT_MASK_REGISTER 0x08
#define VGA_GRAPHICS_CONTROLLER_BIT_MASK_REGISTER 0x08
/**
Install child handles if the Handle supports MBR format.
@ -500,9 +491,9 @@ BiosVideoChildHandleInstall (
**/
EFI_STATUS
BiosVideoChildHandleUninstall (
EFI_DRIVER_BINDING_PROTOCOL *This,
EFI_HANDLE Controller,
EFI_HANDLE Handle
EFI_DRIVER_BINDING_PROTOCOL *This,
EFI_HANDLE Controller,
EFI_HANDLE Handle
);
/**
@ -529,4 +520,5 @@ BOOLEAN
HasChildHandle (
IN EFI_HANDLE Controller
);
#endif

32
OvmfPkg/Csm/BiosThunk/VideoDxe/ComponentName.c
View File

@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// EFI Component Name Functions
//
/**
Retrieves a Unicode string that is the user readable name of the driver.
@ -58,7 +59,6 @@ BiosVideoComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@ -130,14 +130,13 @@ BiosVideoComponentNameGetDriverName (
EFI_STATUS
EFIAPI
BiosVideoComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
//
// EFI Component Name Protocol
//
@ -150,14 +149,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gBiosVideoComponentNa
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gBiosVideoComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) BiosVideoComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) BiosVideoComponentNameGetControllerName,
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gBiosVideoComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME)BiosVideoComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)BiosVideoComponentNameGetControllerName,
"en"
};
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mBiosVideoDriverNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mBiosVideoDriverNameTable[] = {
{
"eng;en",
L"BIOS[INT10] Video Driver"
@ -295,11 +293,11 @@ BiosVideoComponentNameGetDriverName (
EFI_STATUS
EFIAPI
BiosVideoComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;

264
OvmfPkg/Csm/BiosThunk/VideoDxe/VesaBiosExtensions.h
View File

@ -16,7 +16,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// VESA BIOS Extensions status codes
//
#define VESA_BIOS_EXTENSIONS_STATUS_SUCCESS 0x004f
#define VESA_BIOS_EXTENSIONS_STATUS_SUCCESS 0x004f
//
// VESA BIOS Extensions Services
@ -52,7 +52,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
AX = Return Status
--*/
#define VESA_BIOS_EXTENSIONS_SET_MODE 0x4f02
#define VESA_BIOS_EXTENSIONS_SET_MODE 0x4f02
/*++
@ -97,7 +97,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
= 1 - Memory not cleared at last mode set
--*/
#define VESA_BIOS_EXTENSIONS_SAVE_RESTORE_STATE 0x4f04
#define VESA_BIOS_EXTENSIONS_SAVE_RESTORE_STATE 0x4f04
/*++
@ -158,89 +158,89 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Timing data from EDID data block
//
#define VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE 128
#define VESA_BIOS_EXTENSIONS_EDID_ESTABLISHED_TIMING_MAX_NUMBER 17
#define VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE 128
#define VESA_BIOS_EXTENSIONS_EDID_ESTABLISHED_TIMING_MAX_NUMBER 17
//
// Established Timings: 24 possible resolutions
// Standard Timings: 8 possible resolutions
// Detailed Timings: 4 possible resolutions
//
#define VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER 36
#define VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER 36
//
// Timing data size for Established Timings, Standard Timings and Detailed Timings
//
#define VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE 3
#define VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE 16
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_EACH_DESCRIPTOR_SIZE 18
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE 72
#define VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE 3
#define VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE 16
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_EACH_DESCRIPTOR_SIZE 18
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE 72
typedef struct {
UINT16 HorizontalResolution;
UINT16 VerticalResolution;
UINT16 RefreshRate;
UINT16 HorizontalResolution;
UINT16 VerticalResolution;
UINT16 RefreshRate;
} VESA_BIOS_EXTENSIONS_EDID_TIMING;
typedef struct {
UINT32 ValidNumber;
UINT32 Key[VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER];
UINT32 ValidNumber;
UINT32 Key[VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER];
} VESA_BIOS_EXTENSIONS_VALID_EDID_TIMING;
typedef struct {
UINT8 Header[8]; //EDID header "00 FF FF FF FF FF FF 00"
UINT16 ManufactureName; //EISA 3-character ID
UINT16 ProductCode; //Vendor assigned code
UINT32 SerialNumber; //32-bit serial number
UINT8 WeekOfManufacture; //Week number
UINT8 YearOfManufacture; //Year
UINT8 EdidVersion; //EDID Structure Version
UINT8 EdidRevision; //EDID Structure Revision
UINT8 VideoInputDefinition;
UINT8 MaxHorizontalImageSize; //cm
UINT8 MaxVerticalImageSize; //cm
UINT8 DisplayTransferCharacteristic;
UINT8 FeatureSupport;
UINT8 RedGreenLowBits; //Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1Gy0
UINT8 BlueWhiteLowBits; //Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
UINT8 RedX; //Red-x Bits 9 - 2
UINT8 RedY; //Red-y Bits 9 - 2
UINT8 GreenX; //Green-x Bits 9 - 2
UINT8 GreenY; //Green-y Bits 9 - 2
UINT8 BlueX; //Blue-x Bits 9 - 2
UINT8 BlueY; //Blue-y Bits 9 - 2
UINT8 WhiteX; //White-x Bits 9 - 2
UINT8 WhiteY; //White-x Bits 9 - 2
UINT8 EstablishedTimings[VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE];
UINT8 StandardTimingIdentification[VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE];
UINT8 DetailedTimingDescriptions[VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE];
UINT8 ExtensionFlag; //Number of (optional) 128-byte EDID extension blocks to follow
UINT8 Checksum;
UINT8 Header[8]; // EDID header "00 FF FF FF FF FF FF 00"
UINT16 ManufactureName; // EISA 3-character ID
UINT16 ProductCode; // Vendor assigned code
UINT32 SerialNumber; // 32-bit serial number
UINT8 WeekOfManufacture; // Week number
UINT8 YearOfManufacture; // Year
UINT8 EdidVersion; // EDID Structure Version
UINT8 EdidRevision; // EDID Structure Revision
UINT8 VideoInputDefinition;
UINT8 MaxHorizontalImageSize; // cm
UINT8 MaxVerticalImageSize; // cm
UINT8 DisplayTransferCharacteristic;
UINT8 FeatureSupport;
UINT8 RedGreenLowBits; // Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1Gy0
UINT8 BlueWhiteLowBits; // Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
UINT8 RedX; // Red-x Bits 9 - 2
UINT8 RedY; // Red-y Bits 9 - 2
UINT8 GreenX; // Green-x Bits 9 - 2
UINT8 GreenY; // Green-y Bits 9 - 2
UINT8 BlueX; // Blue-x Bits 9 - 2
UINT8 BlueY; // Blue-y Bits 9 - 2
UINT8 WhiteX; // White-x Bits 9 - 2
UINT8 WhiteY; // White-x Bits 9 - 2
UINT8 EstablishedTimings[VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE];
UINT8 StandardTimingIdentification[VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE];
UINT8 DetailedTimingDescriptions[VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE];
UINT8 ExtensionFlag; // Number of (optional) 128-byte EDID extension blocks to follow
UINT8 Checksum;
} VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK;
//
// Super VGA Information Block
//
typedef struct {
UINT32 VESASignature; // 'VESA' 4 byte signature
UINT16 VESAVersion; // VBE version number
UINT32 OEMStringPtr; // Pointer to OEM string
UINT32 Capabilities; // Capabilities of video card
UINT32 VideoModePtr; // Pointer to an array of 16-bit supported modes values terminated by 0xFFFF
UINT16 TotalMemory; // Number of 64kb memory blocks
UINT16 OemSoftwareRev; // VBE implementation Software revision
UINT32 OemVendorNamePtr; // VbeFarPtr to Vendor Name String
UINT32 OemProductNamePtr; // VbeFarPtr to Product Name String
UINT32 OemProductRevPtr; // VbeFarPtr to Product Revision String
UINT8 Reserved[222]; // Reserved for VBE implementation scratch area
UINT8 OemData[256]; // Data area for OEM strings. Pad to 512 byte block size
UINT32 VESASignature; // 'VESA' 4 byte signature
UINT16 VESAVersion; // VBE version number
UINT32 OEMStringPtr; // Pointer to OEM string
UINT32 Capabilities; // Capabilities of video card
UINT32 VideoModePtr; // Pointer to an array of 16-bit supported modes values terminated by 0xFFFF
UINT16 TotalMemory; // Number of 64kb memory blocks
UINT16 OemSoftwareRev; // VBE implementation Software revision
UINT32 OemVendorNamePtr; // VbeFarPtr to Vendor Name String
UINT32 OemProductNamePtr; // VbeFarPtr to Product Name String
UINT32 OemProductRevPtr; // VbeFarPtr to Product Revision String
UINT8 Reserved[222]; // Reserved for VBE implementation scratch area
UINT8 OemData[256]; // Data area for OEM strings. Pad to 512 byte block size
} VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK;
//
// Super VGA Information Block VESASignature values
//
#define VESA_BIOS_EXTENSIONS_VESA_SIGNATURE SIGNATURE_32 ('V', 'E', 'S', 'A')
#define VESA_BIOS_EXTENSIONS_VBE2_SIGNATURE SIGNATURE_32 ('V', 'B', 'E', '2')
#define VESA_BIOS_EXTENSIONS_VESA_SIGNATURE SIGNATURE_32 ('V', 'E', 'S', 'A')
#define VESA_BIOS_EXTENSIONS_VBE2_SIGNATURE SIGNATURE_32 ('V', 'B', 'E', '2')
//
// Super VGA Information Block VESAVersion values
@ -252,13 +252,13 @@ typedef struct {
//
// Super VGA Information Block Capabilities field bit definitions
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_8_BIT_DAC 0x01 // 0: DAC width is fixed at 6 bits/color
#define VESA_BIOS_EXTENSIONS_CAPABILITY_8_BIT_DAC 0x01 // 0: DAC width is fixed at 6 bits/color
// 1: DAC width switchable to 8 bits/color
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_VGA 0x02 // 0: Controller is VGA compatible
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_VGA 0x02 // 0: Controller is VGA compatible
// 1: Controller is not VGA compatible
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_NORMAL_RAMDAC 0x04 // 0: Normal RAMDAC operation
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_NORMAL_RAMDAC 0x04 // 0: Normal RAMDAC operation
// 1: Use blank bit in function 9 to program RAMDAC
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_STEREOSCOPIC 0x08 // 0: No hardware stereoscopic signal support
@ -269,10 +269,10 @@ typedef struct {
//
// Super VGA mode number bite field definitions
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_VESA 0x0100 // 0: Not a VESA defined VBE mode
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_VESA 0x0100 // 0: Not a VESA defined VBE mode
// 1: A VESA defined VBE mode
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_REFRESH_CONTROL_USER 0x0800 // 0: Use current BIOS default referesh rate
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_REFRESH_CONTROL_USER 0x0800 // 0: Use current BIOS default referesh rate
// 1: Use the user specified CRTC values for refresh rate
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_LINEAR_FRAME_BUFFER 0x4000 // 0: Use a banked/windowed frame buffer
@ -283,7 +283,7 @@ typedef struct {
//
// Super VGA Information Block mode list terminator value
//
#define VESA_BIOS_EXTENSIONS_END_OF_MODE_LIST 0xffff
#define VESA_BIOS_EXTENSIONS_END_OF_MODE_LIST 0xffff
//
// Window Function
@ -301,60 +301,60 @@ typedef struct {
//
// Manadory fields for all VESA Bios Extensions revisions
//
UINT16 ModeAttributes; // Mode attributes
UINT8 WinAAttributes; // Window A attributes
UINT8 WinBAttributes; // Window B attributes
UINT16 WinGranularity; // Window granularity in k
UINT16 WinSize; // Window size in k
UINT16 WinASegment; // Window A segment
UINT16 WinBSegment; // Window B segment
UINT32 WindowFunction; // Pointer to window function
UINT16 BytesPerScanLine; // Bytes per scanline
UINT16 ModeAttributes; // Mode attributes
UINT8 WinAAttributes; // Window A attributes
UINT8 WinBAttributes; // Window B attributes
UINT16 WinGranularity; // Window granularity in k
UINT16 WinSize; // Window size in k
UINT16 WinASegment; // Window A segment
UINT16 WinBSegment; // Window B segment
UINT32 WindowFunction; // Pointer to window function
UINT16 BytesPerScanLine; // Bytes per scanline
//
// Manadory fields for VESA Bios Extensions 1.2 and above
//
UINT16 XResolution; // Horizontal resolution
UINT16 YResolution; // Vertical resolution
UINT8 XCharSize; // Character cell width
UINT8 YCharSize; // Character cell height
UINT8 NumberOfPlanes; // Number of memory planes
UINT8 BitsPerPixel; // Bits per pixel
UINT8 NumberOfBanks; // Number of CGA style banks
UINT8 MemoryModel; // Memory model type
UINT8 BankSize; // Size of CGA style banks
UINT8 NumberOfImagePages; // Number of images pages
UINT8 Reserved1; // Reserved
UINT8 RedMaskSize; // Size of direct color red mask
UINT8 RedFieldPosition; // Bit posn of lsb of red mask
UINT8 GreenMaskSize; // Size of direct color green mask
UINT8 GreenFieldPosition; // Bit posn of lsb of green mask
UINT8 BlueMaskSize; // Size of direct color blue mask
UINT8 BlueFieldPosition; // Bit posn of lsb of blue mask
UINT8 RsvdMaskSize; // Size of direct color res mask
UINT8 RsvdFieldPosition; // Bit posn of lsb of res mask
UINT8 DirectColorModeInfo; // Direct color mode attributes
UINT16 XResolution; // Horizontal resolution
UINT16 YResolution; // Vertical resolution
UINT8 XCharSize; // Character cell width
UINT8 YCharSize; // Character cell height
UINT8 NumberOfPlanes; // Number of memory planes
UINT8 BitsPerPixel; // Bits per pixel
UINT8 NumberOfBanks; // Number of CGA style banks
UINT8 MemoryModel; // Memory model type
UINT8 BankSize; // Size of CGA style banks
UINT8 NumberOfImagePages; // Number of images pages
UINT8 Reserved1; // Reserved
UINT8 RedMaskSize; // Size of direct color red mask
UINT8 RedFieldPosition; // Bit posn of lsb of red mask
UINT8 GreenMaskSize; // Size of direct color green mask
UINT8 GreenFieldPosition; // Bit posn of lsb of green mask
UINT8 BlueMaskSize; // Size of direct color blue mask
UINT8 BlueFieldPosition; // Bit posn of lsb of blue mask
UINT8 RsvdMaskSize; // Size of direct color res mask
UINT8 RsvdFieldPosition; // Bit posn of lsb of res mask
UINT8 DirectColorModeInfo; // Direct color mode attributes
//
// Manadory fields for VESA Bios Extensions 2.0 and above
//
UINT32 PhysBasePtr; // Physical Address for flat memory frame buffer
UINT32 Reserved2; // Reserved
UINT16 Reserved3; // Reserved
UINT32 PhysBasePtr; // Physical Address for flat memory frame buffer
UINT32 Reserved2; // Reserved
UINT16 Reserved3; // Reserved
//
// Manadory fields for VESA Bios Extensions 3.0 and above
//
UINT16 LinBytesPerScanLine; // Bytes/scan line for linear modes
UINT8 BnkNumberOfImagePages; // Number of images for banked modes
UINT8 LinNumberOfImagePages; // Number of images for linear modes
UINT8 LinRedMaskSize; // Size of direct color red mask (linear mode)
UINT8 LinRedFieldPosition; // Bit posiiton of lsb of red mask (linear modes)
UINT8 LinGreenMaskSize; // Size of direct color green mask (linear mode)
UINT8 LinGreenFieldPosition; // Bit posiiton of lsb of green mask (linear modes)
UINT8 LinBlueMaskSize; // Size of direct color blue mask (linear mode)
UINT8 LinBlueFieldPosition; // Bit posiiton of lsb of blue mask (linear modes)
UINT8 LinRsvdMaskSize; // Size of direct color reserved mask (linear mode)
UINT8 LinRsvdFieldPosition; // Bit posiiton of lsb of reserved mask (linear modes)
UINT32 MaxPixelClock; // Maximum pixel clock (in Hz) for graphics mode
UINT8 Pad[190]; // Pad to 256 byte block size
UINT16 LinBytesPerScanLine; // Bytes/scan line for linear modes
UINT8 BnkNumberOfImagePages; // Number of images for banked modes
UINT8 LinNumberOfImagePages; // Number of images for linear modes
UINT8 LinRedMaskSize; // Size of direct color red mask (linear mode)
UINT8 LinRedFieldPosition; // Bit posiiton of lsb of red mask (linear modes)
UINT8 LinGreenMaskSize; // Size of direct color green mask (linear mode)
UINT8 LinGreenFieldPosition; // Bit posiiton of lsb of green mask (linear modes)
UINT8 LinBlueMaskSize; // Size of direct color blue mask (linear mode)
UINT8 LinBlueFieldPosition; // Bit posiiton of lsb of blue mask (linear modes)
UINT8 LinRsvdMaskSize; // Size of direct color reserved mask (linear mode)
UINT8 LinRsvdFieldPosition; // Bit posiiton of lsb of reserved mask (linear modes)
UINT32 MaxPixelClock; // Maximum pixel clock (in Hz) for graphics mode
UINT8 Pad[190]; // Pad to 256 byte block size
} VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK;
//
@ -363,31 +363,31 @@ typedef struct {
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_HARDWARE 0x0001 // 0: Mode not supported in handware
// 1: Mode supported in handware
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_TTY 0x0004 // 0: TTY Output functions not supported by BIOS
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_TTY 0x0004 // 0: TTY Output functions not supported by BIOS
// 1: TTY Output functions supported by BIOS
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_COLOR 0x0008 // 0: Monochrome mode
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_COLOR 0x0008 // 0: Monochrome mode
// 1: Color mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_GRAPHICS 0x0010 // 0: Text mode
// 1: Graphics mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_VGA 0x0020 // 0: VGA compatible mode
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_VGA 0x0020 // 0: VGA compatible mode
// 1: Not a VGA compatible mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_WINDOWED 0x0040 // 0: VGA compatible windowed memory mode
// 1: Not a VGA compatible windowed memory mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER 0x0080 // 0: No linear fram buffer mode available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER 0x0080 // 0: No linear fram buffer mode available
// 1: Linear frame buffer mode available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DOUBLE_SCAN 0x0100 // 0: No double scan mode available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DOUBLE_SCAN 0x0100 // 0: No double scan mode available
// 1: Double scan mode available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_INTERLACED 0x0200 // 0: No interlaced mode is available
// 1: Interlaced mode is available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NO_TRIPPLE_BUFFER 0x0400 // 0: No hardware triple buffer mode support available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NO_TRIPPLE_BUFFER 0x0400 // 0: No hardware triple buffer mode support available
// 1: Hardware triple buffer mode support available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_STEREOSCOPIC 0x0800 // 0: No hardware steroscopic display support
@ -398,7 +398,7 @@ typedef struct {
//
// Super VGA Mode Information Block WinAAttribite/WinBAttributes field bit definitions
//
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_RELOCATABLE 0x01 // 0: Single non-relocatable window only
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_RELOCATABLE 0x01 // 0: Single non-relocatable window only
// 1: Relocatable window(s) are supported
//
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_READABLE 0x02 // 0: Window is not readable
@ -418,38 +418,38 @@ typedef struct {
// Super VGA Memory Models
//
typedef enum {
MemPL = 3, // Planar memory model
MemPK = 4, // Packed pixel memory model
MemRGB= 6, // Direct color RGB memory model
MemYUV= 7 // Direct color YUV memory model
MemPL = 3, // Planar memory model
MemPK = 4, // Packed pixel memory model
MemRGB = 6, // Direct color RGB memory model
MemYUV = 7 // Direct color YUV memory model
} VESA_BIOS_EXTENSIONS_MEMORY_MODELS;
//
// Super VGA CRTC Information Block
//
typedef struct {
UINT16 HorizontalTotal; // Horizontal total in pixels
UINT16 HorizontalSyncStart; // Horizontal sync start in pixels
UINT16 HorizontalSyncEnd; // Horizontal sync end in pixels
UINT16 VericalTotal; // Vertical total in pixels
UINT16 VericalSyncStart; // Vertical sync start in pixels
UINT16 VericalSyncEnd; // Vertical sync end in pixels
UINT8 Flags; // Flags (Interlaced/DoubleScan/etc).
UINT32 PixelClock; // Pixel clock in units of Hz
UINT16 RefreshRate; // Refresh rate in units of 0.01 Hz
UINT8 Reserved[40]; // Pad
UINT16 HorizontalTotal; // Horizontal total in pixels
UINT16 HorizontalSyncStart; // Horizontal sync start in pixels
UINT16 HorizontalSyncEnd; // Horizontal sync end in pixels
UINT16 VericalTotal; // Vertical total in pixels
UINT16 VericalSyncStart; // Vertical sync start in pixels
UINT16 VericalSyncEnd; // Vertical sync end in pixels
UINT8 Flags; // Flags (Interlaced/DoubleScan/etc).
UINT32 PixelClock; // Pixel clock in units of Hz
UINT16 RefreshRate; // Refresh rate in units of 0.01 Hz
UINT8 Reserved[40]; // Pad
} VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK;
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGS_DOUBLE_SCAN 0x01 // 0: Graphics mode is not souble scanned
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGS_DOUBLE_SCAN 0x01 // 0: Graphics mode is not souble scanned
// 1: Graphics mode is double scanned
//
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGSINTERLACED 0x02 // 0: Graphics mode is not interlaced
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGSINTERLACED 0x02 // 0: Graphics mode is not interlaced
// 1: Graphics mode is interlaced
//
#define VESA_BIOS_EXTENSIONS_CRTC_HORIZONTAL_SYNC_NEGATIVE 0x04 // 0: Horizontal sync polarity is positive(+)
// 0: Horizontal sync polarity is negative(-)
//
#define VESA_BIOS_EXTENSIONS_CRTC_VERITICAL_SYNC_NEGATIVE 0x08 // 0: Verical sync polarity is positive(+)
#define VESA_BIOS_EXTENSIONS_CRTC_VERITICAL_SYNC_NEGATIVE 0x08 // 0: Verical sync polarity is positive(+)
// 0: Verical sync polarity is negative(-)
//
// Turn off byte packing of data structures

1
OvmfPkg/Csm/CsmSupportLib/CsmSupportLib.c
View File

@ -29,4 +29,3 @@ CsmSupportLibConstructor (
return EFI_SUCCESS;
}

1
OvmfPkg/Csm/CsmSupportLib/CsmSupportLib.h
View File

@ -46,4 +46,3 @@ LegacyBiosPlatformInstall (
);
#endif

40
OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c
View File

@ -12,25 +12,24 @@
//
// Handle for the Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
//
// Legacy Interrupt Device number (0x01 on piix4, 0x1f on q35/mch)
//
STATIC UINT8 mLegacyInterruptDevice;
STATIC UINT8 mLegacyInterruptDevice;
//
// The Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
GetNumberPirqs,
GetLocation,
ReadPirq,
WritePirq
};
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
/**
Return the number of PIRQs supported by this chipset.
@ -53,7 +52,6 @@ GetNumberPirqs (
return EFI_SUCCESS;
}
/**
Return PCI location of this device.
$PIR table requires this info.
@ -82,7 +80,6 @@ GetLocation (
return EFI_SUCCESS;
}
/**
Builds the PCI configuration address for the register specified by PirqNumber
@ -95,12 +92,12 @@ GetAddress (
UINT8 PirqNumber
)
{
return PCI_LIB_ADDRESS(
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
return PCI_LIB_ADDRESS (
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
}
/**
@ -127,12 +124,11 @@ ReadPirq (
}
*PirqData = PciRead8 (GetAddress (PirqNumber));
*PirqData = (UINT8) (*PirqData & 0x7f);
*PirqData = (UINT8)(*PirqData & 0x7f);
return EFI_SUCCESS;
}
/**
Write the given PIRQ register
@ -160,7 +156,6 @@ WritePirq (
return EFI_SUCCESS;
}
/**
Initialize Legacy Interrupt support
@ -178,7 +173,7 @@ LegacyInterruptInstall (
//
// Make sure the Legacy Interrupt Protocol is not already installed in the system
//
ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiLegacyInterruptProtocolGuid);
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiLegacyInterruptProtocolGuid);
//
// Query Host Bridge DID to determine platform type, then set device number
@ -192,8 +187,12 @@ LegacyInterruptInstall (
mLegacyInterruptDevice = LEGACY_INT_DEV_Q35;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -207,8 +206,7 @@ LegacyInterruptInstall (
&mLegacyInterrupt,
NULL
);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
return Status;
}

26
OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
View File

@ -20,23 +20,22 @@
#include <Library/UefiBootServicesTableLib.h>
#include <OvmfPlatforms.h>
#define LEGACY_INT_BUS 0
#define LEGACY_INT_BUS 0
#define LEGACY_INT_DEV_PIIX4 0x01
#define LEGACY_INT_DEV_Q35 0x1f
#define LEGACY_INT_FUNC 0
#define LEGACY_INT_FUNC 0
#define PIRQN 0x00 // PIRQ Null
#define PIRQA 0x60
#define PIRQB 0x61
#define PIRQC 0x62
#define PIRQD 0x63
#define PIRQE 0x68
#define PIRQF 0x69
#define PIRQG 0x6A
#define PIRQH 0x6B
#define PIRQN 0x00 // PIRQ Null
#define PIRQA 0x60
#define PIRQB 0x61
#define PIRQC 0x62
#define PIRQD 0x63
#define PIRQE 0x68
#define PIRQF 0x69
#define PIRQG 0x6A
#define PIRQH 0x6B
#define MAX_PIRQ_NUMBER 8
#define MAX_PIRQ_NUMBER 8
/**
Return the number of PIRQs supported by this chipset.
@ -114,4 +113,3 @@ WritePirq (
);
#endif

553
OvmfPkg/Csm/CsmSupportLib/LegacyPlatform.c
View File

@ -9,15 +9,15 @@
#include "LegacyPlatform.h"
EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
{ 1, 2, 1, 1 }, // ATA HardDrive
{ 2, 3, 1, 1 }, // ATAPI CDROM
{ 3, 0x80, 2, 0 }, // PXE
{ 4, 1, 0, 6 }, // USB Floppy
{ 4, 2, 0, 6 }, // USB HDD
{ 4, 3, 0, 6 }, // USB CD
{ 4, 1, 0, 0 }, // USB ZIP Bugbug since Class/SubClass code is uninitialized
{ 4, 2, 0, 0 } // USB ZIP Bugbug since Class/SubClass code is uninitialized
EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
{ 1, 2, 1, 1 }, // ATA HardDrive
{ 2, 3, 1, 1 }, // ATAPI CDROM
{ 3, 0x80, 2, 0 }, // PXE
{ 4, 1, 0, 6 }, // USB Floppy
{ 4, 2, 0, 6 }, // USB HDD
{ 4, 3, 0, 6 }, // USB CD
{ 4, 1, 0, 0 }, // USB ZIP Bugbug since Class/SubClass code is uninitialized
{ 4, 2, 0, 0 } // USB ZIP Bugbug since Class/SubClass code is uninitialized
};
//
@ -29,23 +29,23 @@ EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
#define NULL_ROM_FILE_GUID \
{ 0x00000000, 0x0000, 0x0000, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }
SYSTEM_ROM_TABLE mSystemRomTable[] = {
{ SYSTEM_ROM_FILE_GUID, 1 },
{ NULL_ROM_FILE_GUID, 0 }
SYSTEM_ROM_TABLE mSystemRomTable[] = {
{ SYSTEM_ROM_FILE_GUID, 1 },
{ NULL_ROM_FILE_GUID, 0 }
};
EFI_HANDLE mVgaHandles[0x20];
EFI_HANDLE mDiskHandles[0x20];
EFI_HANDLE mIsaHandles[0x20];
EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] = {
{0x0B,0},
{0x09,0},
{0x0A,0},
{0x05,0},
{0x07,0},
{0x00,0},
{0x00,0}
EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] = {
{ 0x0B, 0 },
{ 0x09, 0 },
{ 0x0A, 0 },
{ 0x05, 0 },
{ 0x07, 0 },
{ 0x00, 0 },
{ 0x00, 0 }
};
//
@ -54,18 +54,18 @@ EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] =
// to check to get bus number. The Slot number - 1 is an index into a decode
// table to get the bridge information.
//
EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
{
EFI_LEGACY_PIRQ_TABLE_SIGNATURE, // UINT32 Signature
0x00, // UINT8 MinorVersion
0x01, // UINT8 MajorVersion
0x0000, // UINT16 TableSize
0x00, // UINT8 Bus
0x08, // UINT8 DevFun
0x0000, // UINT16 PciOnlyIrq
0x8086, // UINT16 CompatibleVid
0x122e, // UINT16 CompatibleDid
0x00000000, // UINT32 Miniport
0x00, // UINT8 MinorVersion
0x01, // UINT8 MajorVersion
0x0000, // UINT16 TableSize
0x00, // UINT8 Bus
0x08, // UINT8 DevFun
0x0000, // UINT16 PciOnlyIrq
0x8086, // UINT16 CompatibleVid
0x122e, // UINT16 CompatibleDid
0x00000000, // UINT32 Miniport
{ // UINT8 Reserved[11]
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00
@ -76,17 +76,29 @@ EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
// -- Pin 1 -- -- Pin 2 -- -- Pin 3 -- -- Pin 4 --
// Bus Dev Reg Map Reg Map Reg Map Reg Map
//
{0x00,0x08,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x00,0x00},
{0x00,0x10,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x01,0x00},
{0x00,0x18,{{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8}},0x02,0x00},
{0x00,0x20,{{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8}},0x03,0x00},
{0x00,0x28,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x04,0x00},
{0x00,0x30,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x05,0x00},
{ 0x00, 0x08, {
{ 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }
}, 0x00, 0x00 },
{ 0x00, 0x10, {
{ 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }
}, 0x01, 0x00 },
{ 0x00, 0x18, {
{ 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }
}, 0x02, 0x00 },
{ 0x00, 0x20, {
{ 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }
}, 0x03, 0x00 },
{ 0x00, 0x28, {
{ 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }
}, 0x04, 0x00 },
{ 0x00, 0x30, {
{ 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }
}, 0x05, 0x00 },
}
};
LEGACY_BIOS_PLATFORM_INSTANCE mPrivateData;
EFI_HANDLE mImageHandle = NULL;
LEGACY_BIOS_PLATFORM_INSTANCE mPrivateData;
EFI_HANDLE mImageHandle = NULL;
/**
Return the handles and assorted information for the specified PCI Class code
@ -102,32 +114,32 @@ EFI_HANDLE mImageHandle = NULL;
**/
EFI_STATUS
FindAllDeviceTypes (
IN PCI_CLASS_RECORD *PciClasses,
IN OUT DEVICE_STRUCTURE *DeviceTable,
IN OUT UINT16 *DeviceIndex,
IN BOOLEAN DeviceFlags
IN PCI_CLASS_RECORD *PciClasses,
IN OUT DEVICE_STRUCTURE *DeviceTable,
IN OUT UINT16 *DeviceIndex,
IN BOOLEAN DeviceFlags
)
{
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN StartIndex;
PCI_TYPE00 PciConfigHeader;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
UINTN Flags;
EFI_STATUS Status;
UINTN Index2;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN StartIndex;
PCI_TYPE00 PciConfigHeader;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
UINTN Flags;
EFI_STATUS Status;
UINTN Index2;
//
// Get legacy BIOS protocol as it is required to deal with Option ROMs.
//
StartIndex = *DeviceIndex;
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
);
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID **)&LegacyBios
);
ASSERT_EFI_ERROR (Status);
//
@ -144,7 +156,7 @@ FindAllDeviceTypes (
gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiPciIoProtocolGuid,
(VOID**)&PciIo
(VOID **)&PciIo
);
PciIo->Pci.Read (
PciIo,
@ -154,8 +166,9 @@ FindAllDeviceTypes (
&PciConfigHeader
);
for (Index2 = 0; PciClasses[Index2].Class != 0xff; Index2++) {
if ((PciConfigHeader.Hdr.ClassCode[2] == PciClasses[Index2].Class) &&
(PciConfigHeader.Hdr.ClassCode[1] == PciClasses[Index2].SubClass)) {
if ((PciConfigHeader.Hdr.ClassCode[2] == PciClasses[Index2].Class) &&
(PciConfigHeader.Hdr.ClassCode[1] == PciClasses[Index2].SubClass))
{
LegacyBios->CheckPciRom (
LegacyBios,
HandleBuffer[Index],
@ -173,13 +186,14 @@ FindAllDeviceTypes (
if (
((DeviceFlags != 0) && (Flags == NO_ROM)) ||
((Flags & (ROM_FOUND | VALID_LEGACY_ROM)) == (ROM_FOUND | VALID_LEGACY_ROM))
) {
)
{
DeviceTable->Handle = HandleBuffer[Index];
DeviceTable->Vid = PciConfigHeader.Hdr.VendorId;
DeviceTable->Did = PciConfigHeader.Hdr.DeviceId;
DeviceTable->SvId = PciConfigHeader.Device.SubsystemVendorID;
DeviceTable->SysId = PciConfigHeader.Device.SubsystemID;
++ *DeviceIndex;
++*DeviceIndex;
DeviceTable++;
}
}
@ -211,8 +225,8 @@ FindAllDeviceTypes (
EFI_STATUS
EFIAPI
SmmInit (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN VOID *EfiToLegacy16BootTable
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN VOID *EfiToLegacy16BootTable
)
{
return EFI_SUCCESS;
@ -226,23 +240,23 @@ SmmInit (
**/
VOID
GetSelectedVgaDeviceInfo (
OUT EFI_HANDLE *VgaHandle
OUT EFI_HANDLE *VgaHandle
)
{
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT8 MinBus;
UINT8 MaxBus;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
UINTN SelectedAddress;
UINTN CurrentAddress;
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT8 MinBus;
UINT8 MaxBus;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
UINTN SelectedAddress;
UINTN CurrentAddress;
//
// Initialize return to 'not found' state
@ -253,9 +267,9 @@ GetSelectedVgaDeviceInfo (
// Initialize variable states. This is important for selecting the VGA
// device if multiple devices exist behind a single bridge.
//
HandleCount = 0;
HandleBuffer = NULL;
SelectedAddress = PCI_LIB_ADDRESS(0xff, 0x1f, 0x7, 0);
HandleCount = 0;
HandleBuffer = NULL;
SelectedAddress = PCI_LIB_ADDRESS (0xff, 0x1f, 0x7, 0);
//
// The bus range to search for a VGA device in.
@ -265,27 +279,27 @@ GetSelectedVgaDeviceInfo (
//
// Start to check all the pci io to find all possible VGA device
//
HandleCount = 0;
HandleCount = 0;
HandleBuffer = NULL;
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
if (EFI_ERROR (Status)) {
return;
}
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID**)&PciIo);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID **)&PciIo);
if (!EFI_ERROR (Status)) {
//
// Determine if this is in the correct bus range.
//
Status = PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
if (EFI_ERROR(Status) || (Bus < MinBus || Bus > MaxBus)) {
if (EFI_ERROR (Status) || ((Bus < MinBus) || (Bus > MaxBus))) {
continue;
}
@ -293,12 +307,12 @@ GetSelectedVgaDeviceInfo (
// Read device information.
//
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
if (EFI_ERROR (Status)) {
continue;
}
@ -309,7 +323,9 @@ GetSelectedVgaDeviceInfo (
if (!IS_PCI_VGA (&Pci)) {
continue;
}
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"PCI VGA: 0x%04x:0x%04x\n",
Pci.Hdr.VendorId,
Pci.Hdr.DeviceId
@ -319,10 +335,10 @@ GetSelectedVgaDeviceInfo (
// Currently we use the lowest numbered bus/device/function if multiple
// devices are found in the target bus range.
//
CurrentAddress = PCI_LIB_ADDRESS(Bus, Device, Function, 0);
CurrentAddress = PCI_LIB_ADDRESS (Bus, Device, Function, 0);
if (CurrentAddress < SelectedAddress) {
SelectedAddress = CurrentAddress;
*VgaHandle = HandleBuffer[Index];
*VgaHandle = HandleBuffer[Index];
}
}
}
@ -330,7 +346,6 @@ GetSelectedVgaDeviceInfo (
FreePool (HandleBuffer);
}
/**
Returns a buffer of handles for the requested subfunction.
@ -349,42 +364,42 @@ GetSelectedVgaDeviceInfo (
EFI_STATUS
EFIAPI
GetPlatformHandle (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE **HandleBuffer,
OUT UINTN *HandleCount,
OUT VOID **AdditionalData OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE **HandleBuffer,
OUT UINTN *HandleCount,
OUT VOID **AdditionalData OPTIONAL
)
{
DEVICE_STRUCTURE LocalDevice[0x40];
UINT32 LocalIndex;
UINT32 Index;
DEVICE_STRUCTURE TempDevice;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
HDD_INFO *HddInfo;
PCI_TYPE00 PciConfigHeader;
UINT32 HddIndex;
EFI_HANDLE IdeHandle;
DEVICE_STRUCTURE LocalDevice[0x40];
UINT32 LocalIndex;
UINT32 Index;
DEVICE_STRUCTURE TempDevice;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
HDD_INFO *HddInfo;
PCI_TYPE00 PciConfigHeader;
UINT32 HddIndex;
EFI_HANDLE IdeHandle;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
PCI_CLASS_RECORD ClassLists[10];
UINTN PriorityIndex;
PCI_CLASS_RECORD ClassLists[10];
UINTN PriorityIndex;
static BOOLEAN bConnected = FALSE;
static BOOLEAN bConnected = FALSE;
LocalIndex = 0x00;
HddInfo = NULL;
HddIndex = 0;
LocalIndex = 0x00;
HddInfo = NULL;
HddIndex = 0;
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
(VOID **)&LegacyBios
);
//
@ -400,9 +415,9 @@ GetPlatformHandle (
*HandleCount = (mVgaHandles[0] != NULL) ? 1 : 0;
return EFI_SUCCESS;
case EfiGetPlatformIdeHandle:
IdeHandle = NULL;
IdeHandle = NULL;
if (AdditionalData != NULL) {
HddInfo = (HDD_INFO *) *AdditionalData;
HddInfo = (HDD_INFO *)*AdditionalData;
}
//
@ -417,7 +432,7 @@ GetPlatformHandle (
ClassLists[3].Class = PCI_CLASS_MASS_STORAGE;
ClassLists[3].SubClass = PCI_CLASS_MASS_STORAGE_SATADPA;
ClassLists[4].Class = 0xff;
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *) &LocalIndex, TRUE);
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *)&LocalIndex, TRUE);
if (LocalIndex == 0) {
return EFI_NOT_FOUND;
}
@ -449,10 +464,10 @@ GetPlatformHandle (
//
PriorityIndex = 0;
for (Index = 0; Index < LocalIndex; Index++) {
if (LocalDevice[Index].Handle == IdeHandle && PriorityIndex == 0) {
TempDevice = LocalDevice[PriorityIndex];
if ((LocalDevice[Index].Handle == IdeHandle) && (PriorityIndex == 0)) {
TempDevice = LocalDevice[PriorityIndex];
LocalDevice[PriorityIndex] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
LocalDevice[Index] = TempDevice;
PriorityIndex++;
break;
}
@ -464,6 +479,7 @@ GetPlatformHandle (
for (Index = 0; Index < LocalIndex; Index++) {
mDiskHandles[Index] = LocalDevice[Index].Handle;
}
*HandleBuffer = &mDiskHandles[0];
*HandleCount = LocalIndex;
@ -477,11 +493,12 @@ GetPlatformHandle (
//
for (Index = 0; (Index < LocalIndex) && (AdditionalData != NULL); Index++) {
if ((LocalDevice[Index].Handle != NULL) &&
(LocalDevice[Index].Handle == IdeHandle)) {
(LocalDevice[Index].Handle == IdeHandle))
{
Status = gBS->HandleProtocol (
LocalDevice[Index].Handle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
PciIo->Pci.Read (
PciIo,
@ -503,14 +520,14 @@ GetPlatformHandle (
// Be sure to only fill out correct information based on platform
// configuration.
//
HddInfo[HddIndex].Status |= HDD_PRIMARY;
HddInfo[HddIndex].Bus = (UINT32)Bus;
HddInfo[HddIndex].Device = (UINT32)Device;
HddInfo[HddIndex].Function = (UINT32)Function;
HddInfo[HddIndex + 1].Status |= HDD_SECONDARY;
HddInfo[HddIndex + 1].Bus = (UINT32)Bus;
HddInfo[HddIndex + 1].Device = (UINT32)Device;
HddInfo[HddIndex + 1].Function = (UINT32)Function;
HddInfo[HddIndex].Status |= HDD_PRIMARY;
HddInfo[HddIndex].Bus = (UINT32)Bus;
HddInfo[HddIndex].Device = (UINT32)Device;
HddInfo[HddIndex].Function = (UINT32)Function;
HddInfo[HddIndex + 1].Status |= HDD_SECONDARY;
HddInfo[HddIndex + 1].Bus = (UINT32)Bus;
HddInfo[HddIndex + 1].Device = (UINT32)Device;
HddInfo[HddIndex + 1].Function = (UINT32)Function;
//
// Primary controller data
@ -524,11 +541,12 @@ GetPlatformHandle (
(UINT16)(PciConfigHeader.Device.Bar[4] & 0xfffc);
HddInfo[HddIndex].HddIrq = PciConfigHeader.Device.InterruptLine;
} else {
HddInfo[HddIndex].HddIrq = 14;
HddInfo[HddIndex].HddIrq = 14;
HddInfo[HddIndex].CommandBaseAddress = 0x1f0;
HddInfo[HddIndex].ControlBaseAddress = 0x3f6;
HddInfo[HddIndex].BusMasterAddress = 0;
HddInfo[HddIndex].BusMasterAddress = 0;
}
HddIndex++;
//
@ -543,27 +561,29 @@ GetPlatformHandle (
(UINT16)(HddInfo[HddIndex].BusMasterAddress + 8);
HddInfo[HddIndex].HddIrq = PciConfigHeader.Device.InterruptLine;
} else {
HddInfo[HddIndex].HddIrq = 15;
HddInfo[HddIndex].HddIrq = 15;
HddInfo[HddIndex].CommandBaseAddress = 0x170;
HddInfo[HddIndex].ControlBaseAddress = 0x376;
HddInfo[HddIndex].BusMasterAddress = 0;
HddInfo[HddIndex].BusMasterAddress = 0;
}
HddIndex++;
}
}
}
return EFI_SUCCESS;
case EfiGetPlatformIsaBusHandle:
ClassLists[0].Class = (UINT8) PCI_CLASS_BRIDGE;
ClassLists[0].SubClass = (UINT8) PCI_CLASS_BRIDGE_ISA_PDECODE;
ClassLists[1].Class = (UINT8) PCI_CLASS_BRIDGE;
ClassLists[1].SubClass = (UINT8) PCI_CLASS_BRIDGE_ISA;
ClassLists[0].Class = (UINT8)PCI_CLASS_BRIDGE;
ClassLists[0].SubClass = (UINT8)PCI_CLASS_BRIDGE_ISA_PDECODE;
ClassLists[1].Class = (UINT8)PCI_CLASS_BRIDGE;
ClassLists[1].SubClass = (UINT8)PCI_CLASS_BRIDGE_ISA;
ClassLists[2].Class = 0xff;
//
// Locate all found block io devices
//
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *) (&LocalIndex), TRUE);
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *)(&LocalIndex), TRUE);
if (LocalIndex == 0) {
return EFI_NOT_FOUND;
}
@ -573,9 +593,9 @@ GetPlatformHandle (
//
for (Index = 0; Index < LocalIndex; Index++) {
if (LocalDevice[Index].Vid == V_INTEL_VENDOR_ID) {
TempDevice = LocalDevice[0];
LocalDevice[0] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
TempDevice = LocalDevice[0];
LocalDevice[0] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
}
}
@ -585,13 +605,14 @@ GetPlatformHandle (
for (Index = 0; Index < LocalIndex; Index++) {
mIsaHandles[Index] = LocalDevice[Index].Handle;
}
*HandleBuffer = &mIsaHandles[0];
*HandleCount = LocalIndex;
return EFI_SUCCESS;
case EfiGetPlatformUsbHandle:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@ -613,13 +634,13 @@ GetPlatformHandle (
EFI_STATUS
EFIAPI
PlatformHooks (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HOOK_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE DeviceHandle OPTIONAL,
IN OUT UINTN *Shadowaddress OPTIONAL,
IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table OPTIONAL,
OUT VOID **AdditionalData OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HOOK_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE DeviceHandle OPTIONAL,
IN OUT UINTN *Shadowaddress OPTIONAL,
IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table OPTIONAL,
OUT VOID **AdditionalData OPTIONAL
)
{
EFI_IA32_REGISTER_SET Regs;
@ -631,7 +652,7 @@ PlatformHooks (
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
(VOID **)&LegacyBios
);
//
@ -639,14 +660,14 @@ PlatformHooks (
//
Regs.H.AH = 0x00;
Regs.H.AL = 0x03;
Status = LegacyBios->Int86 (LegacyBios, 0x10, &Regs);
Status = LegacyBios->Int86 (LegacyBios, 0x10, &Regs);
return Status;
case EfiPlatformHookShadowServiceRoms:
return EFI_SUCCESS;
case EfiPlatformHookAfterRomInit:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@ -671,24 +692,24 @@ PlatformHooks (
EFI_STATUS
EFIAPI
GetRoutingTable (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
OUT VOID **RoutingTable,
OUT UINTN *RoutingTableEntries,
OUT VOID **LocalPirqTable OPTIONAL,
OUT UINTN *PirqTableSize OPTIONAL,
OUT VOID **LocalIrqPriorityTable OPTIONAL,
OUT UINTN *IrqPriorityTableEntries OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
OUT VOID **RoutingTable,
OUT UINTN *RoutingTableEntries,
OUT VOID **LocalPirqTable OPTIONAL,
OUT UINTN *PirqTableSize OPTIONAL,
OUT VOID **LocalIrqPriorityTable OPTIONAL,
OUT UINTN *IrqPriorityTableEntries OPTIONAL
)
{
UINT16 PTableSize;
UINT32 Index;
UINT8 Bus;
UINT8 Device;
UINT8 Function;
UINT8 Checksum;
UINT8 *Ptr;
EFI_STATUS Status;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
UINT16 PTableSize;
UINT32 Index;
UINT8 Bus;
UINT8 Device;
UINT8 Function;
UINT8 Checksum;
UINT8 *Ptr;
EFI_STATUS Status;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
Checksum = 0;
@ -699,7 +720,7 @@ GetRoutingTable (
Status = gBS->LocateProtocol (
&gEfiLegacyInterruptProtocolGuid,
NULL,
(VOID**)&LegacyInterrupt
(VOID **)&LegacyInterrupt
);
ASSERT_EFI_ERROR (Status);
LegacyInterrupt->GetLocation (
@ -714,34 +735,35 @@ GetRoutingTable (
//
PirqTableHead.PirqTable.TableSize = PTableSize;
PirqTableHead.PirqTable.Bus = Bus;
PirqTableHead.PirqTable.DevFun = (UINT8) ((Device << 3) + Function);
Ptr = (UINT8 *) (&PirqTableHead);
PirqTableHead.PirqTable.DevFun = (UINT8)((Device << 3) + Function);
Ptr = (UINT8 *)(&PirqTableHead);
//
// Calculate checksum.
//
for (Index = 0; Index < PTableSize; Index++) {
Checksum = (UINT8) (Checksum + (UINT8) *Ptr);
Ptr += 1;
Checksum = (UINT8)(Checksum + (UINT8)*Ptr);
Ptr += 1;
}
Checksum = (UINT8) (0x00 - Checksum);
PirqTableHead.PirqTable.Checksum = Checksum;
Checksum = (UINT8)(0x00 - Checksum);
PirqTableHead.PirqTable.Checksum = Checksum;
//
// Update return values.
//
*LocalPirqTable = (VOID *) (&PirqTableHead);
*PirqTableSize = PTableSize;
*LocalPirqTable = (VOID *)(&PirqTableHead);
*PirqTableSize = PTableSize;
}
//
// More items to return.
//
*RoutingTable = PirqTableHead.IrqRoutingEntry;
*RoutingTableEntries = MAX_IRQ_ROUTING_ENTRIES;
*RoutingTable = PirqTableHead.IrqRoutingEntry;
*RoutingTableEntries = MAX_IRQ_ROUTING_ENTRIES;
if (LocalIrqPriorityTable != NULL) {
*LocalIrqPriorityTable = IrqPriorityTable;
*IrqPriorityTableEntries = MAX_IRQ_PRIORITY_ENTRIES;
*LocalIrqPriorityTable = IrqPriorityTable;
*IrqPriorityTableEntries = MAX_IRQ_PRIORITY_ENTRIES;
}
return EFI_SUCCESS;
@ -767,18 +789,18 @@ GetRoutingTable (
EFI_STATUS
EFIAPI
GetPlatformInfo (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_INFO_MODE Mode,
OUT VOID **Table,
OUT UINTN *TableSize,
OUT UINTN *Location,
OUT UINTN *Alignment,
IN UINT16 LegacySegment,
IN UINT16 LegacyOffset
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_INFO_MODE Mode,
OUT VOID **Table,
OUT UINTN *TableSize,
OUT UINTN *Location,
OUT UINTN *Alignment,
IN UINT16 LegacySegment,
IN UINT16 LegacyOffset
)
{
EFI_STATUS Status;
UINTN Index;
EFI_STATUS Status;
UINTN Index;
switch (Mode) {
case EfiGetPlatformBinarySystemRom:
@ -791,11 +813,12 @@ GetPlatformInfo (
EFI_SECTION_RAW,
0,
Table,
(UINTN *) TableSize
(UINTN *)TableSize
);
if (EFI_ERROR (Status)) {
continue;
}
return EFI_SUCCESS;
}
@ -808,7 +831,7 @@ GetPlatformInfo (
case EfiGetPlatformPciExpressBase:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@ -830,34 +853,35 @@ GetPlatformInfo (
EFI_STATUS
EFIAPI
TranslatePirq (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN UINTN PciBus,
IN UINTN PciDevice,
IN UINTN PciFunction,
IN OUT UINT8 *Pirq,
OUT UINT8 *PciIrq
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN UINTN PciBus,
IN UINTN PciDevice,
IN UINTN PciFunction,
IN OUT UINT8 *Pirq,
OUT UINT8 *PciIrq
)
{
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
EFI_STATUS Status;
UINTN Index;
UINTN Index1;
UINT8 LocalPirq;
UINT8 PirqData;
UINT8 MatchData;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
EFI_STATUS Status;
UINTN Index;
UINTN Index1;
UINT8 LocalPirq;
UINT8 PirqData;
UINT8 MatchData;
Status = gBS->LocateProtocol (
&gEfiLegacyInterruptProtocolGuid,
NULL,
(VOID**)&LegacyInterrupt
(VOID **)&LegacyInterrupt
);
ASSERT_EFI_ERROR (Status);
LocalPirq = (UINT8) (*Pirq);
LocalPirq = (UINT8)(*Pirq);
for (Index = 0; Index < MAX_IRQ_ROUTING_ENTRIES; Index++) {
if ((PirqTableHead.IrqRoutingEntry[Index].Bus == PciBus) &&
(PirqTableHead.IrqRoutingEntry[Index].Device == PciDevice)) {
LocalPirq = (UINT8) (PirqTableHead.IrqRoutingEntry[Index].PirqEntry[LocalPirq].Pirq & 0x0f);
(PirqTableHead.IrqRoutingEntry[Index].Device == PciDevice))
{
LocalPirq = (UINT8)(PirqTableHead.IrqRoutingEntry[Index].PirqEntry[LocalPirq].Pirq & 0x0f);
if (LocalPirq > 4) {
LocalPirq -= 4;
}
@ -867,8 +891,9 @@ TranslatePirq (
while (PirqData == 0) {
for (Index1 = 0; Index1 < MAX_IRQ_PRIORITY_ENTRIES; Index1++) {
if ((IrqPriorityTable[Index1].Used == MatchData) &&
(IrqPriorityTable[Index1].Irq != 0)) {
PirqData = IrqPriorityTable[Index1].Irq;
(IrqPriorityTable[Index1].Irq != 0))
{
PirqData = IrqPriorityTable[Index1].Irq;
IrqPriorityTable[Index1].Used = 0xff;
LegacyInterrupt->WritePirq (
LegacyInterrupt,
@ -880,11 +905,10 @@ TranslatePirq (
}
if (PirqData == 0) {
//
// No unused interrupts, so start reusing them.
//
MatchData = (UINT8) (~MatchData);
MatchData = (UINT8)(~MatchData);
}
}
@ -896,7 +920,6 @@ TranslatePirq (
return EFI_SUCCESS;
}
/**
Attempt to legacy boot the BootOption. If the EFI contexted has been
compromised this function will not return.
@ -914,26 +937,26 @@ TranslatePirq (
EFI_STATUS
EFIAPI
PrepareToBoot (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
IN VOID *BbsTable,
IN UINT32 LoadOptionsSize,
IN VOID *LoadOptions,
IN VOID *EfiToLegacy16BootTable
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
IN VOID *BbsTable,
IN UINT32 LoadOptionsSize,
IN VOID *LoadOptions,
IN VOID *EfiToLegacy16BootTable
)
{
BBS_TABLE *LocalBbsTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *Legacy16BootTable;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
UINT16 DevicePathType;
UINT16 Index;
UINT16 Priority;
BBS_TABLE *LocalBbsTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *Legacy16BootTable;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
UINT16 DevicePathType;
UINT16 Index;
UINT16 Priority;
//
// Initialize values
//
Priority = 0;
Legacy16BootTable = (EFI_TO_COMPATIBILITY16_BOOT_TABLE*) EfiToLegacy16BootTable;
Priority = 0;
Legacy16BootTable = (EFI_TO_COMPATIBILITY16_BOOT_TABLE *)EfiToLegacy16BootTable;
//
// Set how Gate A20 is gated by hardware
@ -943,7 +966,7 @@ PrepareToBoot (
SioPtr->Flags.A20Port90 = 1;
SioPtr->MousePresent = 1;
LocalBbsTable = BbsTable;
LocalBbsTable = BbsTable;
//
// There are 2 cases that must be covered.
@ -966,8 +989,9 @@ PrepareToBoot (
if ((LocalBbsTable[Index].BootPriority != BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].BootPriority != BBS_IGNORE_ENTRY) &&
(LocalBbsTable[Index].BootPriority != BBS_LOWEST_PRIORITY) &&
(Priority <= LocalBbsTable[Index].BootPriority)) {
Priority = (UINT16) (LocalBbsTable[Index].BootPriority + 1);
(Priority <= LocalBbsTable[Index].BootPriority))
{
Priority = (UINT16)(LocalBbsTable[Index].BootPriority + 1);
}
}
@ -978,28 +1002,32 @@ PrepareToBoot (
case BBS_EMBED_NETWORK:
for (Index = 0; Index < Legacy16BootTable->NumberBbsEntries; Index++) {
if ((LocalBbsTable[Index].BootPriority == BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].DeviceType == DevicePathType)) {
(LocalBbsTable[Index].DeviceType == DevicePathType))
{
LocalBbsTable[Index].BootPriority = Priority;
++Priority;
}
}
break;
case BBS_BEV_DEVICE:
for (Index = 0; Index < Legacy16BootTable->NumberBbsEntries; Index++) {
if ((LocalBbsTable[Index].BootPriority == BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].Class == 01) &&
(LocalBbsTable[Index].SubClass == 01)) {
(LocalBbsTable[Index].SubClass == 01))
{
LocalBbsTable[Index].BootPriority = Priority;
++Priority;
}
}
break;
case BBS_USB:
case BBS_PCMCIA:
case BBS_UNKNOWN:
default:
break;
};
}
//
// Set priority for rest of devices
@ -1014,7 +1042,6 @@ PrepareToBoot (
return EFI_SUCCESS;
}
/**
Initialize Legacy Platform support
@ -1026,16 +1053,16 @@ LegacyBiosPlatformInstall (
VOID
)
{
EFI_STATUS Status;
LEGACY_BIOS_PLATFORM_INSTANCE *Private;
EFI_STATUS Status;
LEGACY_BIOS_PLATFORM_INSTANCE *Private;
mImageHandle = gImageHandle;
Private = &mPrivateData;
Private = &mPrivateData;
//
// Grab a copy of all the protocols we depend on.
//
Private->Signature = LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE;
Private->Signature = LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE;
Private->LegacyBiosPlatform.GetPlatformInfo = GetPlatformInfo;
Private->LegacyBiosPlatform.GetPlatformHandle = GetPlatformHandle;
Private->LegacyBiosPlatform.SmmInit = SmmInit;
@ -1043,17 +1070,17 @@ LegacyBiosPlatformInstall (
Private->LegacyBiosPlatform.GetRoutingTable = GetRoutingTable;
Private->LegacyBiosPlatform.TranslatePirq = TranslatePirq;
Private->LegacyBiosPlatform.PrepareToBoot = PrepareToBoot;
Private->ImageHandle = gImageHandle;
Private->ImageHandle = gImageHandle;
//
// Make a new handle and install the protocol
//
Private->Handle = NULL;
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosPlatformProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBiosPlatform
);
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosPlatformProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBiosPlatform
);
return Status;
}

51
OvmfPkg/Csm/CsmSupportLib/LegacyPlatform.h
View File

@ -38,54 +38,54 @@
//
// PIRQ information constants.
//
#define MAX_IRQ_ROUTING_ENTRIES 6
#define MAX_IRQ_PRIORITY_ENTRIES 7
#define MAX_IRQ_ROUTING_ENTRIES 6
#define MAX_IRQ_PRIORITY_ENTRIES 7
#define V_INTEL_VENDOR_ID 0x8086
#define V_PIIX4_IDE_DEVICE_ID 0x7010
#define V_INTEL_VENDOR_ID 0x8086
#define V_PIIX4_IDE_DEVICE_ID 0x7010
//
// Type declarations
//
typedef struct {
UINT8 SetupValue;
UINT16 DeviceType;
UINT8 Class;
UINT8 SubClass;
UINT8 SetupValue;
UINT16 DeviceType;
UINT8 Class;
UINT8 SubClass;
} EFI_SETUP_BBS_MAP;
typedef struct {
UINT8 Class;
UINT8 SubClass;
UINT8 Class;
UINT8 SubClass;
} PCI_CLASS_RECORD;
typedef struct {
EFI_LEGACY_PIRQ_TABLE_HEADER PirqTable;
EFI_LEGACY_IRQ_ROUTING_ENTRY IrqRoutingEntry[MAX_IRQ_ROUTING_ENTRIES];
EFI_LEGACY_PIRQ_TABLE_HEADER PirqTable;
EFI_LEGACY_IRQ_ROUTING_ENTRY IrqRoutingEntry[MAX_IRQ_ROUTING_ENTRIES];
} EFI_LEGACY_PIRQ_TABLE;
typedef struct {
EFI_HANDLE Handle;
UINT16 Vid;
UINT16 Did;
UINT16 SvId;
UINT16 SysId;
EFI_HANDLE Handle;
UINT16 Vid;
UINT16 Did;
UINT16 SvId;
UINT16 SysId;
} DEVICE_STRUCTURE;
typedef struct {
EFI_GUID FileName;
UINTN Valid;
EFI_GUID FileName;
UINTN Valid;
} SYSTEM_ROM_TABLE;
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
EFI_LEGACY_BIOS_PLATFORM_PROTOCOL LegacyBiosPlatform;
EFI_HANDLE ImageHandle;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
UINT32 Signature;
EFI_HANDLE Handle;
EFI_LEGACY_BIOS_PLATFORM_PROTOCOL LegacyBiosPlatform;
EFI_HANDLE ImageHandle;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
} LEGACY_BIOS_PLATFORM_INSTANCE;
#define LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE SIGNATURE_32('P','B','I','O')
#define LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE SIGNATURE_32('P','B','I','O')
#define LEGACY_BIOS_PLATFORM_INSTANCE_FROM_THIS(this) \
CR (this, \
@ -95,4 +95,3 @@ typedef struct {
)
#endif

192
OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
View File

@ -29,55 +29,55 @@
// 0xEC000-0xEFFFF 0x5f 0x96 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal
// 0xF0000-0xFFFFF 0x59 0x90 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal
//
STATIC LEGACY_MEMORY_SECTION_INFO mSectionArray[] = {
{0xC0000, SIZE_16KB, FALSE, FALSE},
{0xC4000, SIZE_16KB, FALSE, FALSE},
{0xC8000, SIZE_16KB, FALSE, FALSE},
{0xCC000, SIZE_16KB, FALSE, FALSE},
{0xD0000, SIZE_16KB, FALSE, FALSE},
{0xD4000, SIZE_16KB, FALSE, FALSE},
{0xD8000, SIZE_16KB, FALSE, FALSE},
{0xDC000, SIZE_16KB, FALSE, FALSE},
{0xE0000, SIZE_16KB, FALSE, FALSE},
{0xE4000, SIZE_16KB, FALSE, FALSE},
{0xE8000, SIZE_16KB, FALSE, FALSE},
{0xEC000, SIZE_16KB, FALSE, FALSE},
{0xF0000, SIZE_64KB, FALSE, FALSE}
STATIC LEGACY_MEMORY_SECTION_INFO mSectionArray[] = {
{ 0xC0000, SIZE_16KB, FALSE, FALSE },
{ 0xC4000, SIZE_16KB, FALSE, FALSE },
{ 0xC8000, SIZE_16KB, FALSE, FALSE },
{ 0xCC000, SIZE_16KB, FALSE, FALSE },
{ 0xD0000, SIZE_16KB, FALSE, FALSE },
{ 0xD4000, SIZE_16KB, FALSE, FALSE },
{ 0xD8000, SIZE_16KB, FALSE, FALSE },
{ 0xDC000, SIZE_16KB, FALSE, FALSE },
{ 0xE0000, SIZE_16KB, FALSE, FALSE },
{ 0xE4000, SIZE_16KB, FALSE, FALSE },
{ 0xE8000, SIZE_16KB, FALSE, FALSE },
{ 0xEC000, SIZE_16KB, FALSE, FALSE },
{ 0xF0000, SIZE_64KB, FALSE, FALSE }
};
STATIC PAM_REGISTER_VALUE mRegisterValues440[] = {
{PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20}
{ PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20 }
};
STATIC PAM_REGISTER_VALUE mRegisterValuesQ35[] = {
{DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20}
{ DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20 }
};
STATIC PAM_REGISTER_VALUE *mRegisterValues;
STATIC PAM_REGISTER_VALUE *mRegisterValues;
//
// Handle used to install the Legacy Region Protocol
@ -98,25 +98,26 @@ STATIC EFI_LEGACY_REGION2_PROTOCOL mLegacyRegion2 = {
STATIC
EFI_STATUS
LegacyRegionManipulationInternal (
IN UINT32 Start,
IN UINT32 Length,
IN BOOLEAN *ReadEnable,
IN BOOLEAN *WriteEnable,
OUT UINT32 *Granularity
IN UINT32 Start,
IN UINT32 Length,
IN BOOLEAN *ReadEnable,
IN BOOLEAN *WriteEnable,
OUT UINT32 *Granularity
)
{
UINT32 EndAddress;
UINTN Index;
UINTN StartIndex;
UINT32 EndAddress;
UINTN Index;
UINTN StartIndex;
//
// Validate input parameters.
//
if (Length == 0 || Granularity == NULL) {
if ((Length == 0) || (Granularity == NULL)) {
return EFI_INVALID_PARAMETER;
}
EndAddress = Start + Length - 1;
if ((Start < PAM_BASE_ADDRESS) || EndAddress > PAM_LIMIT_ADDRESS) {
if ((Start < PAM_BASE_ADDRESS) || (EndAddress > PAM_LIMIT_ADDRESS)) {
return EFI_INVALID_PARAMETER;
}
@ -130,6 +131,7 @@ LegacyRegionManipulationInternal (
break;
}
}
ASSERT (Index < ARRAY_SIZE (mSectionArray));
//
@ -145,10 +147,11 @@ LegacyRegionManipulationInternal (
} else {
PciAnd8 (
mRegisterValues[Index].PAMRegPciLibAddress,
(UINT8) (~mRegisterValues[Index].ReadEnableData)
(UINT8)(~mRegisterValues[Index].ReadEnableData)
);
}
}
if (WriteEnable != NULL) {
if (*WriteEnable) {
PciOr8 (
@ -158,7 +161,7 @@ LegacyRegionManipulationInternal (
} else {
PciAnd8 (
mRegisterValues[Index].PAMRegPciLibAddress,
(UINT8) (~mRegisterValues[Index].WriteEnableData)
(UINT8)(~mRegisterValues[Index].WriteEnableData)
);
}
}
@ -171,6 +174,7 @@ LegacyRegionManipulationInternal (
break;
}
}
ASSERT (Index < ARRAY_SIZE (mSectionArray));
return EFI_SUCCESS;
@ -179,30 +183,31 @@ LegacyRegionManipulationInternal (
STATIC
EFI_STATUS
LegacyRegionGetInfoInternal (
OUT UINT32 *DescriptorCount,
OUT LEGACY_MEMORY_SECTION_INFO **Descriptor
OUT UINT32 *DescriptorCount,
OUT LEGACY_MEMORY_SECTION_INFO **Descriptor
)
{
UINTN Index;
UINT8 PamValue;
UINTN Index;
UINT8 PamValue;
//
// Check input parameters
//
if (DescriptorCount == NULL || Descriptor == NULL) {
if ((DescriptorCount == NULL) || (Descriptor == NULL)) {
return EFI_INVALID_PARAMETER;
}
//
// Fill in current status of legacy region.
//
*DescriptorCount = sizeof(mSectionArray) / sizeof (mSectionArray[0]);
*DescriptorCount = sizeof (mSectionArray) / sizeof (mSectionArray[0]);
for (Index = 0; Index < *DescriptorCount; Index++) {
PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);
PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);
mSectionArray[Index].ReadEnabled = FALSE;
if ((PamValue & mRegisterValues[Index].ReadEnableData) != 0) {
mSectionArray[Index].ReadEnabled = TRUE;
}
mSectionArray[Index].WriteEnabled = FALSE;
if ((PamValue & mRegisterValues[Index].WriteEnableData) != 0) {
mSectionArray[Index].WriteEnabled = TRUE;
@ -250,7 +255,6 @@ LegacyRegion2Decode (
return LegacyRegionManipulationInternal (Start, Length, On, NULL, Granularity);
}
/**
Modify the hardware to disallow memory attribute changes in a region.
@ -279,10 +283,10 @@ LegacyRegion2Decode (
EFI_STATUS
EFIAPI
LegacyRegion2BootLock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
)
{
if ((Start < 0xC0000) || ((Start + Length - 1) > 0xFFFFF)) {
@ -292,7 +296,6 @@ LegacyRegion2BootLock (
return EFI_UNSUPPORTED;
}
/**
Modify the hardware to disallow memory writes in a region.
@ -316,10 +319,10 @@ LegacyRegion2BootLock (
EFI_STATUS
EFIAPI
LegacyRegion2Lock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
)
{
BOOLEAN WriteEnable;
@ -328,7 +331,6 @@ LegacyRegion2Lock (
return LegacyRegionManipulationInternal (Start, Length, NULL, &WriteEnable, Granularity);
}
/**
Modify the hardware to allow memory writes in a region.
@ -391,11 +393,11 @@ LegacyRegionGetInfo (
OUT EFI_LEGACY_REGION_DESCRIPTOR **Descriptor
)
{
LEGACY_MEMORY_SECTION_INFO *SectionInfo;
UINT32 SectionCount;
EFI_LEGACY_REGION_DESCRIPTOR *DescriptorArray;
UINTN Index;
UINTN DescriptorIndex;
LEGACY_MEMORY_SECTION_INFO *SectionInfo;
UINT32 SectionCount;
EFI_LEGACY_REGION_DESCRIPTOR *DescriptorArray;
UINTN Index;
UINTN DescriptorIndex;
//
// Get section numbers and information
@ -416,10 +418,11 @@ LegacyRegionGetInfo (
DescriptorArray[DescriptorIndex].Length = SectionInfo[Index].Length;
DescriptorArray[DescriptorIndex].Granularity = SectionInfo[Index].Length;
if (SectionInfo[Index].ReadEnabled) {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionDecoded;
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionDecoded;
} else {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotDecoded;
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotDecoded;
}
DescriptorIndex++;
//
@ -433,6 +436,7 @@ LegacyRegionGetInfo (
} else {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionWriteDisabled;
}
DescriptorIndex++;
//
@ -445,7 +449,7 @@ LegacyRegionGetInfo (
DescriptorIndex++;
}
*DescriptorCount = (UINT32) DescriptorIndex;
*DescriptorCount = (UINT32)DescriptorIndex;
*Descriptor = DescriptorArray;
return EFI_SUCCESS;
@ -470,17 +474,21 @@ LegacyRegionInit (
//
HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
mRegisterValues = mRegisterValues440;
break;
case INTEL_Q35_MCH_DEVICE_ID:
mRegisterValues = mRegisterValuesQ35;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
case INTEL_82441_DEVICE_ID:
mRegisterValues = mRegisterValues440;
break;
case INTEL_Q35_MCH_DEVICE_ID:
mRegisterValues = mRegisterValuesQ35;
break;
default:
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
}
//
@ -488,11 +496,11 @@ LegacyRegionInit (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
&gEfiLegacyRegion2ProtocolGuid, &mLegacyRegion2,
&gEfiLegacyRegion2ProtocolGuid,
&mLegacyRegion2,
NULL
);
ASSERT_EFI_ERROR (Status);
return Status;
}

31
OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h
View File

@ -31,19 +31,19 @@
// Describes Legacy Region blocks and status.
//
typedef struct {
UINT32 Start;
UINT32 Length;
BOOLEAN ReadEnabled;
BOOLEAN WriteEnabled;
UINT32 Start;
UINT32 Length;
BOOLEAN ReadEnabled;
BOOLEAN WriteEnabled;
} LEGACY_MEMORY_SECTION_INFO;
//
// Provides a map of the PAM registers and bits used to set Read/Write access.
//
typedef struct {
UINTN PAMRegPciLibAddress;
UINT8 ReadEnableData;
UINT8 WriteEnableData;
UINTN PAMRegPciLibAddress;
UINT8 ReadEnableData;
UINT8 WriteEnableData;
} PAM_REGISTER_VALUE;
/**
@ -103,10 +103,10 @@ LegacyRegion2Decode (
EFI_STATUS
EFIAPI
LegacyRegion2Lock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
);
/**
@ -137,10 +137,10 @@ LegacyRegion2Lock (
EFI_STATUS
EFIAPI
LegacyRegion2BootLock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
);
/**
@ -200,4 +200,3 @@ LegacyRegionGetInfo (
);
#endif

11
OvmfPkg/Csm/Include/Framework/BootScript.h
View File

@ -17,25 +17,24 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// S3 Boot Script Table identifier.
///
#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
///
/// The opcode is used to add a record for memory reads of the memory location and continues when the
/// exit criteria is satisfied, or after a defined duration.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
///
/// The opcode is used to add a record for dispatching specified arbitrary code into a specified
/// boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
///
/// The opcode indicates the start of the boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
///
/// The opcode indicates the end of the boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
#endif

115
OvmfPkg/Csm/Include/Framework/DxeCis.h
View File

@ -33,35 +33,35 @@ typedef struct {
//
// Table header for the Framework EFI Runtime Services Table
//
EFI_TABLE_HEADER Hdr;
EFI_TABLE_HEADER Hdr;
//
// Time services
//
EFI_GET_TIME GetTime;
EFI_SET_TIME SetTime;
EFI_GET_WAKEUP_TIME GetWakeupTime;
EFI_SET_WAKEUP_TIME SetWakeupTime;
EFI_GET_TIME GetTime;
EFI_SET_TIME SetTime;
EFI_GET_WAKEUP_TIME GetWakeupTime;
EFI_SET_WAKEUP_TIME SetWakeupTime;
//
// Virtual memory services
//
EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
EFI_CONVERT_POINTER ConvertPointer;
EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
EFI_CONVERT_POINTER ConvertPointer;
//
// Variable services
//
EFI_GET_VARIABLE GetVariable;
EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
EFI_SET_VARIABLE SetVariable;
EFI_GET_VARIABLE GetVariable;
EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
EFI_SET_VARIABLE SetVariable;
//
// Misc
//
EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
EFI_RESET_SYSTEM ResetSystem;
EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
EFI_RESET_SYSTEM ResetSystem;
///
/// A Framework extension to the EFI 1.10 runtime table.
/// It was moved to a protocol to avoid conflict with UEFI 2.0.
///
EFI_REPORT_STATUS_CODE ReportStatusCode;
EFI_REPORT_STATUS_CODE ReportStatusCode;
} FRAMEWORK_EFI_RUNTIME_SERVICES;
///
@ -71,94 +71,94 @@ typedef struct {
///
/// The table header for the EFI Boot Services Table.
///
EFI_TABLE_HEADER Hdr;
EFI_TABLE_HEADER Hdr;
//
// Task Priority Services
//
EFI_RAISE_TPL RaiseTPL;
EFI_RESTORE_TPL RestoreTPL;
EFI_RAISE_TPL RaiseTPL;
EFI_RESTORE_TPL RestoreTPL;
//
// Memory Services
//
EFI_ALLOCATE_PAGES AllocatePages;
EFI_FREE_PAGES FreePages;
EFI_GET_MEMORY_MAP GetMemoryMap;
EFI_ALLOCATE_POOL AllocatePool;
EFI_FREE_POOL FreePool;
EFI_ALLOCATE_PAGES AllocatePages;
EFI_FREE_PAGES FreePages;
EFI_GET_MEMORY_MAP GetMemoryMap;
EFI_ALLOCATE_POOL AllocatePool;
EFI_FREE_POOL FreePool;
//
// Event & Timer Services
//
EFI_CREATE_EVENT CreateEvent;
EFI_SET_TIMER SetTimer;
EFI_WAIT_FOR_EVENT WaitForEvent;
EFI_SIGNAL_EVENT SignalEvent;
EFI_CLOSE_EVENT CloseEvent;
EFI_CHECK_EVENT CheckEvent;
EFI_CREATE_EVENT CreateEvent;
EFI_SET_TIMER SetTimer;
EFI_WAIT_FOR_EVENT WaitForEvent;
EFI_SIGNAL_EVENT SignalEvent;
EFI_CLOSE_EVENT CloseEvent;
EFI_CHECK_EVENT CheckEvent;
//
// Protocol Handler Services
//
EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
EFI_HANDLE_PROTOCOL HandleProtocol;
EFI_HANDLE_PROTOCOL PcHandleProtocol;
EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
EFI_LOCATE_HANDLE LocateHandle;
EFI_LOCATE_DEVICE_PATH LocateDevicePath;
EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
EFI_HANDLE_PROTOCOL HandleProtocol;
EFI_HANDLE_PROTOCOL PcHandleProtocol;
EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
EFI_LOCATE_HANDLE LocateHandle;
EFI_LOCATE_DEVICE_PATH LocateDevicePath;
EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
//
// Image Services
//
EFI_IMAGE_LOAD LoadImage;
EFI_IMAGE_START StartImage;
EFI_EXIT Exit;
EFI_IMAGE_UNLOAD UnloadImage;
EFI_EXIT_BOOT_SERVICES ExitBootServices;
EFI_IMAGE_LOAD LoadImage;
EFI_IMAGE_START StartImage;
EFI_EXIT Exit;
EFI_IMAGE_UNLOAD UnloadImage;
EFI_EXIT_BOOT_SERVICES ExitBootServices;
//
// Miscellaneous Services
//
EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
EFI_STALL Stall;
EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
EFI_STALL Stall;
EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
//
// DriverSupport Services
//
EFI_CONNECT_CONTROLLER ConnectController;
EFI_DISCONNECT_CONTROLLER DisconnectController;
EFI_CONNECT_CONTROLLER ConnectController;
EFI_DISCONNECT_CONTROLLER DisconnectController;
//
// Open and Close Protocol Services
//
EFI_OPEN_PROTOCOL OpenProtocol;
EFI_CLOSE_PROTOCOL CloseProtocol;
EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
EFI_OPEN_PROTOCOL OpenProtocol;
EFI_CLOSE_PROTOCOL CloseProtocol;
EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
//
// Library Services
//
EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
EFI_LOCATE_PROTOCOL LocateProtocol;
EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
EFI_LOCATE_PROTOCOL LocateProtocol;
EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
//
// 32-bit CRC Services
//
EFI_CALCULATE_CRC32 CalculateCrc32;
EFI_CALCULATE_CRC32 CalculateCrc32;
//
// Miscellaneous Services
//
EFI_COPY_MEM CopyMem;
EFI_SET_MEM SetMem;
EFI_COPY_MEM CopyMem;
EFI_SET_MEM SetMem;
} FRAMEWORK_EFI_BOOT_SERVICES;
#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
@ -167,4 +167,3 @@ typedef struct {
#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
#endif

56
OvmfPkg/Csm/Include/Framework/FirmwareVolumeHeader.h
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@ -17,38 +17,38 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Firmware Volume Block Attributes bit definitions.
///@{
#define EFI_FVB_READ_DISABLED_CAP 0x00000001
#define EFI_FVB_READ_ENABLED_CAP 0x00000002
#define EFI_FVB_READ_STATUS 0x00000004
#define EFI_FVB_READ_DISABLED_CAP 0x00000001
#define EFI_FVB_READ_ENABLED_CAP 0x00000002
#define EFI_FVB_READ_STATUS 0x00000004
#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
#define EFI_FVB_WRITE_STATUS 0x00000020
#define EFI_FVB_LOCK_CAP 0x00000040
#define EFI_FVB_LOCK_STATUS 0x00000080
#define EFI_FVB_LOCK_CAP 0x00000040
#define EFI_FVB_LOCK_STATUS 0x00000080
#define EFI_FVB_STICKY_WRITE 0x00000200
#define EFI_FVB_MEMORY_MAPPED 0x00000400
#define EFI_FVB_ERASE_POLARITY 0x00000800
#define EFI_FVB_STICKY_WRITE 0x00000200
#define EFI_FVB_MEMORY_MAPPED 0x00000400
#define EFI_FVB_ERASE_POLARITY 0x00000800
#define EFI_FVB_ALIGNMENT_CAP 0x00008000
#define EFI_FVB_ALIGNMENT_2 0x00010000
#define EFI_FVB_ALIGNMENT_4 0x00020000
#define EFI_FVB_ALIGNMENT_8 0x00040000
#define EFI_FVB_ALIGNMENT_16 0x00080000
#define EFI_FVB_ALIGNMENT_32 0x00100000
#define EFI_FVB_ALIGNMENT_64 0x00200000
#define EFI_FVB_ALIGNMENT_128 0x00400000
#define EFI_FVB_ALIGNMENT_256 0x00800000
#define EFI_FVB_ALIGNMENT_512 0x01000000
#define EFI_FVB_ALIGNMENT_1K 0x02000000
#define EFI_FVB_ALIGNMENT_2K 0x04000000
#define EFI_FVB_ALIGNMENT_4K 0x08000000
#define EFI_FVB_ALIGNMENT_8K 0x10000000
#define EFI_FVB_ALIGNMENT_16K 0x20000000
#define EFI_FVB_ALIGNMENT_32K 0x40000000
#define EFI_FVB_ALIGNMENT_64K 0x80000000
#define EFI_FVB_ALIGNMENT_CAP 0x00008000
#define EFI_FVB_ALIGNMENT_2 0x00010000
#define EFI_FVB_ALIGNMENT_4 0x00020000
#define EFI_FVB_ALIGNMENT_8 0x00040000
#define EFI_FVB_ALIGNMENT_16 0x00080000
#define EFI_FVB_ALIGNMENT_32 0x00100000
#define EFI_FVB_ALIGNMENT_64 0x00200000
#define EFI_FVB_ALIGNMENT_128 0x00400000
#define EFI_FVB_ALIGNMENT_256 0x00800000
#define EFI_FVB_ALIGNMENT_512 0x01000000
#define EFI_FVB_ALIGNMENT_1K 0x02000000
#define EFI_FVB_ALIGNMENT_2K 0x04000000
#define EFI_FVB_ALIGNMENT_4K 0x08000000
#define EFI_FVB_ALIGNMENT_8K 0x10000000
#define EFI_FVB_ALIGNMENT_16K 0x20000000
#define EFI_FVB_ALIGNMENT_32K 0x40000000
#define EFI_FVB_ALIGNMENT_64K 0x80000000
///@}
/// This is a simple macro defined as the set of all FV Block Attributes signifying capabilities.
@ -68,12 +68,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
* @param Bit A value indicating the bit(s) to test.
* If multiple bits are set, the logical OR of their tests is the expression's value.
**/
#define EFI_TEST_FFS_ATTRIBUTES_BIT( FvbAttributes, TestAttributes, Bit) \
#define EFI_TEST_FFS_ATTRIBUTES_BIT(FvbAttributes, TestAttributes, Bit) \
((BOOLEAN) \
((FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit)) \
)
/// A simple macro defined as the set of all FV Block Attribute bits that indicate status.
#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */
#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */

20
OvmfPkg/Csm/Include/Framework/FirmwareVolumeImageFormat.h
View File

@ -17,16 +17,16 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Bit values for AuthenticationStatus
//
#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
#endif

407
OvmfPkg/Csm/Include/Framework/FrameworkInternalFormRepresentation.h
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@ -14,72 +14,72 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
#define __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
typedef UINT16 STRING_REF;
typedef UINT16 STRING_REF;
//
// IFR Op codes
//
#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
#define EFI_IFR_GRAPHIC_OP 0x04
#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
#define EFI_IFR_END_FORM_OP 0x0B
#define EFI_IFR_HIDDEN_OP 0x0C
#define EFI_IFR_END_FORM_SET_OP 0x0D
#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
#define EFI_IFR_END_ONE_OF_OP 0x10
#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
#define FRAMEWORK_EFI_IFR_AND_OP 0x15
#define FRAMEWORK_EFI_IFR_OR_OP 0x16
#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
#define EFI_IFR_GRAYOUT_IF_OP 0x19
#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
#define EFI_IFR_LABEL_OP 0x1D
#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
#define EFI_IFR_BANNER_OP 0x20
#define EFI_IFR_INVENTORY_OP 0x21
#define EFI_IFR_EQ_VAR_VAL_OP 0x22
#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
#define EFI_IFR_VARSTORE_SELECT_OP 0x25
#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
#define EFI_IFR_OEM_OP 0xFE
#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
#define EFI_IFR_GRAPHIC_OP 0x04
#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
#define EFI_IFR_END_FORM_OP 0x0B
#define EFI_IFR_HIDDEN_OP 0x0C
#define EFI_IFR_END_FORM_SET_OP 0x0D
#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
#define EFI_IFR_END_ONE_OF_OP 0x10
#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
#define FRAMEWORK_EFI_IFR_AND_OP 0x15
#define FRAMEWORK_EFI_IFR_OR_OP 0x16
#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
#define EFI_IFR_GRAYOUT_IF_OP 0x19
#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
#define EFI_IFR_LABEL_OP 0x1D
#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
#define EFI_IFR_BANNER_OP 0x20
#define EFI_IFR_INVENTORY_OP 0x21
#define EFI_IFR_EQ_VAR_VAL_OP 0x22
#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
#define EFI_IFR_VARSTORE_SELECT_OP 0x25
#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
#define EFI_IFR_OEM_OP 0xFE
#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
//
// Define values for the flags fields in some VFR opcodes. These are
// bitmasks.
//
#define EFI_IFR_FLAG_DEFAULT 0x01
#define EFI_IFR_FLAG_MANUFACTURING 0x02
#define EFI_IFR_FLAG_INTERACTIVE 0x04
#define EFI_IFR_FLAG_NV_ACCESS 0x08
#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
#define EFI_IFR_FLAG_LATE_CHECK 0x20
#define EFI_IFR_FLAG_DEFAULT 0x01
#define EFI_IFR_FLAG_MANUFACTURING 0x02
#define EFI_IFR_FLAG_INTERACTIVE 0x04
#define EFI_IFR_FLAG_NV_ACCESS 0x08
#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
#define EFI_IFR_FLAG_LATE_CHECK 0x20
#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
#define EFI_DISK_DEVICE_CLASS 0x01
#define EFI_VIDEO_DEVICE_CLASS 0x02
#define EFI_NETWORK_DEVICE_CLASS 0x04
#define EFI_INPUT_DEVICE_CLASS 0x08
#define EFI_ON_BOARD_DEVICE_CLASS 0x10
#define EFI_OTHER_DEVICE_CLASS 0x20
#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
#define EFI_DISK_DEVICE_CLASS 0x01
#define EFI_VIDEO_DEVICE_CLASS 0x02
#define EFI_NETWORK_DEVICE_CLASS 0x04
#define EFI_INPUT_DEVICE_CLASS 0x08
#define EFI_ON_BOARD_DEVICE_CLASS 0x10
#define EFI_OTHER_DEVICE_CLASS 0x20
#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01
@ -96,70 +96,69 @@ typedef UINT16 STRING_REF;
///
#define EFI_IFR_FLAG_CREATED 128
#pragma pack(1)
//
// IFR Structure definitions
//
typedef struct {
UINT8 OpCode;
UINT8 Length;
UINT8 OpCode;
UINT8 Length;
} FRAMEWORK_EFI_IFR_OP_HEADER;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid;
STRING_REF FormSetTitle;
STRING_REF Help;
EFI_PHYSICAL_ADDRESS CallbackHandle;
UINT16 Class;
UINT16 SubClass;
UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid;
STRING_REF FormSetTitle;
STRING_REF Help;
EFI_PHYSICAL_ADDRESS CallbackHandle;
UINT16 Class;
UINT16 SubClass;
UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
} FRAMEWORK_EFI_IFR_FORM_SET;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF FormTitle;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF FormTitle;
} FRAMEWORK_EFI_IFR_FORM;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 LabelId;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 LabelId;
} EFI_IFR_LABEL;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF SubTitle;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF SubTitle;
} FRAMEWORK_EFI_IFR_SUBTITLE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo;
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo;
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_TEXT;
//
// goto
//
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_REF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_FORM;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_FORM_SET;
//
@ -167,51 +166,51 @@ typedef struct {
// code assumes this to be true, if this ever changes we need to revisit the InitializeTagStructures code
//
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
} FRAMEWORK_EFI_IFR_ONE_OF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset in NV for storage of the data.
UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
STRING_REF Prompt; ///< The string token for the prompt.
STRING_REF Help; ///< The string token for the context-help.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset in NV for storage of the data.
UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
STRING_REF Prompt; ///< The string token for the prompt.
STRING_REF Help; ///< The string token for the context-help.
} FRAMEWORK_EFI_IFR_ORDERED_LIST;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_CHECKBOX, EFI_IFR_CHECK_BOX;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Option; ///< The string token describing the option.
UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Option; ///< The string token describing the option.
UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_ONE_OF_OPTION;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT16 Minimum;
UINT16 Maximum;
UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
UINT16 Default;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT16 Minimum;
UINT16 Maximum;
UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
UINT16 Default;
} FRAMEWORK_EFI_IFR_NUMERIC;
//
@ -223,50 +222,50 @@ typedef struct {
// gRT->GetXXXX series of calls.
//
typedef struct {
FRAMEWORK_EFI_IFR_NUMERIC Hour;
FRAMEWORK_EFI_IFR_NUMERIC Minute;
FRAMEWORK_EFI_IFR_NUMERIC Second;
FRAMEWORK_EFI_IFR_NUMERIC Hour;
FRAMEWORK_EFI_IFR_NUMERIC Minute;
FRAMEWORK_EFI_IFR_NUMERIC Second;
} FRAMEWORK_EFI_IFR_TIME;
typedef struct {
FRAMEWORK_EFI_IFR_NUMERIC Year;
FRAMEWORK_EFI_IFR_NUMERIC Month;
FRAMEWORK_EFI_IFR_NUMERIC Day;
FRAMEWORK_EFI_IFR_NUMERIC Year;
FRAMEWORK_EFI_IFR_NUMERIC Month;
FRAMEWORK_EFI_IFR_NUMERIC Day;
} FRAMEWORK_EFI_IFR_DATE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId;///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
UINT16 Encoding;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
UINT16 Encoding;
} FRAMEWORK_EFI_IFR_PASSWORD;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
} FRAMEWORK_EFI_IFR_STRING;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_ONE_OF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 Value;
UINT16 Key;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 Value;
UINT16 Key;
} EFI_IFR_HIDDEN;
///
@ -275,92 +274,92 @@ typedef struct {
/// keep the inconsistant is for implementation needed.
///@{
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
} EFI_IFR_SUPPRESS;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
} EFI_IFR_GRAY_OUT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Popup;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Popup;
UINT8 Flags;
} EFI_IFR_INCONSISTENT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 Value; ///< The value to compare against.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 Value; ///< The value to compare against.
} FRAMEWORK_EFI_IFR_EQ_ID_VAL;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 ListLength;
UINT16 ValueList[1];
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 ListLength;
UINT16 ValueList[1];
} FRAMEWORK_EFI_IFR_EQ_ID_LIST;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
UINT8 Width; ///< The size of variable storage (must be same for both).
UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
UINT8 Width; ///< The size of variable storage (must be same for both).
UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
} FRAMEWORK_EFI_IFR_EQ_ID_ID;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VariableId; ///< The offset into variable storage.
UINT16 Value; ///< The value to compare against.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VariableId; ///< The offset into variable storage.
UINT16 Value; ///< The value to compare against.
} EFI_IFR_EQ_VAR_VAL;
///@}
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_AND;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_OR;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_NOT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_EXPR, EFI_IFR_END_IF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help;
UINT8 Flags;
UINT16 Key;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help;
UINT8 Flags;
UINT16 Key;
} EFI_IFR_SAVE_DEFAULTS;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo; ///< Optional text.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo; ///< Optional text.
} EFI_IFR_INVENTORY;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid; ///< GUID for the variable.
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 Size; ///< The size of the variable storage.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid; ///< GUID for the variable.
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 Size; ///< The size of the variable storage.
} FRAMEWORK_EFI_IFR_VARSTORE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
} EFI_IFR_VARSTORE_SELECT;
///
@ -370,9 +369,9 @@ typedef struct {
/// IFR opcodes use the VarId as defined here.
///
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
} EFI_IFR_VARSTORE_SELECT_PAIR;
///
@ -381,16 +380,16 @@ typedef struct {
#define EFI_IFR_RESTORE_DEFAULTS EFI_IFR_SAVE_DEFAULTS
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Title; ///< The string token for the banner title.
UINT16 LineNumber; ///< 1-based line number.
UINT8 Alignment; ///< Left, center, or right-aligned.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Title; ///< The string token for the banner title.
UINT16 LineNumber; ///< 1-based line number.
UINT8 Alignment; ///< Left, center, or right-aligned.
} EFI_IFR_BANNER;
#define EFI_IFR_BANNER_ALIGN_LEFT 0
#define EFI_IFR_BANNER_ALIGN_CENTER 1
#define EFI_IFR_BANNER_ALIGN_RIGHT 2
#define EFI_IFR_BANNER_TIMEOUT 0xFF
#define EFI_IFR_BANNER_ALIGN_LEFT 0
#define EFI_IFR_BANNER_ALIGN_CENTER 1
#define EFI_IFR_BANNER_ALIGN_RIGHT 2
#define EFI_IFR_BANNER_TIMEOUT 0xFF
#pragma pack()

8
OvmfPkg/Csm/Include/Framework/Hob.h
View File

@ -17,12 +17,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// This macro is defined to comply with the hob Framework Spec. And the marco was
/// retired in the PI1.0 specification.
///
#define EFI_HOB_TYPE_CV 0x0008
#define EFI_HOB_TYPE_CV 0x0008
typedef struct {
EFI_HOB_GENERIC_HEADER Header;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
EFI_HOB_GENERIC_HEADER Header;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
} EFI_HOB_CAPSULE_VOLUME;
#endif

60
OvmfPkg/Csm/Include/Framework/StatusCode.h
View File

@ -26,8 +26,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
///@}
///
@ -37,12 +37,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
///@}
///
@ -51,7 +51,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// Inconsistent with specification here:
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
///
/// Software Class X64 Exception Subclass Error Code definitions.
@ -62,31 +62,31 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
///@}
///
/// Software Class EFI After Life Subclass Progress Code definitions.
///
///@{
#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
///@}
///
@ -95,7 +95,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// Inconsistent with specification here:
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
///
/// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
@ -130,7 +130,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
///@}
///

2
OvmfPkg/Csm/Include/Guid/LegacyBios.h
View File

@ -24,6 +24,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
0x2e3044ac, 0x879f, 0x490f, {0x97, 0x60, 0xbb, 0xdf, 0xaf, 0x69, 0x5f, 0x50 } \
}
extern EFI_GUID gEfiLegacyBiosGuid;
extern EFI_GUID gEfiLegacyBiosGuid;
#endif

10
OvmfPkg/Csm/Include/Guid/LegacyDevOrder.h
View File

@ -23,17 +23,17 @@ typedef UINT8 BBS_TYPE;
#pragma pack(1)
typedef struct {
BBS_TYPE BbsType;
BBS_TYPE BbsType;
///
/// Length = sizeof (UINT16) + sizeof (Data)
///
UINT16 Length;
UINT16 Data[1];
UINT16 Length;
UINT16 Data[1];
} LEGACY_DEV_ORDER_ENTRY;
#pragma pack()
#define VAR_LEGACY_DEV_ORDER L"LegacyDevOrder"
#define VAR_LEGACY_DEV_ORDER L"LegacyDevOrder"
extern EFI_GUID gEfiLegacyDevOrderVariableGuid;
extern EFI_GUID gEfiLegacyDevOrderVariableGuid;
#endif

87
OvmfPkg/Csm/Include/Protocol/FirmwareVolume.h
View File

@ -19,7 +19,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _FIRMWARE_VOLUME_H_
#define _FIRMWARE_VOLUME_H_
//
// Firmware Volume Protocol GUID definition
//
@ -28,49 +27,49 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
}
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
//
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
//
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
//
// ************************************************************
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
// ************************************************************
//
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
//
// Protocol API definitions
@ -210,17 +209,17 @@ EFI_STATUS
OUT UINT32 *AuthenticationStatus
);
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
typedef struct {
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
} FRAMEWORK_EFI_FV_WRITE_FILE_DATA;
/**
@ -296,45 +295,45 @@ struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
///
/// Retrieves volume capabilities and current settings.
///
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
///
/// Modifies the current settings of the firmware volume.
///
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
///
/// Reads an entire file from the firmware volume.
///
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
///
/// Reads a single section from a file into a buffer.
///
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
///
/// Writes an entire file into the firmware volume.
///
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
///
/// Provides service to allow searching the firmware volume.
///
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
///
/// Data field that indicates the size in bytes of the Key input buffer for
/// the GetNextFile() API.
///
UINT32 KeySize;
UINT32 KeySize;
///
/// Handle of the parent firmware volume.
///
EFI_HANDLE ParentHandle;
EFI_HANDLE ParentHandle;
};
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
#endif

54
OvmfPkg/Csm/Include/Protocol/IsaAcpi.h
View File

@ -49,20 +49,20 @@ typedef struct _EFI_ISA_ACPI_PROTOCOL EFI_ISA_ACPI_PROTOCOL;
///
/// ISA ACPI Protocol MMIO resource attributes
///
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
///
/// ISA ACPI Protocol I/O resource attributes
///
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
///
/// EFI ISA ACPI resource type
@ -79,26 +79,26 @@ typedef enum {
/// EFI ISA ACPI generic resource structure
///
typedef struct {
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
} EFI_ISA_ACPI_RESOURCE;
///
/// EFI ISA ACPI resource device identifier
///
typedef struct {
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
} EFI_ISA_ACPI_DEVICE_ID;
///
/// EFI ISA ACPI resource list
///
typedef struct {
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
} EFI_ISA_ACPI_RESOURCE_LIST;
/**
@ -283,16 +283,16 @@ EFI_STATUS
/// and assign resources to an ISA controller.
///
struct _EFI_ISA_ACPI_PROTOCOL {
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
};
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
#endif

28
OvmfPkg/Csm/Include/Protocol/IsaIo.h
View File

@ -128,11 +128,11 @@ typedef struct {
///
/// Read from ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
///
/// Write to ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
} EFI_ISA_IO_PROTOCOL_ACCESS;
/**
@ -326,31 +326,31 @@ EFI_STATUS
/// ISA_PCI_IO_PROTOCOL instance associated with the ISA controller.
///
struct _EFI_ISA_IO_PROTOCOL {
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
///
/// The list of I/O , MMIO, DMA, and Interrupt resources associated with the
/// ISA controller abstracted by this instance of the EFI_ISA_IO_PROTOCOL.
///
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
///
/// The size, in bytes, of the ROM image.
///
UINT32 RomSize;
UINT32 RomSize;
///
/// A pointer to the in memory copy of the ROM image. The ISA Bus Driver is responsible
/// for allocating memory for the ROM image, and copying the contents of the ROM to memory
/// during ISA Bus initialization.
///
VOID *RomImage;
VOID *RomImage;
};
extern EFI_GUID gEfiIsaIoProtocolGuid;
extern EFI_GUID gEfiIsaIoProtocolGuid;
#endif

652
OvmfPkg/Csm/Include/Protocol/LegacyBios.h
View File

File diff suppressed because it is too large Load Diff

194
OvmfPkg/Csm/Include/Protocol/LegacyBiosPlatform.h
View File

@ -66,7 +66,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED The MP table is not supported on this platform.
///
EfiGetPlatformBinaryMpTable = 0,
EfiGetPlatformBinaryMpTable = 0,
///
/// This mode returns a block of data. The content and usage is IBV or OEM defined.
/// OEMs or IBVs normally use this function for nonstandard Compatibility16 runtime soft
@ -104,7 +104,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem INT is not supported on this platform.
///
EfiGetPlatformBinaryOemIntData = 1,
EfiGetPlatformBinaryOemIntData = 1,
///
/// This mode returns a block of data. The content and usage is IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It
@ -146,57 +146,57 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem16 is not supported on this platform.
///
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
///
/// This mode returns a TPM binary image for the onboard TPM device.
///
@ -226,7 +226,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND No BinaryImage was found.
///
EfiGetPlatformBinaryTpmBinary = 4,
EfiGetPlatformBinaryTpmBinary = 4,
///
/// The mode finds the Compatibility16 Rom Image.
///
@ -250,7 +250,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND ROM not found.
///
EfiGetPlatformBinarySystemRom = 5,
EfiGetPlatformBinarySystemRom = 5,
///
/// This mode returns the Base address of PciExpress memory mapped configuration
/// address space.
@ -275,9 +275,9 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_UNSUPPORTED System does not PciExpress.
///
EfiGetPlatformPciExpressBase = 6,
EfiGetPlatformPciExpressBase = 6,
///
EfiGetPlatformPmmSize = 7,
EfiGetPlatformPmmSize = 7,
///
EfiGetPlatformEndOpromShadowAddr = 8,
///
@ -301,7 +301,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformVgaHandle = 0,
EfiGetPlatformVgaHandle = 0,
///
/// This mode returns the Compatibility16 policy for the device that should be the IDE
/// controller used during a Compatibility16 boot.
@ -317,7 +317,7 @@ typedef enum {
/// AdditionalData Pointer to HddInfo.
/// Information about all onboard IDE controllers.
///
EfiGetPlatformIdeHandle = 1,
EfiGetPlatformIdeHandle = 1,
///
/// This mode returns the Compatibility16 policy for the device that should be the ISA bus
/// controller used during a Compatibility16 boot.
@ -332,7 +332,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformIsaBusHandle = 2,
EfiGetPlatformIsaBusHandle = 2,
///
/// This mode returns the Compatibility16 policy for the device that should be the USB
/// device used during a Compatibility16 boot.
@ -347,7 +347,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformUsbHandle = 3
EfiGetPlatformUsbHandle = 3
} EFI_GET_PLATFORM_HANDLE_MODE;
/**
@ -387,7 +387,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookShadowServiceRoms= 1,
EfiPlatformHookShadowServiceRoms = 1,
///
/// This mode allows platform to perform any required operation after an OpROM has
/// completed its initialization.
@ -404,21 +404,21 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookAfterRomInit = 2
EfiPlatformHookAfterRomInit = 2
} EFI_GET_PLATFORM_HOOK_MODE;
///
/// This IRQ has not been assigned to PCI.
///
#define PCI_UNUSED 0x00
#define PCI_UNUSED 0x00
///
/// This IRQ has been assigned to PCI.
///
#define PCI_USED 0xFF
#define PCI_USED 0xFF
///
/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.
///
#define LEGACY_USED 0xFE
#define LEGACY_USED 0xFE
#pragma pack(1)
@ -426,7 +426,7 @@ typedef struct {
///
/// IRQ for this entry.
///
UINT8 Irq;
UINT8 Irq;
///
/// Status of this IRQ.
///
@ -437,103 +437,101 @@ typedef struct {
/// LEGACY_USED 0xFE. This IRQ has been used by an SIO legacy
/// device and cannot be used by PCI.
///
UINT8 Used;
UINT8 Used;
} EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY;
//
// Define PIR table structures
//
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
typedef struct {
///
/// $PIR.
///
UINT32 Signature;
UINT32 Signature;
///
/// 0x00.
///
UINT8 MinorVersion;
UINT8 MinorVersion;
///
/// 0x01 for table version 1.0.
///
UINT8 MajorVersion;
UINT8 MajorVersion;
///
/// 0x20 + RoutingTableEntries * 0x10.
///
UINT16 TableSize;
UINT16 TableSize;
///
/// PCI interrupt router bus.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI interrupt router device/function.
///
UINT8 DevFun;
UINT8 DevFun;
///
/// If nonzero, bit map of IRQs reserved for PCI.
///
UINT16 PciOnlyIrq;
UINT16 PciOnlyIrq;
///
/// Vendor ID of a compatible PCI interrupt router.
///
UINT16 CompatibleVid;
UINT16 CompatibleVid;
///
/// Device ID of a compatible PCI interrupt router.
///
UINT16 CompatibleDid;
UINT16 CompatibleDid;
///
/// If nonzero, a value passed directly to the IRQ miniport's Initialize function.
///
UINT32 Miniport;
UINT32 Miniport;
///
/// Reserved for future usage.
///
UINT8 Reserved[11];
UINT8 Reserved[11];
///
/// This byte plus the sum of all other bytes in the LocalPirqTable equal 0x00.
///
UINT8 Checksum;
UINT8 Checksum;
} EFI_LEGACY_PIRQ_TABLE_HEADER;
typedef struct {
///
/// If nonzero, a value assigned by the IBV.
///
UINT8 Pirq;
UINT8 Pirq;
///
/// If nonzero, the IRQs that can be assigned to this device.
///
UINT16 IrqMask;
UINT16 IrqMask;
} EFI_LEGACY_PIRQ_ENTRY;
typedef struct {
///
/// PCI bus of the entry.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI device of this entry.
///
UINT8 Device;
UINT8 Device;
///
/// An IBV value and IRQ mask for PIRQ pins A through D.
///
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
///
/// If nonzero, the slot number assigned by the board manufacturer.
///
UINT8 Slot;
UINT8 Slot;
///
/// Reserved for future use.
///
UINT8 Reserved;
UINT8 Reserved;
} EFI_LEGACY_IRQ_ROUTING_ENTRY;
#pragma pack()
/**
Finds the binary data or other platform information.
@ -725,31 +723,31 @@ struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
///
/// Gets binary data or other platform information.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
///
/// Returns a buffer of all handles matching the requested subfunction.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
///
/// Loads and initializes the traditional BIOS SMM handler.
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
///
/// Allows platform to perform any required actions after a LegacyBios operation.
///
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
///
/// Gets $PIR table.
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
///
/// Translates the given PIRQ to the final value after traversing any PCI bridges.
///
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
///
/// Final platform function before the system attempts to boot to a traditional OS.
///
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
};
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
#endif

11
OvmfPkg/Csm/Include/Protocol/LegacyInterrupt.h
View File

@ -13,7 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_LEGACY_INTERRUPT_H_
#define _EFI_LEGACY_INTERRUPT_H_
#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
{ \
0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
@ -99,24 +98,24 @@ struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
///
/// Gets the number of PIRQs supported.
///
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
///
/// Gets the PCI bus, device, and function that is associated with this protocol.
///
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
///
/// Reads the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
///
/// Writes to the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
};
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
#endif

20
OvmfPkg/Csm/Include/Protocol/VgaMiniPort.h
View File

@ -20,7 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Forward declaration for the EFI_VGA_MINI_PORT_PROTOCOL.
///
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
/**
Sets the text display mode of a VGA controller.
@ -49,40 +49,40 @@ EFI_STATUS
);
struct _EFI_VGA_MINI_PORT_PROTOCOL {
EFI_VGA_MINI_PORT_SET_MODE SetMode;
EFI_VGA_MINI_PORT_SET_MODE SetMode;
///
/// MMIO base address of the VGA text mode framebuffer. Typically set to 0xB8000.
///
UINT64 VgaMemoryOffset;
UINT64 VgaMemoryOffset;
///
/// I/O Port address for the VGA CRTC address register. Typically set to 0x3D4.
///
UINT64 CrtcAddressRegisterOffset;
UINT64 CrtcAddressRegisterOffset;
///
/// I/O Port address for the VGA CRTC data register. Typically set to 0x3D5.
///
UINT64 CrtcDataRegisterOffset;
UINT64 CrtcDataRegisterOffset;
///
/// PCI Controller MMIO BAR index of the VGA text mode frame buffer. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 VgaMemoryBar;
UINT8 VgaMemoryBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC address register. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcAddressRegisterBar;
UINT8 CrtcAddressRegisterBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC data register. Typically set
/// to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcDataRegisterBar;
UINT8 CrtcDataRegisterBar;
///
/// The maximum number of text modes that this VGA controller supports.
///
UINT8 MaxMode;
UINT8 MaxMode;
};
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
#endif

186
OvmfPkg/Csm/LegacyBiosDxe/LegacyBbs.c
View File

@ -14,13 +14,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// FLOPPY_NOT_PRESENT = No floppy controller present
// FLOPPY_PRESENT_NO_MEDIA = Floppy controller present but no media inserted
//
#define FLOPPY_NOT_PRESENT 0
#define FLOPPY_PRESENT_WITH_MEDIA 1
#define FLOPPY_PRESENT_NO_MEDIA 2
#define FLOPPY_NOT_PRESENT 0
#define FLOPPY_PRESENT_WITH_MEDIA 1
#define FLOPPY_PRESENT_NO_MEDIA 2
BBS_TABLE *mBbsTable;
BOOLEAN mBbsTableDoneFlag = FALSE;
BOOLEAN IsHaveMediaInFloppy = TRUE;
BBS_TABLE *mBbsTable;
BOOLEAN mBbsTableDoneFlag = FALSE;
BOOLEAN IsHaveMediaInFloppy = TRUE;
/**
Checks the state of the floppy and if media is inserted.
@ -44,23 +44,23 @@ HasMediaInFloppy (
VOID
)
{
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_BLOCK_IO_PROTOCOL *BlkIo;
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_BLOCK_IO_PROTOCOL *BlkIo;
HandleBuffer = NULL;
HandleCount = 0;
HandleBuffer = NULL;
HandleCount = 0;
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiIsaIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
ByProtocol,
&gEfiIsaIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
//
// If don't find any ISA/IO protocol assume no floppy. Need for floppy
@ -76,7 +76,7 @@ HasMediaInFloppy (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiIsaIoProtocolGuid,
(VOID **) &IsaIo
(VOID **)&IsaIo
);
if (EFI_ERROR (Status)) {
continue;
@ -85,6 +85,7 @@ HasMediaInFloppy (
if (IsaIo->ResourceList->Device.HID != EISA_PNP_ID (0x604)) {
continue;
}
//
// Update blockio in case the floppy is inserted in during BdsTimeout
//
@ -103,7 +104,7 @@ HasMediaInFloppy (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiBlockIoProtocolGuid,
(VOID **) &BlkIo
(VOID **)&BlkIo
);
if (EFI_ERROR (Status)) {
continue;
@ -121,10 +122,8 @@ HasMediaInFloppy (
FreePool (HandleBuffer);
return FLOPPY_NOT_PRESENT;
}
/**
Complete build of BBS TABLE.
@ -136,8 +135,8 @@ HasMediaInFloppy (
**/
EFI_STATUS
LegacyBiosBuildBbs (
IN LEGACY_BIOS_INSTANCE *Private,
IN BBS_TABLE *BbsTable
IN LEGACY_BIOS_INSTANCE *Private,
IN BBS_TABLE *BbsTable
)
{
UINTN BbsIndex;
@ -172,18 +171,18 @@ LegacyBiosBuildBbs (
}
}
BbsTable[0].Bus = 0xff;
BbsTable[0].Device = 0xff;
BbsTable[0].Function = 0xff;
BbsTable[0].DeviceType = BBS_FLOPPY;
BbsTable[0].Class = 01;
BbsTable[0].SubClass = 02;
BbsTable[0].StatusFlags.OldPosition = 0;
BbsTable[0].StatusFlags.Reserved1 = 0;
BbsTable[0].StatusFlags.Enabled = 0;
BbsTable[0].StatusFlags.Failed = 0;
BbsTable[0].StatusFlags.MediaPresent = 0;
BbsTable[0].StatusFlags.Reserved2 = 0;
BbsTable[0].Bus = 0xff;
BbsTable[0].Device = 0xff;
BbsTable[0].Function = 0xff;
BbsTable[0].DeviceType = BBS_FLOPPY;
BbsTable[0].Class = 01;
BbsTable[0].SubClass = 02;
BbsTable[0].StatusFlags.OldPosition = 0;
BbsTable[0].StatusFlags.Reserved1 = 0;
BbsTable[0].StatusFlags.Enabled = 0;
BbsTable[0].StatusFlags.Failed = 0;
BbsTable[0].StatusFlags.MediaPresent = 0;
BbsTable[0].StatusFlags.Reserved2 = 0;
//
// Onboard HDD - Note Each HDD controller controls 2 drives
@ -196,10 +195,8 @@ LegacyBiosBuildBbs (
LegacyBiosBuildIdeData (Private, &HddInfo, 0);
for (HddIndex = 0; HddIndex < MAX_IDE_CONTROLLER; HddIndex++) {
BbsIndex = HddIndex * 2 + 1;
for (Index = 0; Index < 2; ++Index) {
BbsTable[BbsIndex + Index].Bus = HddInfo[HddIndex].Bus;
BbsTable[BbsIndex + Index].Device = HddInfo[HddIndex].Device;
BbsTable[BbsIndex + Index].Function = HddInfo[HddIndex].Function;
@ -286,7 +283,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
BlockIoHandles[BlockIndex],
&gEfiBlockIoProtocolGuid,
(VOID **) &BlkIo
(VOID **)&BlkIo
);
if (EFI_ERROR (Status)) {
@ -313,7 +310,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
BlockIoHandles[BlockIndex],
&gEfiDevicePathProtocolGuid,
(VOID **) &DevicePath
(VOID **)&DevicePath
);
if (EFI_ERROR (Status)) {
continue;
@ -324,14 +321,17 @@ LegacyBiosBuildBbs (
//
DevicePathNode = DevicePath;
while (!IsDevicePathEnd (DevicePathNode)) {
if (DevicePathType (DevicePathNode) == MESSAGING_DEVICE_PATH &&
DevicePathSubType (DevicePathNode) == MSG_ATAPI_DP) {
if ((DevicePathType (DevicePathNode) == MESSAGING_DEVICE_PATH) &&
(DevicePathSubType (DevicePathNode) == MSG_ATAPI_DP))
{
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
if (!IsDevicePathEnd (DevicePathNode)) {
continue;
continue;
}
//
@ -349,7 +349,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
PciHandle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
continue;
@ -367,13 +367,21 @@ LegacyBiosBuildBbs (
}
if (SegNum != 0) {
DEBUG ((DEBUG_WARN, "CSM cannot use PCI devices in segment %Lu\n",
(UINT64) SegNum));
DEBUG ((
DEBUG_WARN,
"CSM cannot use PCI devices in segment %Lu\n",
(UINT64)SegNum
));
continue;
}
DEBUG ((DEBUG_INFO, "Add Legacy Bbs entry for PCI %d/%d/%d\n",
BusNum, DevNum, FuncNum));
DEBUG ((
DEBUG_INFO,
"Add Legacy Bbs entry for PCI %d/%d/%d\n",
BusNum,
DevNum,
FuncNum
));
BbsTable[BbsIndex].Bus = BusNum;
BbsTable[BbsIndex].Device = DevNum;
@ -403,7 +411,6 @@ LegacyBiosBuildBbs (
return EFI_SUCCESS;
}
/**
Get all BBS info
@ -421,30 +428,30 @@ LegacyBiosBuildBbs (
EFI_STATUS
EFIAPI
LegacyBiosGetBbsInfo (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
OUT UINT16 *HddCount,
OUT HDD_INFO **HddInfo,
OUT UINT16 *BbsCount,
OUT BBS_TABLE **BbsTable
IN EFI_LEGACY_BIOS_PROTOCOL *This,
OUT UINT16 *HddCount,
OUT HDD_INFO **HddInfo,
OUT UINT16 *BbsCount,
OUT BBS_TABLE **BbsTable
)
{
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
// HDD_INFO *LocalHddInfo;
// IN BBS_TABLE *LocalBbsTable;
UINTN NumHandles;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN TempData;
UINT32 Granularity;
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
// HDD_INFO *LocalHddInfo;
// IN BBS_TABLE *LocalBbsTable;
UINTN NumHandles;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN TempData;
UINT32 Granularity;
HandleBuffer = NULL;
HandleBuffer = NULL;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
// LocalHddInfo = EfiToLegacy16BootTable->HddInfo;
// LocalBbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
// LocalHddInfo = EfiToLegacy16BootTable->HddInfo;
// LocalBbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
if (!mBbsTableDoneFlag) {
mBbsTable = Private->BbsTablePtr;
@ -457,12 +464,12 @@ LegacyBiosGetBbsInfo (
// Get PciRootBridgeIO protocol
//
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciRootBridgeIoProtocolGuid,
NULL,
&NumHandles,
&HandleBuffer
);
ByProtocol,
&gEfiPciRootBridgeIoProtocolGuid,
NULL,
&NumHandles,
&HandleBuffer
);
if (NumHandles == 0) {
return EFI_NOT_FOUND;
@ -475,7 +482,6 @@ LegacyBiosGetBbsInfo (
// PCI bus driver enumerate all subsequent handles
//
gBS->ConnectController (HandleBuffer[Index], NULL, NULL, FALSE);
}
LegacyBiosBuildBbs (Private, mBbsTable);
@ -491,18 +497,18 @@ LegacyBiosGetBbsInfo (
//
// Pass in handoff data
//
TempData = (UINTN) EfiToLegacy16BootTable;
Regs.X.ES = NORMALIZE_EFI_SEGMENT ((UINT32) TempData);
Regs.X.BX = NORMALIZE_EFI_OFFSET ((UINT32) TempData);
TempData = (UINTN)EfiToLegacy16BootTable;
Regs.X.ES = NORMALIZE_EFI_SEGMENT ((UINT32)TempData);
Regs.X.BX = NORMALIZE_EFI_OFFSET ((UINT32)TempData);
Private->LegacyBios.FarCall86 (
This,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
This,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
Private->Cpu->FlushDataCache (Private->Cpu, 0xE0000, 0x20000, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, 0xe0000, 0x20000, &Granularity);
@ -518,7 +524,7 @@ LegacyBiosGetBbsInfo (
*HddCount = MAX_IDE_CONTROLLER;
*HddInfo = EfiToLegacy16BootTable->HddInfo;
*BbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
*BbsCount = (UINT16) (sizeof (Private->IntThunk->BbsTable) / sizeof (BBS_TABLE));
*BbsTable = (BBS_TABLE *)(UINTN)EfiToLegacy16BootTable->BbsTable;
*BbsCount = (UINT16)(sizeof (Private->IntThunk->BbsTable) / sizeof (BBS_TABLE));
return EFI_SUCCESS;
}

26
OvmfPkg/Csm/LegacyBiosDxe/LegacyBda.c
View File

@ -21,25 +21,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
LegacyBiosInitBda (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
BDA_STRUC *Bda;
UINT8 *Ebda;
BDA_STRUC *Bda;
UINT8 *Ebda;
Bda = (BDA_STRUC *) ((UINTN) 0x400);
Ebda = (UINT8 *) ((UINTN) 0x9fc00);
Bda = (BDA_STRUC *)((UINTN)0x400);
Ebda = (UINT8 *)((UINTN)0x9fc00);
ACCESS_PAGE0_CODE (
ZeroMem (Bda, 0x100);
//
// 640k-1k for EBDA
//
Bda->MemSize = 0x27f;
Bda->KeyHead = 0x1e;
Bda->KeyTail = 0x1e;
Bda->FloppyData = 0x00;
Bda->FloppyTimeout = 0xff;
Bda->MemSize = 0x27f;
Bda->KeyHead = 0x1e;
Bda->KeyTail = 0x1e;
Bda->FloppyData = 0x00;
Bda->FloppyTimeout = 0xff;
Bda->KeyStart = 0x001E;
Bda->KeyEnd = 0x003E;
@ -50,10 +50,10 @@ LegacyBiosInitBda (
// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
// use this as scratch pad (LPT4 is Reserved)
//
Bda->Lpt1_2Timeout = 0x1414;
Bda->Lpt3_4Timeout = 0x1400;
Bda->Lpt1_2Timeout = 0x1414;
Bda->Lpt3_4Timeout = 0x1400;
);
);
ZeroMem (Ebda, 0x400);
*Ebda = 0x01;

516
OvmfPkg/Csm/LegacyBiosDxe/LegacyBios.c
View File

@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// define maximum number of HDD system supports
//
#define MAX_HDD_ENTRIES 0x30
#define MAX_HDD_ENTRIES 0x30
//
// Module Global:
@ -25,7 +25,7 @@ LEGACY_BIOS_INSTANCE mPrivateData;
//
// The SMBIOS table in EfiRuntimeServicesData memory
//
VOID *mRuntimeSmbiosEntryPoint = NULL;
VOID *mRuntimeSmbiosEntryPoint = NULL;
//
// The SMBIOS table in EfiReservedMemoryType memory
@ -50,27 +50,27 @@ BOOLEAN mEndOfDxe = FALSE;
**/
EFI_STATUS
AllocateLegacyMemory (
IN EFI_ALLOCATE_TYPE AllocateType,
IN EFI_MEMORY_TYPE MemoryType,
IN EFI_PHYSICAL_ADDRESS StartPageAddress,
IN UINTN Pages,
OUT EFI_PHYSICAL_ADDRESS *Result
IN EFI_ALLOCATE_TYPE AllocateType,
IN EFI_MEMORY_TYPE MemoryType,
IN EFI_PHYSICAL_ADDRESS StartPageAddress,
IN UINTN Pages,
OUT EFI_PHYSICAL_ADDRESS *Result
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemPage;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemPage;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc;
//
// Allocate Pages of memory less <= StartPageAddress
//
MemPage = (EFI_PHYSICAL_ADDRESS) (UINTN) StartPageAddress;
Status = gBS->AllocatePages (
AllocateType,
MemoryType,
Pages,
&MemPage
);
MemPage = (EFI_PHYSICAL_ADDRESS)(UINTN)StartPageAddress;
Status = gBS->AllocatePages (
AllocateType,
MemoryType,
Pages,
&MemPage
);
//
// Do not ASSERT on Status error but let caller decide since some cases
// memory is already taken but that is ok.
@ -81,13 +81,14 @@ AllocateLegacyMemory (
// Make sure that the buffer can be used to store code.
//
Status = gDS->GetMemorySpaceDescriptor (MemPage, &MemDesc);
if (!EFI_ERROR (Status) && (MemDesc.Attributes & EFI_MEMORY_XP) != 0) {
if (!EFI_ERROR (Status) && ((MemDesc.Attributes & EFI_MEMORY_XP) != 0)) {
Status = gDS->SetMemorySpaceAttributes (
MemPage,
EFI_PAGES_TO_SIZE (Pages),
MemDesc.Attributes & (~EFI_MEMORY_XP)
);
}
if (EFI_ERROR (Status)) {
gBS->FreePages (MemPage, Pages);
}
@ -95,13 +96,12 @@ AllocateLegacyMemory (
}
if (!EFI_ERROR (Status)) {
*Result = (EFI_PHYSICAL_ADDRESS) (UINTN) MemPage;
*Result = (EFI_PHYSICAL_ADDRESS)(UINTN)MemPage;
}
return Status;
}
/**
This function is called when EFI needs to reserve an area in the 0xE0000 or 0xF0000
64 KB blocks.
@ -126,39 +126,38 @@ AllocateLegacyMemory (
EFI_STATUS
EFIAPI
LegacyBiosGetLegacyRegion (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN UINTN Region,
IN UINTN Alignment,
OUT VOID **LegacyMemoryAddress
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN UINTN Region,
IN UINTN Alignment,
OUT VOID **LegacyMemoryAddress
)
{
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_STATUS Status;
UINT32 Granularity;
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_STATUS Status;
UINT32 Granularity;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
Private->LegacyRegion->UnLock (Private->LegacyRegion, 0xE0000, 0x20000, &Granularity);
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.BX = (UINT16) Region;
Regs.X.CX = (UINT16) LegacyMemorySize;
Regs.X.DX = (UINT16) Alignment;
Regs.X.BX = (UINT16)Region;
Regs.X.CX = (UINT16)LegacyMemorySize;
Regs.X.DX = (UINT16)Alignment;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
if (Regs.X.AX == 0) {
*LegacyMemoryAddress = (VOID *) (((UINTN) Regs.X.DS << 4) + Regs.X.BX);
Status = EFI_SUCCESS;
*LegacyMemoryAddress = (VOID *)(((UINTN)Regs.X.DS << 4) + Regs.X.BX);
Status = EFI_SUCCESS;
} else {
Status = EFI_OUT_OF_RESOURCES;
}
@ -169,7 +168,6 @@ LegacyBiosGetLegacyRegion (
return Status;
}
/**
This function is called when copying data to the region assigned by
EFI_LEGACY_BIOS_PROTOCOL.GetLegacyRegion().
@ -187,21 +185,22 @@ LegacyBiosGetLegacyRegion (
EFI_STATUS
EFIAPI
LegacyBiosCopyLegacyRegion (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN VOID *LegacyMemoryAddress,
IN VOID *LegacyMemorySourceAddress
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN VOID *LegacyMemoryAddress,
IN VOID *LegacyMemorySourceAddress
)
{
LEGACY_BIOS_INSTANCE *Private;
UINT32 Granularity;
if ((LegacyMemoryAddress < (VOID *)(UINTN)0xE0000 ) ||
((UINTN) LegacyMemoryAddress + LegacyMemorySize > (UINTN) 0x100000)
) {
if ((LegacyMemoryAddress < (VOID *)(UINTN)0xE0000) ||
((UINTN)LegacyMemoryAddress + LegacyMemorySize > (UINTN)0x100000)
)
{
return EFI_ACCESS_DENIED;
}
//
// There is no protection from writes over lapping if this function is
// called multiple times.
@ -216,7 +215,6 @@ LegacyBiosCopyLegacyRegion (
return EFI_SUCCESS;
}
/**
Find Legacy16 BIOS image in the FLASH device and shadow it into memory. Find
the $EFI table in the shadow area. Thunk into the Legacy16 code after it had
@ -233,33 +231,33 @@ ShadowAndStartLegacy16 (
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
UINT8 *Ptr;
UINT8 *PtrEnd;
BOOLEAN Done;
EFI_COMPATIBILITY16_TABLE *Table;
UINT8 CheckSum;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
VOID *LegacyBiosImage;
UINTN LegacyBiosImageSize;
UINTN E820Size;
UINT32 *ClearPtr;
BBS_TABLE *BbsTable;
LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;
UINTN Index;
UINT32 TpmPointer;
VOID *TpmBinaryImage;
UINTN TpmBinaryImageSize;
UINTN Location;
UINTN Alignment;
UINTN TempData;
EFI_PHYSICAL_ADDRESS Address;
UINT16 OldMask;
UINT16 NewMask;
UINT32 Granularity;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
EFI_STATUS Status;
UINT8 *Ptr;
UINT8 *PtrEnd;
BOOLEAN Done;
EFI_COMPATIBILITY16_TABLE *Table;
UINT8 CheckSum;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
VOID *LegacyBiosImage;
UINTN LegacyBiosImageSize;
UINTN E820Size;
UINT32 *ClearPtr;
BBS_TABLE *BbsTable;
LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;
UINTN Index;
UINT32 TpmPointer;
VOID *TpmBinaryImage;
UINTN TpmBinaryImageSize;
UINTN Location;
UINTN Alignment;
UINTN TempData;
EFI_PHYSICAL_ADDRESS Address;
UINT16 OldMask;
UINT16 NewMask;
UINT32 Granularity;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
Location = 0;
Alignment = 0;
@ -300,23 +298,23 @@ ShadowAndStartLegacy16 (
// end testtest
//
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
Status = Private->LegacyBiosPlatform->GetPlatformInfo (
Private->LegacyBiosPlatform,
EfiGetPlatformBinarySystemRom,
&LegacyBiosImage,
&LegacyBiosImageSize,
&Location,
&Alignment,
0,
0
);
Status = Private->LegacyBiosPlatform->GetPlatformInfo (
Private->LegacyBiosPlatform,
EfiGetPlatformBinarySystemRom,
&LegacyBiosImage,
&LegacyBiosImageSize,
&Location,
&Alignment,
0,
0
);
if (EFI_ERROR (Status)) {
return Status;
}
Private->BiosStart = (UINT32) (0x100000 - LegacyBiosImageSize);
Private->OptionRom = 0xc0000;
Private->LegacyBiosImageSize = (UINT32) LegacyBiosImageSize;
Private->BiosStart = (UINT32)(0x100000 - LegacyBiosImageSize);
Private->OptionRom = 0xc0000;
Private->LegacyBiosImageSize = (UINT32)LegacyBiosImageSize;
//
// Can only shadow into memory allocated for legacy usage.
@ -328,20 +326,20 @@ ShadowAndStartLegacy16 (
//
Private->LegacyRegion->UnLock (Private->LegacyRegion, 0xc0000, 0x40000, &Granularity);
ClearPtr = (VOID *) ((UINTN) 0xc0000);
ClearPtr = (VOID *)((UINTN)0xc0000);
//
// Initialize region from 0xc0000 to start of BIOS to all ffs. This allows unused
// regions to be used by EMM386 etc.
//
SetMem ((VOID *) ClearPtr, (UINTN) (0x40000 - LegacyBiosImageSize), 0xff);
SetMem ((VOID *)ClearPtr, (UINTN)(0x40000 - LegacyBiosImageSize), 0xff);
TempData = Private->BiosStart;
CopyMem (
(VOID *) TempData,
(VOID *)TempData,
LegacyBiosImage,
(UINTN) LegacyBiosImageSize
(UINTN)LegacyBiosImageSize
);
Private->Cpu->FlushDataCache (Private->Cpu, 0xc0000, 0x40000, EfiCpuFlushTypeWriteBackInvalidate);
@ -351,12 +349,12 @@ ShadowAndStartLegacy16 (
//
Done = FALSE;
Table = NULL;
for (Ptr = (UINT8 *) TempData; Ptr < (UINT8 *) ((UINTN) 0x100000) && !Done; Ptr += 0x10) {
if (*(UINT32 *) Ptr == SIGNATURE_32 ('I', 'F', 'E', '$')) {
Table = (EFI_COMPATIBILITY16_TABLE *) Ptr;
PtrEnd = Ptr + Table->TableLength;
for (Ptr = (UINT8 *)TempData; Ptr < (UINT8 *)((UINTN)0x100000) && !Done; Ptr += 0x10) {
if (*(UINT32 *)Ptr == SIGNATURE_32 ('I', 'F', 'E', '$')) {
Table = (EFI_COMPATIBILITY16_TABLE *)Ptr;
PtrEnd = Ptr + Table->TableLength;
for (CheckSum = 0; Ptr < PtrEnd; Ptr++) {
CheckSum = (UINT8) (CheckSum +*Ptr);
CheckSum = (UINT8)(CheckSum +*Ptr);
}
Done = TRUE;
@ -378,24 +376,24 @@ ShadowAndStartLegacy16 (
//
// Remember location of the Legacy16 table
//
Private->Legacy16Table = Table;
Private->Legacy16CallSegment = Table->Compatibility16CallSegment;
Private->Legacy16CallOffset = Table->Compatibility16CallOffset;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
Private->Legacy16InitPtr = EfiToLegacy16InitTable;
Private->Legacy16BootPtr = &Private->IntThunk->EfiToLegacy16BootTable;
Private->InternalIrqRoutingTable = NULL;
Private->NumberIrqRoutingEntries = 0;
Private->BbsTablePtr = NULL;
Private->LegacyEfiHddTable = NULL;
Private->DiskEnd = 0;
Private->Disk4075 = 0;
Private->HddTablePtr = &Private->IntThunk->EfiToLegacy16BootTable.HddInfo;
Private->NumberHddControllers = MAX_IDE_CONTROLLER;
Private->Dump[0] = 'D';
Private->Dump[1] = 'U';
Private->Dump[2] = 'M';
Private->Dump[3] = 'P';
Private->Legacy16Table = Table;
Private->Legacy16CallSegment = Table->Compatibility16CallSegment;
Private->Legacy16CallOffset = Table->Compatibility16CallOffset;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
Private->Legacy16InitPtr = EfiToLegacy16InitTable;
Private->Legacy16BootPtr = &Private->IntThunk->EfiToLegacy16BootTable;
Private->InternalIrqRoutingTable = NULL;
Private->NumberIrqRoutingEntries = 0;
Private->BbsTablePtr = NULL;
Private->LegacyEfiHddTable = NULL;
Private->DiskEnd = 0;
Private->Disk4075 = 0;
Private->HddTablePtr = &Private->IntThunk->EfiToLegacy16BootTable.HddInfo;
Private->NumberHddControllers = MAX_IDE_CONTROLLER;
Private->Dump[0] = 'D';
Private->Dump[1] = 'U';
Private->Dump[2] = 'M';
Private->Dump[3] = 'P';
ZeroMem (
Private->Legacy16BootPtr,
@ -405,7 +403,7 @@ ShadowAndStartLegacy16 (
//
// Store away a copy of the EFI System Table
//
Table->EfiSystemTable = (UINT32) (UINTN) gST;
Table->EfiSystemTable = (UINT32)(UINTN)gST;
//
// IPF CSM integration -Bug
@ -423,31 +421,31 @@ ShadowAndStartLegacy16 (
//
// All legacy interrupt should be masked when do initialization work from legacy 16 code.
//
Private->Legacy8259->GetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
Private->Legacy8259->GetMask (Private->Legacy8259, &OldMask, NULL, NULL, NULL);
NewMask = 0xFFFF;
Private->Legacy8259->SetMask(Private->Legacy8259, &NewMask, NULL, NULL, NULL);
Private->Legacy8259->SetMask (Private->Legacy8259, &NewMask, NULL, NULL, NULL);
//
// Call into Legacy16 code to do an INIT
//
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16InitializeYourself;
Regs.X.ES = EFI_SEGMENT (*((UINT32 *) &EfiToLegacy16InitTable));
Regs.X.BX = EFI_OFFSET (*((UINT32 *) &EfiToLegacy16InitTable));
Regs.X.ES = EFI_SEGMENT (*((UINT32 *)&EfiToLegacy16InitTable));
Regs.X.BX = EFI_OFFSET (*((UINT32 *)&EfiToLegacy16InitTable));
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
//
// Restore original legacy interrupt mask value
//
Private->Legacy8259->SetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
Private->Legacy8259->SetMask (Private->Legacy8259, &OldMask, NULL, NULL, NULL);
if (Regs.X.AX != 0) {
return EFI_DEVICE_ERROR;
@ -469,30 +467,31 @@ ShadowAndStartLegacy16 (
//
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.CX = (UINT16) E820Size;
Regs.X.CX = (UINT16)E820Size;
Regs.X.DX = 1;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
Table->E820Pointer = (UINT32) (Regs.X.DS * 16 + Regs.X.BX);
Table->E820Length = (UINT32) E820Size;
Table->E820Pointer = (UINT32)(Regs.X.DS * 16 + Regs.X.BX);
Table->E820Length = (UINT32)E820Size;
if (Regs.X.AX != 0) {
DEBUG ((DEBUG_ERROR, "Legacy16 E820 length insufficient\n"));
} else {
TempData = Table->E820Pointer;
CopyMem ((VOID *) TempData, Private->E820Table, E820Size);
CopyMem ((VOID *)TempData, Private->E820Table, E820Size);
}
//
// Get PnPInstallationCheck Info.
//
Private->PnPInstallationCheckSegment = Table->PnPInstallationCheckSegment;
Private->PnPInstallationCheckOffset = Table->PnPInstallationCheckOffset;
Private->PnPInstallationCheckSegment = Table->PnPInstallationCheckSegment;
Private->PnPInstallationCheckOffset = Table->PnPInstallationCheckOffset;
//
// Check if PCI Express is supported. If yes, Save base address.
@ -508,9 +507,10 @@ ShadowAndStartLegacy16 (
0
);
if (!EFI_ERROR (Status)) {
Private->Legacy16Table->PciExpressBase = (UINT32)Location;
Location = 0;
Private->Legacy16Table->PciExpressBase = (UINT32)Location;
Location = 0;
}
//
// Check if TPM is supported. If yes get a region in E0000,F0000 to copy it
// into, copy it and update pointer to binary image. This needs to be
@ -527,35 +527,34 @@ ShadowAndStartLegacy16 (
0
);
if (!EFI_ERROR (Status)) {
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.CX = (UINT16) TpmBinaryImageSize;
Regs.X.CX = (UINT16)TpmBinaryImageSize;
Regs.X.DX = 1;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
TpmPointer = (UINT32) (Regs.X.DS * 16 + Regs.X.BX);
TpmPointer = (UINT32)(Regs.X.DS * 16 + Regs.X.BX);
if (Regs.X.AX != 0) {
DEBUG ((DEBUG_ERROR, "TPM cannot be loaded\n"));
} else {
CopyMem ((VOID *) (UINTN)TpmPointer, TpmBinaryImage, TpmBinaryImageSize);
CopyMem ((VOID *)(UINTN)TpmPointer, TpmBinaryImage, TpmBinaryImageSize);
Table->TpmSegment = Regs.X.DS;
Table->TpmOffset = Regs.X.BX;
}
}
//
// Lock the Legacy BIOS region
//
Private->Cpu->FlushDataCache (Private->Cpu, Private->BiosStart, (UINT32) LegacyBiosImageSize, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, Private->BiosStart, (UINT32) LegacyBiosImageSize, &Granularity);
Private->Cpu->FlushDataCache (Private->Cpu, Private->BiosStart, (UINT32)LegacyBiosImageSize, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, Private->BiosStart, (UINT32)LegacyBiosImageSize, &Granularity);
//
// Get the BbsTable from LOW_MEMORY_THUNK
@ -563,8 +562,8 @@ ShadowAndStartLegacy16 (
BbsTable = (BBS_TABLE *)(UINTN)Private->IntThunk->BbsTable;
ZeroMem ((VOID *)BbsTable, sizeof (Private->IntThunk->BbsTable));
EfiToLegacy16BootTable->BbsTable = (UINT32)(UINTN)BbsTable;
Private->BbsTablePtr = (VOID *) BbsTable;
EfiToLegacy16BootTable->BbsTable = (UINT32)(UINTN)BbsTable;
Private->BbsTablePtr = (VOID *)BbsTable;
//
// Populate entire table with BBS_IGNORE_ENTRY
@ -574,10 +573,11 @@ ShadowAndStartLegacy16 (
for (Index = 0; Index < MAX_BBS_ENTRIES; Index++) {
BbsTable[Index].BootPriority = BBS_IGNORE_ENTRY;
}
//
// Allocate space for Legacy HDD table
//
LegacyEfiHddTable = (LEGACY_EFI_HDD_TABLE *) AllocateZeroPool ((UINTN) MAX_HDD_ENTRIES * sizeof (LEGACY_EFI_HDD_TABLE));
LegacyEfiHddTable = (LEGACY_EFI_HDD_TABLE *)AllocateZeroPool ((UINTN)MAX_HDD_ENTRIES * sizeof (LEGACY_EFI_HDD_TABLE));
ASSERT (LegacyEfiHddTable);
Private->LegacyEfiHddTable = LegacyEfiHddTable;
@ -612,7 +612,7 @@ ShadowAndStartLegacy16 (
EFI_STATUS
EFIAPI
LegacyBiosShadowAllLegacyOproms (
IN EFI_LEGACY_BIOS_PROTOCOL *This
IN EFI_LEGACY_BIOS_PROTOCOL *This
)
{
LEGACY_BIOS_INSTANCE *Private;
@ -657,16 +657,16 @@ LegacyBiosShadowAllLegacyOproms (
**/
UINT16
GetPciInterfaceVersion (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_IA32_REGISTER_SET Reg;
BOOLEAN ThunkFailed;
UINT16 PciInterfaceVersion;
EFI_IA32_REGISTER_SET Reg;
BOOLEAN ThunkFailed;
UINT16 PciInterfaceVersion;
PciInterfaceVersion = 0;
Reg.X.AX = 0xB101;
Reg.X.AX = 0xB101;
Reg.E.EDI = 0;
ThunkFailed = Private->LegacyBios.Int86 (&Private->LegacyBios, 0x1A, &Reg);
@ -684,6 +684,7 @@ GetPciInterfaceVersion (
PciInterfaceVersion = Reg.X.BX;
}
}
return PciInterfaceVersion;
}
@ -699,25 +700,25 @@ GetPciInterfaceVersion (
VOID
EFIAPI
InstallSmbiosEventCallback (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
EFI_STATUS Status;
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
//
// Get SMBIOS table from EFI configuration table
//
Status = EfiGetSystemConfigurationTable (
&gEfiSmbiosTableGuid,
&mRuntimeSmbiosEntryPoint
);
&gEfiSmbiosTableGuid,
&mRuntimeSmbiosEntryPoint
);
if ((EFI_ERROR (Status)) || (mRuntimeSmbiosEntryPoint == NULL)) {
return;
}
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *) mRuntimeSmbiosEntryPoint;
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *)mRuntimeSmbiosEntryPoint;
//
// Allocate memory for SMBIOS Entry Point Structure.
@ -728,21 +729,23 @@ InstallSmbiosEventCallback (
// Entrypoint structure with fixed size is allocated only once.
//
mReserveSmbiosEntryPoint = SIZE_4GB - 1;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
EFI_SIZE_TO_PAGES ((UINTN) (EntryPointStructure->EntryPointLength)),
&mReserveSmbiosEntryPoint
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
EFI_SIZE_TO_PAGES ((UINTN)(EntryPointStructure->EntryPointLength)),
&mReserveSmbiosEntryPoint
);
if (EFI_ERROR (Status)) {
mReserveSmbiosEntryPoint = 0;
return;
}
DEBUG ((DEBUG_INFO, "Allocate memory for Smbios Entry Point Structure\n"));
}
if ((mStructureTableAddress != 0) &&
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength)))
{
//
// If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate
//
@ -759,22 +762,23 @@ InstallSmbiosEventCallback (
//
mStructureTableAddress = SIZE_4GB - 1;
mStructureTablePages = EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
mStructureTablePages,
&mStructureTableAddress
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
mStructureTablePages,
&mStructureTableAddress
);
if (EFI_ERROR (Status)) {
gBS->FreePages (
mReserveSmbiosEntryPoint,
EFI_SIZE_TO_PAGES ((UINTN) (EntryPointStructure->EntryPointLength))
);
mReserveSmbiosEntryPoint,
EFI_SIZE_TO_PAGES ((UINTN)(EntryPointStructure->EntryPointLength))
);
mReserveSmbiosEntryPoint = 0;
mStructureTableAddress = 0;
mStructureTablePages = 0;
return;
}
DEBUG ((DEBUG_INFO, "Allocate memory for Smbios Structure Table\n"));
}
}
@ -791,8 +795,8 @@ InstallSmbiosEventCallback (
VOID
EFIAPI
ToggleEndOfDxeStatus (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
mEndOfDxe = TRUE;
@ -812,8 +816,8 @@ ToggleEndOfDxeStatus (
EFI_STATUS
EFIAPI
LegacyBiosInstall (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@ -850,7 +854,7 @@ LegacyBiosInstall (
// When UEFI Secure Boot is enabled, CSM module will not start any more.
//
SecureBoot = NULL;
GetEfiGlobalVariable2 (EFI_SECURE_BOOT_MODE_NAME, (VOID**)&SecureBoot, NULL);
GetEfiGlobalVariable2 (EFI_SECURE_BOOT_MODE_NAME, (VOID **)&SecureBoot, NULL);
if ((SecureBoot != NULL) && (*SecureBoot == SECURE_BOOT_MODE_ENABLE)) {
FreePool (SecureBoot);
return EFI_SECURITY_VIOLATION;
@ -867,22 +871,22 @@ LegacyBiosInstall (
// Grab a copy of all the protocols we depend on. Any error would
// be a dispatcher bug!.
//
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &Private->Cpu);
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Private->Cpu);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiTimerArchProtocolGuid, NULL, (VOID **) &Private->Timer);
Status = gBS->LocateProtocol (&gEfiTimerArchProtocolGuid, NULL, (VOID **)&Private->Timer);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyRegion2ProtocolGuid, NULL, (VOID **) &Private->LegacyRegion);
Status = gBS->LocateProtocol (&gEfiLegacyRegion2ProtocolGuid, NULL, (VOID **)&Private->LegacyRegion);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyBiosPlatformProtocolGuid, NULL, (VOID **) &Private->LegacyBiosPlatform);
Status = gBS->LocateProtocol (&gEfiLegacyBiosPlatformProtocolGuid, NULL, (VOID **)&Private->LegacyBiosPlatform);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &Private->Legacy8259);
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **)&Private->Legacy8259);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyInterruptProtocolGuid, NULL, (VOID **) &Private->LegacyInterrupt);
Status = gBS->LocateProtocol (&gEfiLegacyInterruptProtocolGuid, NULL, (VOID **)&Private->LegacyInterrupt);
ASSERT_EFI_ERROR (Status);
//
@ -891,7 +895,7 @@ LegacyBiosInstall (
Status = gBS->LocateProtocol (
&gEfiGenericMemTestProtocolGuid,
NULL,
(VOID **) &Private->GenericMemoryTest
(VOID **)&Private->GenericMemoryTest
);
ASSERT_EFI_ERROR (Status);
@ -904,6 +908,7 @@ LegacyBiosInstall (
StartAddress = Descriptor.BaseAddress + Descriptor.Length;
continue;
}
Length = MIN (Descriptor.Length, 0xa0000 - StartAddress);
Private->GenericMemoryTest->CompatibleRangeTest (
Private->GenericMemoryTest,
@ -912,6 +917,7 @@ LegacyBiosInstall (
);
StartAddress = StartAddress + Length;
}
//
// Make sure all memory from 1MB to 16MB is tested and added to memory map
//
@ -921,6 +927,7 @@ LegacyBiosInstall (
StartAddress = Descriptor.BaseAddress + Descriptor.Length;
continue;
}
Length = MIN (Descriptor.Length, BASE_16MB - StartAddress);
Private->GenericMemoryTest->CompatibleRangeTest (
Private->GenericMemoryTest,
@ -932,17 +939,17 @@ LegacyBiosInstall (
Private->Signature = LEGACY_BIOS_INSTANCE_SIGNATURE;
Private->LegacyBios.Int86 = LegacyBiosInt86;
Private->LegacyBios.FarCall86 = LegacyBiosFarCall86;
Private->LegacyBios.CheckPciRom = LegacyBiosCheckPciRom;
Private->LegacyBios.InstallPciRom = LegacyBiosInstallPciRom;
Private->LegacyBios.LegacyBoot = LegacyBiosLegacyBoot;
Private->LegacyBios.UpdateKeyboardLedStatus = LegacyBiosUpdateKeyboardLedStatus;
Private->LegacyBios.GetBbsInfo = LegacyBiosGetBbsInfo;
Private->LegacyBios.ShadowAllLegacyOproms = LegacyBiosShadowAllLegacyOproms;
Private->LegacyBios.PrepareToBootEfi = LegacyBiosPrepareToBootEfi;
Private->LegacyBios.GetLegacyRegion = LegacyBiosGetLegacyRegion;
Private->LegacyBios.CopyLegacyRegion = LegacyBiosCopyLegacyRegion;
Private->LegacyBios.Int86 = LegacyBiosInt86;
Private->LegacyBios.FarCall86 = LegacyBiosFarCall86;
Private->LegacyBios.CheckPciRom = LegacyBiosCheckPciRom;
Private->LegacyBios.InstallPciRom = LegacyBiosInstallPciRom;
Private->LegacyBios.LegacyBoot = LegacyBiosLegacyBoot;
Private->LegacyBios.UpdateKeyboardLedStatus = LegacyBiosUpdateKeyboardLedStatus;
Private->LegacyBios.GetBbsInfo = LegacyBiosGetBbsInfo;
Private->LegacyBios.ShadowAllLegacyOproms = LegacyBiosShadowAllLegacyOproms;
Private->LegacyBios.PrepareToBootEfi = LegacyBiosPrepareToBootEfi;
Private->LegacyBios.GetLegacyRegion = LegacyBiosGetLegacyRegion;
Private->LegacyBios.CopyLegacyRegion = LegacyBiosCopyLegacyRegion;
Private->LegacyBios.BootUnconventionalDevice = LegacyBiosBootUnconventionalDevice;
Private->ImageHandle = ImageHandle;
@ -994,16 +1001,16 @@ LegacyBiosInstall (
);
ASSERT (MemoryAddress == 0x000000000);
ClearPtr = (VOID *) ((UINTN) 0x0000);
ClearPtr = (VOID *)((UINTN)0x0000);
//
// Initialize region from 0x0000 to 4k. This initializes interrupt vector
// range.
//
ACCESS_PAGE0_CODE (
gBS->SetMem ((VOID *) ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K);
ZeroMem ((VOID *) ((UINTN)ClearPtr + 0x400), 0xC00);
);
gBS->SetMem ((VOID *)ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K);
ZeroMem ((VOID *)((UINTN)ClearPtr + 0x400), 0xC00);
);
//
// Allocate pages for OPROM usage
@ -1020,7 +1027,7 @@ LegacyBiosInstall (
);
ASSERT_EFI_ERROR (Status);
ZeroMem ((VOID *) ((UINTN) MemoryAddress), MemorySize);
ZeroMem ((VOID *)((UINTN)MemoryAddress), MemorySize);
//
// Allocate all 32k chunks from 0x60000 ~ 0x88000 for Legacy OPROMs that
@ -1028,8 +1035,8 @@ LegacyBiosInstall (
// OpROMs expect different areas to be free
//
EbdaReservedBaseAddress = MemoryAddress;
MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);
MemorySize = PcdGet32 (PcdOpromReservedMemorySize);
MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);
MemorySize = PcdGet32 (PcdOpromReservedMemorySize);
//
// Check if base address and size for reserved memory are 4KB aligned.
//
@ -1048,7 +1055,7 @@ LegacyBiosInstall (
&StartAddress
);
if (!EFI_ERROR (Status)) {
MemoryPtr = (VOID *) ((UINTN) StartAddress);
MemoryPtr = (VOID *)((UINTN)StartAddress);
ZeroMem (MemoryPtr, 0x1000);
} else {
DEBUG ((DEBUG_ERROR, "WARNING: Allocate legacy memory fail for SCSI card - %x\n", MemStart));
@ -1069,7 +1076,7 @@ LegacyBiosInstall (
);
ASSERT_EFI_ERROR (Status);
ZeroMem ((VOID *) ((UINTN) MemoryAddressUnder1MB), MemorySize);
ZeroMem ((VOID *)((UINTN)MemoryAddressUnder1MB), MemorySize);
//
// Allocate space for thunker and Init Thunker
@ -1082,10 +1089,10 @@ LegacyBiosInstall (
&MemoryAddress
);
ASSERT_EFI_ERROR (Status);
Private->IntThunk = (LOW_MEMORY_THUNK *) (UINTN) MemoryAddress;
Private->IntThunk = (LOW_MEMORY_THUNK *)(UINTN)MemoryAddress;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
EfiToLegacy16InitTable->ThunkStart = (UINT32) (EFI_PHYSICAL_ADDRESS) (UINTN) MemoryAddress;
EfiToLegacy16InitTable->ThunkSizeInBytes = (UINT32) (sizeof (LOW_MEMORY_THUNK));
EfiToLegacy16InitTable->ThunkStart = (UINT32)(EFI_PHYSICAL_ADDRESS)(UINTN)MemoryAddress;
EfiToLegacy16InitTable->ThunkSizeInBytes = (UINT32)(sizeof (LOW_MEMORY_THUNK));
Status = LegacyBiosInitializeThunk (Private);
ASSERT_EFI_ERROR (Status);
@ -1093,8 +1100,8 @@ LegacyBiosInstall (
//
// Init the legacy memory map in memory < 1 MB.
//
EfiToLegacy16InitTable->BiosLessThan1MB = (UINT32) MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemory = (UINT32) MemoryAddressUnder1MB;
EfiToLegacy16InitTable->BiosLessThan1MB = (UINT32)MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemory = (UINT32)MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemorySizeInBytes = MemorySize;
MemorySize = PcdGet32 (PcdHighPmmMemorySize);
@ -1121,8 +1128,9 @@ LegacyBiosInstall (
&MemoryAddress
);
}
if (!EFI_ERROR (Status)) {
EfiToLegacy16InitTable->HiPmmMemory = (UINT32) (EFI_PHYSICAL_ADDRESS) (UINTN) MemoryAddress;
EfiToLegacy16InitTable->HiPmmMemory = (UINT32)(EFI_PHYSICAL_ADDRESS)(UINTN)MemoryAddress;
EfiToLegacy16InitTable->HiPmmMemorySizeInBytes = MemorySize;
}
@ -1135,32 +1143,34 @@ LegacyBiosInstall (
if (EFI_ERROR (Status)) {
return Status;
}
//
// Initialize interrupt redirection code and entries;
// IDT Vectors 0x68-0x6f must be redirected to IDT Vectors 0x08-0x0f.
//
CopyMem (
Private->IntThunk->InterruptRedirectionCode,
(VOID *) (UINTN) InterruptRedirectionTemplate,
sizeof (Private->IntThunk->InterruptRedirectionCode)
);
Private->IntThunk->InterruptRedirectionCode,
(VOID *)(UINTN)InterruptRedirectionTemplate,
sizeof (Private->IntThunk->InterruptRedirectionCode)
);
//
// Save Unexpected interrupt vector so can restore it just prior to boot
//
ACCESS_PAGE0_CODE (
BaseVectorMaster = (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE_VECTOR_MASTER);
BaseVectorMaster = (UINT32 *)(sizeof (UINT32) * PROTECTED_MODE_BASE_VECTOR_MASTER);
Private->BiosUnexpectedInt = BaseVectorMaster[0];
IntRedirCode = (UINT32) (UINTN) Private->IntThunk->InterruptRedirectionCode;
IntRedirCode = (UINT32)(UINTN)Private->IntThunk->InterruptRedirectionCode;
for (Index = 0; Index < 8; Index++) {
BaseVectorMaster[Index] = (EFI_SEGMENT (IntRedirCode + Index * 4) << 16) | EFI_OFFSET (IntRedirCode + Index * 4);
}
);
BaseVectorMaster[Index] = (EFI_SEGMENT (IntRedirCode + Index * 4) << 16) | EFI_OFFSET (IntRedirCode + Index * 4);
}
);
//
// Save EFI value
//
Private->ThunkSeg = (UINT16) (EFI_SEGMENT (IntRedirCode));
Private->ThunkSeg = (UINT16)(EFI_SEGMENT (IntRedirCode));
//
// Allocate reserved memory for SMBIOS table used in legacy boot if SMBIOS table exists
@ -1198,18 +1208,20 @@ LegacyBiosInstall (
// Make a new handle and install the protocol
//
Private->Handle = NULL;
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBios
);
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBios
);
Private->Csm16PciInterfaceVersion = GetPciInterfaceVersion (Private);
DEBUG ((DEBUG_INFO, "CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8) (Private->Csm16PciInterfaceVersion >> 8),
(UINT8) Private->Csm16PciInterfaceVersion
));
DEBUG ((
DEBUG_INFO,
"CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8)(Private->Csm16PciInterfaceVersion >> 8),
(UINT8)Private->Csm16PciInterfaceVersion
));
ASSERT (Private->Csm16PciInterfaceVersion != 0);
return Status;
}

765
OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
View File

File diff suppressed because it is too large Load Diff

1170
OvmfPkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
View File

File diff suppressed because it is too large Load Diff

6
OvmfPkg/Csm/LegacyBiosDxe/LegacyCmos.c
View File

@ -66,12 +66,12 @@ LegacyCalculateWriteStandardCmosChecksum (
for (Checksum = 0, Register = 0x10; Register < 0x2e; Register++) {
Checksum = (UINT16)(Checksum + LegacyReadStandardCmos (Register));
}
LegacyWriteStandardCmos (CMOS_2E, (UINT8)(Checksum >> 8));
LegacyWriteStandardCmos (CMOS_2F, (UINT8)(Checksum & 0xff));
return EFI_SUCCESS;
}
/**
Fill in the standard CMOS stuff before Legacy16 load
@ -82,7 +82,7 @@ LegacyCalculateWriteStandardCmosChecksum (
**/
EFI_STATUS
LegacyBiosInitCmos (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
UINT32 Size;
@ -103,7 +103,7 @@ LegacyBiosInitCmos (
Size = 15 * SIZE_1MB;
if (Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb < (15 * SIZE_1MB)) {
Size = Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb >> 10;
Size = Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb >> 10;
}
LegacyWriteStandardCmos (CMOS_17, (UINT8)(Size & 0xFF));

117
OvmfPkg/Csm/LegacyBiosDxe/LegacyIde.c
View File

@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBiosInterface.h"
BOOLEAN mIdeDataBuiltFlag = FALSE;
BOOLEAN mIdeDataBuiltFlag = FALSE;
/**
Collect IDE Inquiry data from the IDE disks
@ -23,9 +23,9 @@ BOOLEAN mIdeDataBuiltFlag = FALSE;
**/
EFI_STATUS
LegacyBiosBuildIdeData (
IN LEGACY_BIOS_INSTANCE *Private,
IN HDD_INFO **HddInfo,
IN UINT16 Flag
IN LEGACY_BIOS_INSTANCE *Private,
IN HDD_INFO **HddInfo,
IN UINT16 Flag
)
{
EFI_STATUS Status;
@ -60,14 +60,14 @@ LegacyBiosBuildIdeData (
//
PciDevicePath = NULL;
LocalHddInfo = *HddInfo;
Status = Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *) &LocalHddInfo
);
Status = Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *)&LocalHddInfo
);
if (!EFI_ERROR (Status)) {
IdeController = HandleBuffer[0];
//
@ -75,10 +75,10 @@ LegacyBiosBuildIdeData (
//
if (Flag != 0) {
gBS->DisconnectController (
IdeController,
NULL,
NULL
);
IdeController,
NULL,
NULL
);
}
gBS->ConnectController (IdeController, NULL, NULL, FALSE);
@ -88,13 +88,13 @@ LegacyBiosBuildIdeData (
// And GetIdeHandle will switch to Legacy mode, if required.
//
Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *) &LocalHddInfo
);
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *)&LocalHddInfo
);
}
mIdeDataBuiltFlag = TRUE;
@ -103,19 +103,19 @@ LegacyBiosBuildIdeData (
// Get Identity command from all drives
//
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiDiskInfoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
ByProtocol,
&gEfiDiskInfoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
Private->IdeDriveCount = (UINT8) HandleCount;
Private->IdeDriveCount = (UINT8)HandleCount;
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiDiskInfoProtocolGuid,
(VOID **) &DiskInfo
(VOID **)&DiskInfo
);
ASSERT_EFI_ERROR (Status);
@ -126,7 +126,7 @@ LegacyBiosBuildIdeData (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiDevicePathProtocolGuid,
(VOID *) &DevicePath
(VOID *)&DevicePath
);
ASSERT_EFI_ERROR (Status);
@ -134,12 +134,14 @@ LegacyBiosBuildIdeData (
while (!IsDevicePathEnd (DevicePathNode)) {
TempDevicePathNode = NextDevicePathNode (DevicePathNode);
if ((DevicePathType (DevicePathNode) == HARDWARE_DEVICE_PATH) &&
( DevicePathSubType (DevicePathNode) == HW_PCI_DP) &&
( DevicePathType(TempDevicePathNode) == MESSAGING_DEVICE_PATH) &&
( DevicePathSubType(TempDevicePathNode) == MSG_ATAPI_DP) ) {
PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
(DevicePathSubType (DevicePathNode) == HW_PCI_DP) &&
(DevicePathType (TempDevicePathNode) == MESSAGING_DEVICE_PATH) &&
(DevicePathSubType (TempDevicePathNode) == MSG_ATAPI_DP))
{
PciDevicePath = (PCI_DEVICE_PATH *)DevicePathNode;
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
@ -161,7 +163,8 @@ LegacyBiosBuildIdeData (
for (PciIndex = 0; PciIndex < 8; PciIndex++) {
if ((PciDevicePath->Device == LocalHddInfo[PciIndex].Device) &&
(PciDevicePath->Function == LocalHddInfo[PciIndex].Function)
) {
)
{
break;
}
}
@ -186,15 +189,15 @@ LegacyBiosBuildIdeData (
InquiryData = NULL;
InquiryDataSize = 0;
Status = DiskInfo->Inquiry (
DiskInfo,
NULL,
&InquiryDataSize
);
Status = DiskInfo->Inquiry (
DiskInfo,
NULL,
&InquiryDataSize
);
if (Status == EFI_BUFFER_TOO_SMALL) {
InquiryData = (UINT8 *) AllocatePool (
InquiryDataSize
);
InquiryData = (UINT8 *)AllocatePool (
InquiryDataSize
);
if (InquiryData != NULL) {
Status = DiskInfo->Inquiry (
DiskInfo,
@ -227,6 +230,7 @@ LegacyBiosBuildIdeData (
LocalHddInfo[PciIndex + IdeChannel].Status |= HDD_SLAVE_ATAPI_ZIPDISK;
}
}
FreePool (InquiryData);
} else {
if (IdeDevice == 0) {
@ -246,7 +250,6 @@ LegacyBiosBuildIdeData (
return EFI_SUCCESS;
}
/**
If the IDE channel is in compatibility (legacy) mode, remove all
PCI I/O BAR addresses from the controller.
@ -257,13 +260,13 @@ LegacyBiosBuildIdeData (
**/
VOID
InitLegacyIdeController (
IN EFI_HANDLE IdeController
IN EFI_HANDLE IdeController
)
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT32 IOBarClear;
EFI_STATUS Status;
PCI_TYPE00 PciData;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT32 IOBarClear;
EFI_STATUS Status;
PCI_TYPE00 PciData;
//
// If the IDE channel is in compatibility (legacy) mode, remove all
@ -277,20 +280,21 @@ InitLegacyIdeController (
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
return ;
return;
}
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (PciData), &PciData);
if (EFI_ERROR (Status)) {
return ;
return;
}
//
// Check whether this is IDE
//
if ((PciData.Hdr.ClassCode[2] != PCI_CLASS_MASS_STORAGE) ||
(PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE)) {
return ;
(PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE))
{
return;
}
//
@ -301,10 +305,11 @@ InitLegacyIdeController (
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear);
}
if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_SNE) == 0) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear);
}
return ;
return;
}

1214
OvmfPkg/Csm/LegacyBiosDxe/LegacyPci.c
View File

File diff suppressed because it is too large Load Diff

300
OvmfPkg/Csm/LegacyBiosDxe/LegacySio.c
View File

@ -21,32 +21,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
LegacyBiosBuildSioDataFromSio (
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ChildIndex;
EFI_SIO_PROTOCOL *Sio;
ACPI_RESOURCE_HEADER_PTR Resources;
EFI_ACPI_IO_PORT_DESCRIPTOR *IoResource;
EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIoResource;
EFI_ACPI_DMA_DESCRIPTOR *DmaResource;
EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *IrqResource;
UINT16 Address;
UINT8 Dma;
UINT8 Irq;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
ACPI_HID_DEVICE_PATH *Acpi;
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ChildIndex;
EFI_SIO_PROTOCOL *Sio;
ACPI_RESOURCE_HEADER_PTR Resources;
EFI_ACPI_IO_PORT_DESCRIPTOR *IoResource;
EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIoResource;
EFI_ACPI_DMA_DESCRIPTOR *DmaResource;
EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *IrqResource;
UINT16 Address;
UINT8 Dma;
UINT8 Irq;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
ACPI_HID_DEVICE_PATH *Acpi;
//
// Get the list of ISA controllers in the system
@ -61,11 +61,12 @@ LegacyBiosBuildSioDataFromSio (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Collect legacy information from each of the ISA controllers in the system
//
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiSioProtocolGuid, (VOID **) &Sio);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiSioProtocolGuid, (VOID **)&Sio);
if (EFI_ERROR (Status)) {
continue;
}
@ -73,46 +74,46 @@ LegacyBiosBuildSioDataFromSio (
Address = MAX_UINT16;
Dma = MAX_UINT8;
Irq = MAX_UINT8;
Status = Sio->GetResources (Sio, &Resources);
Status = Sio->GetResources (Sio, &Resources);
if (!EFI_ERROR (Status)) {
//
// Get the base address information from ACPI resource descriptor.
//
while (Resources.SmallHeader->Byte != ACPI_END_TAG_DESCRIPTOR) {
switch (Resources.SmallHeader->Byte) {
case ACPI_IO_PORT_DESCRIPTOR:
IoResource = (EFI_ACPI_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
Address = IoResource->BaseAddressMin;
break;
case ACPI_IO_PORT_DESCRIPTOR:
IoResource = (EFI_ACPI_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
Address = IoResource->BaseAddressMin;
break;
case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
FixedIoResource = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
Address = FixedIoResource->BaseAddress;
break;
case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
FixedIoResource = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
Address = FixedIoResource->BaseAddress;
break;
case ACPI_DMA_DESCRIPTOR:
DmaResource = (EFI_ACPI_DMA_DESCRIPTOR *) Resources.SmallHeader;
Dma = (UINT8) LowBitSet32 (DmaResource->ChannelMask);
break;
case ACPI_DMA_DESCRIPTOR:
DmaResource = (EFI_ACPI_DMA_DESCRIPTOR *)Resources.SmallHeader;
Dma = (UINT8)LowBitSet32 (DmaResource->ChannelMask);
break;
case ACPI_IRQ_DESCRIPTOR:
case ACPI_IRQ_NOFLAG_DESCRIPTOR:
IrqResource = (EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *) Resources.SmallHeader;
Irq = (UINT8) LowBitSet32 (IrqResource->Mask);
break;
case ACPI_IRQ_DESCRIPTOR:
case ACPI_IRQ_NOFLAG_DESCRIPTOR:
IrqResource = (EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *)Resources.SmallHeader;
Irq = (UINT8)LowBitSet32 (IrqResource->Mask);
break;
default:
break;
default:
break;
}
if (Resources.SmallHeader->Bits.Type == 0) {
Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *) ((UINT8 *) Resources.SmallHeader
+ Resources.SmallHeader->Bits.Length
+ sizeof (*Resources.SmallHeader));
Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *)((UINT8 *)Resources.SmallHeader
+ Resources.SmallHeader->Bits.Length
+ sizeof (*Resources.SmallHeader));
} else {
Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *) ((UINT8 *) Resources.LargeHeader
+ Resources.LargeHeader->Length
+ sizeof (*Resources.LargeHeader));
Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *)((UINT8 *)Resources.LargeHeader
+ Resources.LargeHeader->Length
+ sizeof (*Resources.LargeHeader));
}
}
}
@ -126,13 +127,14 @@ LegacyBiosBuildSioDataFromSio (
Acpi = NULL;
while (!IsDevicePathEnd (DevicePath)) {
Acpi = (ACPI_HID_DEVICE_PATH *) DevicePath;
Acpi = (ACPI_HID_DEVICE_PATH *)DevicePath;
DevicePath = NextDevicePathNode (DevicePath);
}
if ((Acpi == NULL) || (DevicePathType (Acpi) != ACPI_DEVICE_PATH) ||
((DevicePathSubType (Acpi) != ACPI_DP) && (DevicePathSubType (Acpi) != ACPI_EXTENDED_DP))
) {
)
{
continue;
}
@ -141,9 +143,8 @@ LegacyBiosBuildSioDataFromSio (
//
// Ignore DMA resource since it is always returned NULL
//
if (Acpi->HID == EISA_PNP_ID (0x500) || Acpi->HID == EISA_PNP_ID (0x501)) {
if (Acpi->UID < 4 && Address != MAX_UINT16 && Irq != MAX_UINT8) {
if ((Acpi->HID == EISA_PNP_ID (0x500)) || (Acpi->HID == EISA_PNP_ID (0x501))) {
if ((Acpi->UID < 4) && (Address != MAX_UINT16) && (Irq != MAX_UINT8)) {
//
// Get the handle of the child device that has opened the Super I/O Protocol
//
@ -156,14 +157,15 @@ LegacyBiosBuildSioDataFromSio (
if (EFI_ERROR (Status)) {
continue;
}
for (ChildIndex = 0; ChildIndex < EntryCount; ChildIndex++) {
if ((OpenInfoBuffer[ChildIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **) &SerialIo);
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **)&SerialIo);
if (!EFI_ERROR (Status)) {
SioSerial = &SioPtr->Serial[Acpi->UID];
SioSerial->Address = Address;
SioSerial->Irq = Irq;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
SioSerial = &SioPtr->Serial[Acpi->UID];
SioSerial->Address = Address;
SioSerial->Irq = Irq;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
break;
}
}
@ -172,36 +174,39 @@ LegacyBiosBuildSioDataFromSio (
FreePool (OpenInfoBuffer);
}
}
//
// See if this is an ISA parallel port
//
// Ignore DMA resource since it is always returned NULL, port
// only used in output mode.
//
if (Acpi->HID == EISA_PNP_ID (0x400) || Acpi->HID == EISA_PNP_ID (0x401)) {
if (Acpi->UID < 3 && Address != MAX_UINT16 && Irq != MAX_UINT8 && Dma != MAX_UINT8) {
SioParallel = &SioPtr->Parallel[Acpi->UID];
SioParallel->Address = Address;
SioParallel->Irq = Irq;
SioParallel->Dma = Dma;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
if ((Acpi->HID == EISA_PNP_ID (0x400)) || (Acpi->HID == EISA_PNP_ID (0x401))) {
if ((Acpi->UID < 3) && (Address != MAX_UINT16) && (Irq != MAX_UINT8) && (Dma != MAX_UINT8)) {
SioParallel = &SioPtr->Parallel[Acpi->UID];
SioParallel->Address = Address;
SioParallel->Irq = Irq;
SioParallel->Dma = Dma;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
}
}
//
// See if this is an ISA floppy controller
//
if (Acpi->HID == EISA_PNP_ID (0x604)) {
if (Address != MAX_UINT16 && Irq != MAX_UINT8 && Dma != MAX_UINT8) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **) &BlockIo);
if ((Address != MAX_UINT16) && (Irq != MAX_UINT8) && (Dma != MAX_UINT8)) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **)&BlockIo);
if (!EFI_ERROR (Status)) {
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = Address;
SioFloppy->Irq = Irq;
SioFloppy->Dma = Dma;
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = Address;
SioFloppy->Irq = Irq;
SioFloppy->Dma = Dma;
SioFloppy->NumberOfFloppy++;
}
}
}
//
// See if this is a mouse
// Always set mouse found so USB hot plug will work
@ -225,7 +230,6 @@ LegacyBiosBuildSioDataFromSio (
FreePool (HandleBuffer);
return EFI_SUCCESS;
}
/**
@ -239,27 +243,27 @@ LegacyBiosBuildSioDataFromSio (
**/
EFI_STATUS
LegacyBiosBuildSioDataFromIsaIo (
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ResourceIndex;
UINTN ChildIndex;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE *IoResource;
EFI_ISA_ACPI_RESOURCE *DmaResource;
EFI_ISA_ACPI_RESOURCE *InterruptResource;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ResourceIndex;
UINTN ChildIndex;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE *IoResource;
EFI_ISA_ACPI_RESOURCE *DmaResource;
EFI_ISA_ACPI_RESOURCE *InterruptResource;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
//
// Get the list of ISA controllers in the system
@ -274,12 +278,12 @@ LegacyBiosBuildSioDataFromIsaIo (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Collect legacy information from each of the ISA controllers in the system
//
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiIsaIoProtocolGuid, (VOID **) &IsaIo);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiIsaIoProtocolGuid, (VOID **)&IsaIo);
if (EFI_ERROR (Status)) {
continue;
}
@ -289,6 +293,7 @@ LegacyBiosBuildSioDataFromIsaIo (
if (ResourceList == NULL) {
continue;
}
//
// Collect the resource types neededto fill in the SIO data structure
//
@ -298,38 +303,40 @@ LegacyBiosBuildSioDataFromIsaIo (
for (ResourceIndex = 0;
ResourceList->ResourceItem[ResourceIndex].Type != EfiIsaAcpiResourceEndOfList;
ResourceIndex++
) {
)
{
switch (ResourceList->ResourceItem[ResourceIndex].Type) {
case EfiIsaAcpiResourceIo:
IoResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceIo:
IoResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceMemory:
break;
case EfiIsaAcpiResourceMemory:
break;
case EfiIsaAcpiResourceDma:
DmaResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceDma:
DmaResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceInterrupt:
InterruptResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceInterrupt:
InterruptResource = &ResourceList->ResourceItem[ResourceIndex];
break;
default:
break;
default:
break;
}
}
//
// See if this is an ISA serial port
//
// Ignore DMA resource since it is always returned NULL
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x500) || ResourceList->Device.HID == EISA_PNP_ID (0x501)) {
if (ResourceList->Device.UID <= 3 &&
IoResource != NULL &&
InterruptResource != NULL
) {
if ((ResourceList->Device.HID == EISA_PNP_ID (0x500)) || (ResourceList->Device.HID == EISA_PNP_ID (0x501))) {
if ((ResourceList->Device.UID <= 3) &&
(IoResource != NULL) &&
(InterruptResource != NULL)
)
{
//
// Get the handle of the child device that has opened the ISA I/O Protocol
//
@ -342,17 +349,18 @@ LegacyBiosBuildSioDataFromIsaIo (
if (EFI_ERROR (Status)) {
continue;
}
//
// We want resource for legacy even if no 32-bit driver installed
//
for (ChildIndex = 0; ChildIndex < EntryCount; ChildIndex++) {
if ((OpenInfoBuffer[ChildIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **) &SerialIo);
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **)&SerialIo);
if (!EFI_ERROR (Status)) {
SioSerial = &SioPtr->Serial[ResourceList->Device.UID];
SioSerial->Address = (UINT16) IoResource->StartRange;
SioSerial->Irq = (UINT8) InterruptResource->StartRange;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
SioSerial = &SioPtr->Serial[ResourceList->Device.UID];
SioSerial->Address = (UINT16)IoResource->StartRange;
SioSerial->Irq = (UINT8)InterruptResource->StartRange;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
break;
}
}
@ -361,40 +369,44 @@ LegacyBiosBuildSioDataFromIsaIo (
FreePool (OpenInfoBuffer);
}
}
//
// See if this is an ISA parallel port
//
// Ignore DMA resource since it is always returned NULL, port
// only used in output mode.
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x400) || ResourceList->Device.HID == EISA_PNP_ID (0x401)) {
if (ResourceList->Device.UID <= 2 &&
IoResource != NULL &&
InterruptResource != NULL &&
DmaResource != NULL
) {
SioParallel = &SioPtr->Parallel[ResourceList->Device.UID];
SioParallel->Address = (UINT16) IoResource->StartRange;
SioParallel->Irq = (UINT8) InterruptResource->StartRange;
SioParallel->Dma = (UINT8) DmaResource->StartRange;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
if ((ResourceList->Device.HID == EISA_PNP_ID (0x400)) || (ResourceList->Device.HID == EISA_PNP_ID (0x401))) {
if ((ResourceList->Device.UID <= 2) &&
(IoResource != NULL) &&
(InterruptResource != NULL) &&
(DmaResource != NULL)
)
{
SioParallel = &SioPtr->Parallel[ResourceList->Device.UID];
SioParallel->Address = (UINT16)IoResource->StartRange;
SioParallel->Irq = (UINT8)InterruptResource->StartRange;
SioParallel->Dma = (UINT8)DmaResource->StartRange;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
}
}
//
// See if this is an ISA floppy controller
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x604)) {
if (IoResource != NULL && InterruptResource != NULL && DmaResource != NULL) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **) &BlockIo);
if ((IoResource != NULL) && (InterruptResource != NULL) && (DmaResource != NULL)) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **)&BlockIo);
if (!EFI_ERROR (Status)) {
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = (UINT16) IoResource->StartRange;
SioFloppy->Irq = (UINT8) InterruptResource->StartRange;
SioFloppy->Dma = (UINT8) DmaResource->StartRange;
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = (UINT16)IoResource->StartRange;
SioFloppy->Irq = (UINT8)InterruptResource->StartRange;
SioFloppy->Dma = (UINT8)DmaResource->StartRange;
SioFloppy->NumberOfFloppy++;
}
}
}
//
// See if this is a mouse
// Always set mouse found so USB hot plug will work
@ -430,14 +442,14 @@ LegacyBiosBuildSioDataFromIsaIo (
**/
EFI_STATUS
LegacyBiosBuildSioData (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
EFI_HANDLE IsaBusController;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
EFI_STATUS Status;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
EFI_HANDLE IsaBusController;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
//
// Get the pointer to the SIO data structure

171
OvmfPkg/Csm/LegacyBiosDxe/Thunk.c
View File

@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBiosInterface.h"
THUNK_CONTEXT mThunkContext;
THUNK_CONTEXT mThunkContext;
/**
Sets the counter value for Timer #0 in a legacy 8254 timer.
@ -23,8 +23,8 @@ SetPitCount (
)
{
IoWrite8 (TIMER_CONTROL_PORT, TIMER0_CONTROL_WORD);
IoWrite8 (TIMER0_COUNT_PORT, (UINT8) (Count & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8) ((Count>>8) & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8)(Count & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8)((Count>>8) & 0xFF));
}
/**
@ -45,13 +45,13 @@ SetPitCount (
BOOLEAN
EFIAPI
LegacyBiosInt86 (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT8 BiosInt,
IN EFI_IA32_REGISTER_SET *Regs
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT8 BiosInt,
IN EFI_IA32_REGISTER_SET *Regs
)
{
UINT16 Segment;
UINT16 Offset;
UINT16 Segment;
UINT16 Offset;
Regs->X.Flags.Reserved1 = 1;
Regs->X.Flags.Reserved2 = 0;
@ -67,9 +67,9 @@ LegacyBiosInt86 (
// We use this base address to get the legacy interrupt handler.
//
ACCESS_PAGE0_CODE (
Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
Offset = (UINT16)((UINT32 *)0)[BiosInt];
);
Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
Offset = (UINT16)((UINT32 *)0)[BiosInt];
);
return InternalLegacyBiosFarCall (
This,
@ -102,12 +102,12 @@ LegacyBiosInt86 (
BOOLEAN
EFIAPI
LegacyBiosFarCall86 (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
)
{
Regs->X.Flags.Reserved1 = 1;
@ -134,8 +134,8 @@ LegacyBiosFarCall86 (
VOID
EFIAPI
LegacyBiosNullInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
}
@ -161,12 +161,12 @@ LegacyBiosNullInterruptHandler (
BOOLEAN
EFIAPI
InternalLegacyBiosFarCall (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
)
{
UINTN Status;
@ -180,19 +180,19 @@ InternalLegacyBiosFarCall (
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
ZeroMem (&ThunkRegSet, sizeof (ThunkRegSet));
ThunkRegSet.X.DI = Regs->X.DI;
ThunkRegSet.X.SI = Regs->X.SI;
ThunkRegSet.X.BP = Regs->X.BP;
ThunkRegSet.X.BX = Regs->X.BX;
ThunkRegSet.X.DX = Regs->X.DX;
ThunkRegSet.X.DI = Regs->X.DI;
ThunkRegSet.X.SI = Regs->X.SI;
ThunkRegSet.X.BP = Regs->X.BP;
ThunkRegSet.X.BX = Regs->X.BX;
ThunkRegSet.X.DX = Regs->X.DX;
//
// Sometimes, ECX is used to pass in 32 bit data. For example, INT 1Ah, AX = B10Dh is
// "PCI BIOS v2.0c + Write Configuration DWORD" and ECX has the dword to write.
//
ThunkRegSet.E.ECX = Regs->E.ECX;
ThunkRegSet.X.AX = Regs->X.AX;
ThunkRegSet.E.DS = Regs->X.DS;
ThunkRegSet.E.ES = Regs->X.ES;
ThunkRegSet.E.ECX = Regs->E.ECX;
ThunkRegSet.X.AX = Regs->X.AX;
ThunkRegSet.E.DS = Regs->X.DS;
ThunkRegSet.E.ES = Regs->X.ES;
CopyMem (&(ThunkRegSet.E.EFLAGS.UintN), &(Regs->X.Flags), sizeof (Regs->X.Flags));
@ -200,7 +200,7 @@ InternalLegacyBiosFarCall (
// Clear the error flag; thunk code may set it. Stack16 should be the high address
// Make Statk16 address the low 16 bit must be not zero.
//
Stack16 = (UINT16 *)((UINT8 *) mThunkContext.RealModeBuffer + mThunkContext.RealModeBufferSize - sizeof (UINT16));
Stack16 = (UINT16 *)((UINT8 *)mThunkContext.RealModeBuffer + mThunkContext.RealModeBufferSize - sizeof (UINT16));
//
// Save current rate of DXE Timer
@ -229,22 +229,25 @@ InternalLegacyBiosFarCall (
// handled properly from real mode.
//
DEBUG_CODE_BEGIN ();
UINTN Vector;
UINTN Count;
UINTN Vector;
UINTN Count;
for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
if (Status == EFI_ALREADY_STARTED) {
Count++;
}
if (Status == EFI_SUCCESS) {
Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL);
}
for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
if (Status == EFI_ALREADY_STARTED) {
Count++;
}
if (Count >= 2) {
DEBUG ((DEBUG_ERROR, "ERROR: More than one HW interrupt active with CSM enabled\n"));
if (Status == EFI_SUCCESS) {
Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL);
}
ASSERT (Count < 2);
}
if (Count >= 2) {
DEBUG ((DEBUG_ERROR, "ERROR: More than one HW interrupt active with CSM enabled\n"));
}
ASSERT (Count < 2);
DEBUG_CODE_END ();
//
@ -252,11 +255,11 @@ InternalLegacyBiosFarCall (
// period is less than the CSM required rate of 54.9254, then force the 8254
// PIT counter to 0, which is the CSM required rate of 54.9254 ms
//
if (Private->TimerUses8254 && TimerPeriod < 549254) {
if (Private->TimerUses8254 && (TimerPeriod < 549254)) {
SetPitCount (0);
}
if (Stack != NULL && StackSize != 0) {
if ((Stack != NULL) && (StackSize != 0)) {
//
// Copy Stack to low memory stack
//
@ -264,12 +267,12 @@ InternalLegacyBiosFarCall (
CopyMem (Stack16, Stack, StackSize);
}
ThunkRegSet.E.SS = (UINT16) (((UINTN) Stack16 >> 16) << 12);
ThunkRegSet.E.ESP = (UINT16) (UINTN) Stack16;
ThunkRegSet.E.CS = Segment;
ThunkRegSet.E.Eip = Offset;
ThunkRegSet.E.SS = (UINT16)(((UINTN)Stack16 >> 16) << 12);
ThunkRegSet.E.ESP = (UINT16)(UINTN)Stack16;
ThunkRegSet.E.CS = Segment;
ThunkRegSet.E.Eip = Offset;
mThunkContext.RealModeState = &ThunkRegSet;
mThunkContext.RealModeState = &ThunkRegSet;
//
// Set Legacy16 state. 0x08, 0x70 is legacy 8259 vector bases.
@ -279,7 +282,7 @@ InternalLegacyBiosFarCall (
AsmThunk16 (&mThunkContext);
if (Stack != NULL && StackSize != 0) {
if ((Stack != NULL) && (StackSize != 0)) {
//
// Copy low memory stack to Stack
//
@ -311,17 +314,17 @@ InternalLegacyBiosFarCall (
// PcdEbdaReservedMemorySize should be adjusted to larger for more OPROMs.
//
DEBUG_CODE_BEGIN ();
{
UINTN EbdaBaseAddress;
UINTN ReservedEbdaBaseAddress;
{
UINTN EbdaBaseAddress;
UINTN ReservedEbdaBaseAddress;
ACCESS_PAGE0_CODE (
EbdaBaseAddress = (*(UINT16 *) (UINTN) 0x40E) << 4;
ReservedEbdaBaseAddress = CONVENTIONAL_MEMORY_TOP
- PcdGet32 (PcdEbdaReservedMemorySize);
ASSERT (ReservedEbdaBaseAddress <= EbdaBaseAddress);
ACCESS_PAGE0_CODE (
EbdaBaseAddress = (*(UINT16 *)(UINTN)0x40E) << 4;
ReservedEbdaBaseAddress = CONVENTIONAL_MEMORY_TOP
- PcdGet32 (PcdEbdaReservedMemorySize);
ASSERT (ReservedEbdaBaseAddress <= EbdaBaseAddress);
);
}
}
DEBUG_CODE_END ();
//
@ -329,21 +332,21 @@ InternalLegacyBiosFarCall (
//
SaveAndSetDebugTimerInterrupt (InterruptState);
Regs->E.EDI = ThunkRegSet.E.EDI;
Regs->E.ESI = ThunkRegSet.E.ESI;
Regs->E.EBP = ThunkRegSet.E.EBP;
Regs->E.EBX = ThunkRegSet.E.EBX;
Regs->E.EDX = ThunkRegSet.E.EDX;
Regs->E.ECX = ThunkRegSet.E.ECX;
Regs->E.EAX = ThunkRegSet.E.EAX;
Regs->X.SS = ThunkRegSet.E.SS;
Regs->X.CS = ThunkRegSet.E.CS;
Regs->X.DS = ThunkRegSet.E.DS;
Regs->X.ES = ThunkRegSet.E.ES;
Regs->E.EDI = ThunkRegSet.E.EDI;
Regs->E.ESI = ThunkRegSet.E.ESI;
Regs->E.EBP = ThunkRegSet.E.EBP;
Regs->E.EBX = ThunkRegSet.E.EBX;
Regs->E.EDX = ThunkRegSet.E.EDX;
Regs->E.ECX = ThunkRegSet.E.ECX;
Regs->E.EAX = ThunkRegSet.E.EAX;
Regs->X.SS = ThunkRegSet.E.SS;
Regs->X.CS = ThunkRegSet.E.CS;
Regs->X.DS = ThunkRegSet.E.DS;
Regs->X.ES = ThunkRegSet.E.ES;
CopyMem (&(Regs->X.Flags), &(ThunkRegSet.E.EFLAGS.UintN), sizeof (Regs->X.Flags));
return (BOOLEAN) (Regs->X.Flags.CF == 1);
return (BOOLEAN)(Regs->X.Flags.CF == 1);
}
/**
@ -357,16 +360,16 @@ InternalLegacyBiosFarCall (
**/
EFI_STATUS
LegacyBiosInitializeThunk (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryAddress;
UINT8 TimerVector;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryAddress;
UINT8 TimerVector;
MemoryAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) Private->IntThunk;
MemoryAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Private->IntThunk;
mThunkContext.RealModeBuffer = (VOID *) (UINTN) (MemoryAddress + ((sizeof (LOW_MEMORY_THUNK) / EFI_PAGE_SIZE) + 1) * EFI_PAGE_SIZE);
mThunkContext.RealModeBuffer = (VOID *)(UINTN)(MemoryAddress + ((sizeof (LOW_MEMORY_THUNK) / EFI_PAGE_SIZE) + 1) * EFI_PAGE_SIZE);
mThunkContext.RealModeBufferSize = EFI_PAGE_SIZE;
mThunkContext.ThunkAttributes = THUNK_ATTRIBUTE_BIG_REAL_MODE | THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15;
@ -376,7 +379,7 @@ LegacyBiosInitializeThunk (
// Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
//
TimerVector = 0;
Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
ASSERT_EFI_ERROR (Status);
//

831
OvmfPkg/Csm/LegacyBootMaintUiLib/LegacyBootMaintUi.c
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File diff suppressed because it is too large Load Diff

113
OvmfPkg/Csm/LegacyBootMaintUiLib/LegacyBootMaintUi.h
View File

@ -6,13 +6,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _EFI_LEGACY_BOOT_OPTION_H_
#define _EFI_LEGACY_BOOT_OPTION_H_
#include <PiDxe.h>
#include <Guid/GlobalVariable.h>
#include <Guid/LegacyDevOrder.h>
#include <Guid/MdeModuleHii.h>
@ -38,42 +36,40 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBootMaintUiVfr.h"
#define CONFIG_OPTION_OFFSET 0x1200
#define CONFIG_OPTION_OFFSET 0x1200
//
// VarOffset that will be used to create question
// all these values are computed from the structure
// defined below
//
#define VAR_OFFSET(Field) ((UINT16) ((UINTN) &(((LEGACY_BOOT_NV_DATA *) 0)->Field)))
#define VAR_OFFSET(Field) ((UINT16) ((UINTN) &(((LEGACY_BOOT_NV_DATA *) 0)->Field)))
//
// Question Id of Zero is invalid, so add an offset to it
//
#define QUESTION_ID(Field) (VAR_OFFSET (Field) + CONFIG_OPTION_OFFSET)
#define LEGACY_FD_QUESTION_ID QUESTION_ID (LegacyFD)
#define LEGACY_HD_QUESTION_ID QUESTION_ID (LegacyHD)
#define LEGACY_CD_QUESTION_ID QUESTION_ID (LegacyCD)
#define LEGACY_NET_QUESTION_ID QUESTION_ID (LegacyNET)
#define LEGACY_BEV_QUESTION_ID QUESTION_ID (LegacyBEV)
#define QUESTION_ID(Field) (VAR_OFFSET (Field) + CONFIG_OPTION_OFFSET)
#define LEGACY_FD_QUESTION_ID QUESTION_ID (LegacyFD)
#define LEGACY_HD_QUESTION_ID QUESTION_ID (LegacyHD)
#define LEGACY_CD_QUESTION_ID QUESTION_ID (LegacyCD)
#define LEGACY_NET_QUESTION_ID QUESTION_ID (LegacyNET)
#define LEGACY_BEV_QUESTION_ID QUESTION_ID (LegacyBEV)
//
// String Constant
//
#define STR_FLOPPY L"Floppy Drive #%02x"
#define STR_HARDDISK L"HardDisk Drive #%02x"
#define STR_CDROM L"ATAPI CDROM Drive #%02x"
#define STR_NET L"NET Drive #%02x"
#define STR_BEV L"BEV Drive #%02x"
#define STR_FLOPPY L"Floppy Drive #%02x"
#define STR_HARDDISK L"HardDisk Drive #%02x"
#define STR_CDROM L"ATAPI CDROM Drive #%02x"
#define STR_NET L"NET Drive #%02x"
#define STR_BEV L"BEV Drive #%02x"
#define STR_FLOPPY_HELP L"Select Floppy Drive #%02x"
#define STR_HARDDISK_HELP L"Select HardDisk Drive #%02x"
#define STR_CDROM_HELP L"Select ATAPI CDROM Drive #%02x"
#define STR_NET_HELP L"NET Drive #%02x"
#define STR_BEV_HELP L"BEV Drive #%02x"
#define STR_FLOPPY_HELP L"Select Floppy Drive #%02x"
#define STR_HARDDISK_HELP L"Select HardDisk Drive #%02x"
#define STR_CDROM_HELP L"Select ATAPI CDROM Drive #%02x"
#define STR_NET_HELP L"NET Drive #%02x"
#define STR_BEV_HELP L"BEV Drive #%02x"
#define STR_FLOPPY_TITLE L"Set Legacy Floppy Drive Order"
#define STR_HARDDISK_TITLE L"Set Legacy HardDisk Drive Order"
@ -84,7 +80,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// These are the VFR compiler generated data representing our VFR data.
//
extern UINT8 LegacyBootMaintUiVfrBin[];
extern UINT8 LegacyBootMaintUiVfrBin[];
#pragma pack(1)
@ -92,52 +88,49 @@ extern UINT8 LegacyBootMaintUiVfrBin[];
/// HII specific Vendor Device Path definition.
///
typedef struct {
VENDOR_DEVICE_PATH VendorDevicePath;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH VendorDevicePath;
EFI_DEVICE_PATH_PROTOCOL End;
} HII_VENDOR_DEVICE_PATH;
//
// Variable created with this flag will be "Efi:...."
//
#define VAR_FLAG EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE
#define LEGACY_BOOT_OPTION_CALLBACK_DATA_SIGNATURE SIGNATURE_32 ('L', 'G', 'C', 'B')
typedef struct {
UINTN Signature;
UINTN Signature;
//
// HII relative handles
//
EFI_HII_HANDLE HiiHandle;
EFI_HANDLE DriverHandle;
EFI_HII_HANDLE HiiHandle;
EFI_HANDLE DriverHandle;
//
// Produced protocols
//
EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
//
// Maintain the data.
//
LEGACY_BOOT_MAINTAIN_DATA *MaintainMapData;
LEGACY_BOOT_MAINTAIN_DATA *MaintainMapData;
} LEGACY_BOOT_OPTION_CALLBACK_DATA;
//
// All of the signatures that will be used in list structure
//
#define LEGACY_MENU_OPTION_SIGNATURE SIGNATURE_32 ('m', 'e', 'n', 'u')
#define LEGACY_MENU_ENTRY_SIGNATURE SIGNATURE_32 ('e', 'n', 't', 'r')
#define LEGACY_MENU_OPTION_SIGNATURE SIGNATURE_32 ('m', 'e', 'n', 'u')
#define LEGACY_MENU_ENTRY_SIGNATURE SIGNATURE_32 ('e', 'n', 't', 'r')
#define LEGACY_LEGACY_DEV_CONTEXT_SELECT 0x9
typedef struct {
UINTN Signature;
LIST_ENTRY Head;
UINTN MenuNumber;
UINTN Signature;
LIST_ENTRY Head;
UINTN MenuNumber;
} LEGACY_MENU_OPTION;
typedef struct {
@ -146,18 +139,18 @@ typedef struct {
} LEGACY_DEVICE_CONTEXT;
typedef struct {
UINTN Signature;
LIST_ENTRY Link;
UINTN OptionNumber;
UINT16 *DisplayString;
UINT16 *HelpString;
EFI_STRING_ID DisplayStringToken;
EFI_STRING_ID HelpStringToken;
VOID *VariableContext;
UINTN Signature;
LIST_ENTRY Link;
UINTN OptionNumber;
UINT16 *DisplayString;
UINT16 *HelpString;
EFI_STRING_ID DisplayStringToken;
EFI_STRING_ID HelpStringToken;
VOID *VariableContext;
} LEGACY_MENU_ENTRY;
typedef struct {
UINT16 BbsIndex;
UINT16 BbsIndex;
} LEGACY_BOOT_OPTION_BBS_DATA;
#pragma pack()
@ -183,12 +176,12 @@ typedef struct {
EFI_STATUS
EFIAPI
LegacyBootOptionCallback (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN EFI_BROWSER_ACTION Action,
IN EFI_QUESTION_ID QuestionId,
IN UINT8 Type,
IN EFI_IFR_TYPE_VALUE *Value,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN EFI_BROWSER_ACTION Action,
IN EFI_QUESTION_ID QuestionId,
IN UINT8 Type,
IN EFI_IFR_TYPE_VALUE *Value,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
);
/**
@ -216,10 +209,10 @@ LegacyBootOptionCallback (
EFI_STATUS
EFIAPI
LegacyBootOptionExtractConfig (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Request,
OUT EFI_STRING *Progress,
OUT EFI_STRING *Results
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Request,
OUT EFI_STRING *Progress,
OUT EFI_STRING *Results
);
/**
@ -241,9 +234,9 @@ LegacyBootOptionExtractConfig (
EFI_STATUS
EFIAPI
LegacyBootOptionRouteConfig (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Configuration,
OUT EFI_STRING *Progress
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Configuration,
OUT EFI_STRING *Progress
);
#endif

42
OvmfPkg/Csm/LegacyBootMaintUiLib/LegacyBootMaintUiVfr.h
View File

@ -6,34 +6,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _EFI_LEGACY_BOOT_OPTION_VFR_H_
#define _EFI_LEGACY_BOOT_OPTION_VFR_H_
#include <Guid/HiiBootMaintenanceFormset.h>
#define MAX_MENU_NUMBER 100
#define MAX_MENU_NUMBER 100
#define LEGACY_BOOT_OPTION_FORMSET_GUID { 0x6bc75598, 0x89b4, 0x483d, { 0x91, 0x60, 0x7f, 0x46, 0x9a, 0x96, 0x35, 0x31 } }
#define VARSTORE_ID_LEGACY_BOOT 0x0001
#define VARSTORE_ID_LEGACY_BOOT 0x0001
#define LEGACY_BOOT_FORM_ID 0x1000
#define LEGACY_ORDER_CHANGE_FORM_ID 0x1001
#define FORM_FLOPPY_BOOT_ID 0x2000
#define FORM_HARDDISK_BOOT_ID 0x2001
#define FORM_CDROM_BOOT_ID 0x2002
#define FORM_NET_BOOT_ID 0x2003
#define FORM_BEV_BOOT_ID 0x2004
#define FORM_FLOPPY_BOOT_ID 0x2000
#define FORM_HARDDISK_BOOT_ID 0x2001
#define FORM_CDROM_BOOT_ID 0x2002
#define FORM_NET_BOOT_ID 0x2003
#define FORM_BEV_BOOT_ID 0x2004
#define FORM_BOOT_LEGACY_DEVICE_ID 0x9000
#define FORM_BOOT_LEGACY_LABEL_END 0x9001
#define FORM_BOOT_LEGACY_DEVICE_ID 0x9000
#define FORM_BOOT_LEGACY_LABEL_END 0x9001
#pragma pack(1)
@ -49,11 +43,11 @@ typedef struct {
//
// Legacy Device Order Selection Storage
//
UINT16 LegacyFD[MAX_MENU_NUMBER];
UINT16 LegacyHD[MAX_MENU_NUMBER];
UINT16 LegacyCD[MAX_MENU_NUMBER];
UINT16 LegacyNET[MAX_MENU_NUMBER];
UINT16 LegacyBEV[MAX_MENU_NUMBER];
UINT16 LegacyFD[MAX_MENU_NUMBER];
UINT16 LegacyHD[MAX_MENU_NUMBER];
UINT16 LegacyCD[MAX_MENU_NUMBER];
UINT16 LegacyNET[MAX_MENU_NUMBER];
UINT16 LegacyBEV[MAX_MENU_NUMBER];
} LEGACY_BOOT_NV_DATA;
///
@ -68,10 +62,10 @@ typedef struct {
//
// Legacy Device Order Selection Storage
//
LEGACY_BOOT_NV_DATA InitialNvData;
LEGACY_BOOT_NV_DATA CurrentNvData;
LEGACY_BOOT_NV_DATA LastTimeNvData;
UINT8 DisableMap[32];
LEGACY_BOOT_NV_DATA InitialNvData;
LEGACY_BOOT_NV_DATA CurrentNvData;
LEGACY_BOOT_NV_DATA LastTimeNvData;
UINT8 DisableMap[32];
} LEGACY_BOOT_MAINTAIN_DATA;
#pragma pack()

4
OvmfPkg/Csm/LegacyBootManagerLib/InternalLegacyBm.h
View File

@ -28,7 +28,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#pragma pack(1)
typedef struct {
UINT16 BbsIndex;
UINT16 BbsIndex;
} LEGACY_BM_BOOT_OPTION_BBS_DATA;
#pragma pack()
@ -44,7 +44,7 @@ typedef struct {
VOID
EFIAPI
LegacyBmBoot (
IN EFI_BOOT_MANAGER_LOAD_OPTION *BootOption
IN EFI_BOOT_MANAGER_LOAD_OPTION *BootOption
);
/**

779
OvmfPkg/Csm/LegacyBootManagerLib/LegacyBm.c
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File diff suppressed because it is too large Load Diff

234
OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c
View File

@ -36,13 +36,13 @@
//
// This is needed for runtime variable access.
//
EFI_EVENT mEmuVarsFvbAddrChangeEvent = NULL;
EFI_EVENT mEmuVarsFvbAddrChangeEvent = NULL;
//
// This is the single instance supported by this driver. It
// supports the FVB and Device Path protocols.
//
EFI_FW_VOL_BLOCK_DEVICE mEmuVarsFvb = {
EFI_FW_VOL_BLOCK_DEVICE mEmuVarsFvb = {
FVB_DEVICE_SIGNATURE,
{ // DevicePath
{
@ -67,9 +67,9 @@ EFI_FW_VOL_BLOCK_DEVICE mEmuVarsFvb = {
}
}
},
NULL, // BufferPtr
NULL, // BufferPtr
EMU_FVB_BLOCK_SIZE, // BlockSize
EMU_FVB_SIZE, // Size
EMU_FVB_SIZE, // Size
{ // FwVolBlockInstance
FvbProtocolGetAttributes,
FvbProtocolSetAttributes,
@ -82,7 +82,6 @@ EFI_FW_VOL_BLOCK_DEVICE mEmuVarsFvb = {
},
};
/**
Notification function of EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE.
@ -96,14 +95,13 @@ EFI_FW_VOL_BLOCK_DEVICE mEmuVarsFvb = {
VOID
EFIAPI
FvbVirtualAddressChangeEvent (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EfiConvertPointer (0x0, &mEmuVarsFvb.BufferPtr);
}
//
// FVB protocol APIs
//
@ -128,20 +126,19 @@ FvbVirtualAddressChangeEvent (
EFI_STATUS
EFIAPI
FvbProtocolGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
*Address = (EFI_PHYSICAL_ADDRESS)(UINTN) FvbDevice->BufferPtr;
*Address = (EFI_PHYSICAL_ADDRESS)(UINTN)FvbDevice->BufferPtr;
return EFI_SUCCESS;
}
/**
The GetBlockSize() function retrieves the size of the requested
block. It also returns the number of additional blocks with
@ -171,13 +168,13 @@ FvbProtocolGetPhysicalAddress (
EFI_STATUS
EFIAPI
FvbProtocolGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumberOfBlocks
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumberOfBlocks
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
if (Lba >= EMU_FVB_NUM_TOTAL_BLOCKS) {
return EFI_INVALID_PARAMETER;
@ -185,13 +182,12 @@ FvbProtocolGetBlockSize (
FvbDevice = FVB_DEVICE_FROM_THIS (This);
*BlockSize = FvbDevice->BlockSize;
*BlockSize = FvbDevice->BlockSize;
*NumberOfBlocks = (UINTN)(EMU_FVB_NUM_TOTAL_BLOCKS - Lba);
return EFI_SUCCESS;
}
/**
The GetAttributes() function retrieves the attributes and
current settings of the block. Status Codes Returned
@ -210,23 +206,22 @@ FvbProtocolGetBlockSize (
EFI_STATUS
EFIAPI
FvbProtocolGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
*Attributes =
(EFI_FVB_ATTRIBUTES_2) (
EFI_FVB2_READ_ENABLED_CAP |
EFI_FVB2_READ_STATUS |
EFI_FVB2_WRITE_ENABLED_CAP |
EFI_FVB2_WRITE_STATUS |
EFI_FVB2_ERASE_POLARITY
);
(EFI_FVB_ATTRIBUTES_2)(
EFI_FVB2_READ_ENABLED_CAP |
EFI_FVB2_READ_STATUS |
EFI_FVB2_WRITE_ENABLED_CAP |
EFI_FVB2_WRITE_STATUS |
EFI_FVB2_ERASE_POLARITY
);
return EFI_SUCCESS;
}
/**
The SetAttributes() function sets configurable firmware volume
attributes and returns the new settings of the firmware volume.
@ -252,14 +247,13 @@ FvbProtocolGetAttributes (
EFI_STATUS
EFIAPI
FvbProtocolSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
return EFI_ACCESS_DENIED;
}
/**
Erases and initializes a firmware volume block.
@ -311,16 +305,16 @@ FvbProtocolSetAttributes (
EFI_STATUS
EFIAPI
FvbProtocolEraseBlocks (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
...
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
VA_LIST Args;
EFI_LBA StartingLba;
UINTN NumOfLba;
UINT8 *ErasePtr;
UINTN EraseSize;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
VA_LIST Args;
EFI_LBA StartingLba;
UINTN NumOfLba;
UINT8 *ErasePtr;
UINTN EraseSize;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
@ -333,14 +327,17 @@ FvbProtocolEraseBlocks (
if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
break;
}
NumOfLba = VA_ARG (Args, UINTN);
if (StartingLba > EMU_FVB_NUM_TOTAL_BLOCKS ||
NumOfLba > EMU_FVB_NUM_TOTAL_BLOCKS - StartingLba) {
if ((StartingLba > EMU_FVB_NUM_TOTAL_BLOCKS) ||
(NumOfLba > EMU_FVB_NUM_TOTAL_BLOCKS - StartingLba))
{
VA_END (Args);
return EFI_INVALID_PARAMETER;
}
} while (1);
VA_END (Args);
//
@ -352,14 +349,16 @@ FvbProtocolEraseBlocks (
if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
break;
}
NumOfLba = VA_ARG (Args, UINTN);
ErasePtr = FvbDevice->BufferPtr;
ErasePtr = FvbDevice->BufferPtr;
ErasePtr += (UINTN)StartingLba * FvbDevice->BlockSize;
EraseSize = NumOfLba * FvbDevice->BlockSize;
SetMem (ErasePtr, EraseSize, ERASED_UINT8);
} while (1);
VA_END (Args);
//
@ -372,7 +371,6 @@ FvbProtocolEraseBlocks (
return EFI_SUCCESS;
}
/**
Writes the specified number of bytes from the input buffer to the block.
@ -435,31 +433,32 @@ FvbProtocolEraseBlocks (
EFI_STATUS
EFIAPI
FvbProtocolWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
UINT8 *FvbDataPtr;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
UINT8 *FvbDataPtr;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
if (Lba >= EMU_FVB_NUM_TOTAL_BLOCKS ||
Offset > FvbDevice->BlockSize) {
if ((Lba >= EMU_FVB_NUM_TOTAL_BLOCKS) ||
(Offset > FvbDevice->BlockSize))
{
return EFI_INVALID_PARAMETER;
}
Status = EFI_SUCCESS;
if (*NumBytes > FvbDevice->BlockSize - Offset) {
*NumBytes = FvbDevice->BlockSize - Offset;
Status = EFI_BAD_BUFFER_SIZE;
Status = EFI_BAD_BUFFER_SIZE;
}
FvbDataPtr = FvbDevice->BufferPtr;
FvbDataPtr = FvbDevice->BufferPtr;
FvbDataPtr += (UINTN)Lba * FvbDevice->BlockSize;
FvbDataPtr += Offset;
@ -468,7 +467,6 @@ FvbProtocolWrite (
return Status;
}
/**
Reads the specified number of bytes into a buffer from the specified block.
@ -519,31 +517,32 @@ FvbProtocolWrite (
EFI_STATUS
EFIAPI
FvbProtocolRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN OUT UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN OUT UINT8 *Buffer
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
UINT8 *FvbDataPtr;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
UINT8 *FvbDataPtr;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
if (Lba >= EMU_FVB_NUM_TOTAL_BLOCKS ||
Offset > FvbDevice->BlockSize) {
if ((Lba >= EMU_FVB_NUM_TOTAL_BLOCKS) ||
(Offset > FvbDevice->BlockSize))
{
return EFI_INVALID_PARAMETER;
}
Status = EFI_SUCCESS;
if (*NumBytes > FvbDevice->BlockSize - Offset) {
*NumBytes = FvbDevice->BlockSize - Offset;
Status = EFI_BAD_BUFFER_SIZE;
Status = EFI_BAD_BUFFER_SIZE;
}
FvbDataPtr = FvbDevice->BufferPtr;
FvbDataPtr = FvbDevice->BufferPtr;
FvbDataPtr += (UINTN)Lba * FvbDevice->BlockSize;
FvbDataPtr += Offset;
@ -552,7 +551,6 @@ FvbProtocolRead (
return Status;
}
/**
Check the integrity of firmware volume header.
@ -564,7 +562,7 @@ FvbProtocolRead (
**/
EFI_STATUS
ValidateFvHeader (
IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
)
{
UINT16 Checksum;
@ -578,14 +576,16 @@ ValidateFvHeader (
(FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
(FwVolHeader->FvLength != EMU_FVB_SIZE) ||
(FwVolHeader->HeaderLength != EMU_FV_HEADER_LENGTH)
) {
)
{
DEBUG ((DEBUG_INFO, "EMU Variable FVB: Basic FV headers were invalid\n"));
return EFI_NOT_FOUND;
}
//
// Verify the header checksum
//
Checksum = CalculateSum16((VOID*) FwVolHeader, FwVolHeader->HeaderLength);
Checksum = CalculateSum16 ((VOID *)FwVolHeader, FwVolHeader->HeaderLength);
if (Checksum != 0) {
DEBUG ((DEBUG_INFO, "EMU Variable FVB: FV checksum was invalid\n"));
@ -595,7 +595,6 @@ ValidateFvHeader (
return EFI_SUCCESS;
}
/**
Initializes the FV Header and Variable Store Header
to support variable operations.
@ -605,13 +604,13 @@ ValidateFvHeader (
**/
VOID
InitializeFvAndVariableStoreHeaders (
IN VOID *Ptr
IN VOID *Ptr
)
{
//
// Templates for authenticated variable FV header
//
STATIC FVB_FV_HDR_AND_VARS_TEMPLATE FvAndAuthenticatedVarTemplate = {
STATIC FVB_FV_HDR_AND_VARS_TEMPLATE FvAndAuthenticatedVarTemplate = {
{ // EFI_FIRMWARE_VOLUME_HEADER FvHdr;
// UINT8 ZeroVector[16];
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
@ -638,7 +637,7 @@ InitializeFvAndVariableStoreHeaders (
0,
// UINT8 Reserved[1];
{0},
{ 0 },
// UINT8 Revision;
EFI_FVH_REVISION,
@ -647,20 +646,20 @@ InitializeFvAndVariableStoreHeaders (
{
{
EMU_FVB_NUM_TOTAL_BLOCKS, // UINT32 NumBlocks;
EMU_FVB_BLOCK_SIZE // UINT32 Length;
EMU_FVB_BLOCK_SIZE // UINT32 Length;
}
}
},
// EFI_FV_BLOCK_MAP_ENTRY EndBlockMap;
{ 0, 0 }, // End of block map
{ // VARIABLE_STORE_HEADER VarHdr;
// EFI_GUID Signature; // need authenticated variables for secure boot
EFI_AUTHENTICATED_VARIABLE_GUID,
// EFI_GUID Signature; // need authenticated variables for secure boot
EFI_AUTHENTICATED_VARIABLE_GUID,
// UINT32 Size;
(
FixedPcdGet32 (PcdFlashNvStorageVariableSize) -
OFFSET_OF (FVB_FV_HDR_AND_VARS_TEMPLATE, VarHdr)
FixedPcdGet32 (PcdFlashNvStorageVariableSize) -
OFFSET_OF (FVB_FV_HDR_AND_VARS_TEMPLATE, VarHdr)
),
// UINT8 Format;
@ -691,7 +690,7 @@ InitializeFvAndVariableStoreHeaders (
//
// Update the checksum for the FV header
//
Fv = (EFI_FIRMWARE_VOLUME_HEADER*) Ptr;
Fv = (EFI_FIRMWARE_VOLUME_HEADER *)Ptr;
Fv->Checksum = CalculateCheckSum16 (Ptr, Fv->HeaderLength);
}
@ -707,38 +706,44 @@ InitializeFvAndVariableStoreHeaders (
EFI_STATUS
EFIAPI
FvbInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
VOID *Ptr;
VOID *SubPtr;
BOOLEAN Initialize;
EFI_HANDLE Handle;
EFI_PHYSICAL_ADDRESS Address;
RETURN_STATUS PcdStatus;
EFI_STATUS Status;
VOID *Ptr;
VOID *SubPtr;
BOOLEAN Initialize;
EFI_HANDLE Handle;
EFI_PHYSICAL_ADDRESS Address;
RETURN_STATUS PcdStatus;
DEBUG ((DEBUG_INFO, "EMU Variable FVB Started\n"));
//
// Verify that the PCD's are set correctly.
//
ASSERT (FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize) %
EMU_FVB_BLOCK_SIZE == 0);
ASSERT (
FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize) %
EMU_FVB_BLOCK_SIZE == 0
);
if (
(PcdGet32 (PcdFlashNvStorageVariableSize) +
PcdGet32 (PcdFlashNvStorageFtwWorkingSize)
) >
EMU_FVB_NUM_SPARE_BLOCKS * EMU_FVB_BLOCK_SIZE
) {
(PcdGet32 (PcdFlashNvStorageVariableSize) +
PcdGet32 (PcdFlashNvStorageFtwWorkingSize)
) >
EMU_FVB_NUM_SPARE_BLOCKS * EMU_FVB_BLOCK_SIZE
)
{
DEBUG ((DEBUG_ERROR, "EMU Variable invalid PCD sizes\n"));
return EFI_INVALID_PARAMETER;
}
if (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {
DEBUG ((DEBUG_INFO, "Disabling EMU Variable FVB since "
"flash variables appear to be supported.\n"));
DEBUG ((
DEBUG_INFO,
"Disabling EMU Variable FVB since "
"flash variables appear to be supported.\n"
));
return EFI_ABORTED;
}
@ -752,7 +757,7 @@ FvbInitialize (
//
Initialize = TRUE;
if (PcdGet64 (PcdEmuVariableNvStoreReserved) != 0) {
Ptr = (VOID*)(UINTN) PcdGet64 (PcdEmuVariableNvStoreReserved);
Ptr = (VOID *)(UINTN)PcdGet64 (PcdEmuVariableNvStoreReserved);
DEBUG ((
DEBUG_INFO,
"EMU Variable FVB: Using pre-reserved block at %p\n",
@ -776,32 +781,37 @@ FvbInitialize (
SetMem (Ptr, EMU_FVB_SIZE, ERASED_UINT8);
InitializeFvAndVariableStoreHeaders (Ptr);
}
PcdStatus = PcdSet64S (PcdFlashNvStorageVariableBase64, (UINT32)(UINTN) Ptr);
PcdStatus = PcdSet64S (PcdFlashNvStorageVariableBase64, (UINT32)(UINTN)Ptr);
ASSERT_RETURN_ERROR (PcdStatus);
//
// Initialize the Fault Tolerant Write data area
//
SubPtr = (VOID*) ((UINT8*) Ptr + PcdGet32 (PcdFlashNvStorageVariableSize));
PcdStatus = PcdSet32S (PcdFlashNvStorageFtwWorkingBase,
(UINT32)(UINTN) SubPtr);
SubPtr = (VOID *)((UINT8 *)Ptr + PcdGet32 (PcdFlashNvStorageVariableSize));
PcdStatus = PcdSet32S (
PcdFlashNvStorageFtwWorkingBase,
(UINT32)(UINTN)SubPtr
);
ASSERT_RETURN_ERROR (PcdStatus);
//
// Initialize the Fault Tolerant Write spare block
//
SubPtr = (VOID*) ((UINT8*) Ptr +
SubPtr = (VOID *)((UINT8 *)Ptr +
EMU_FVB_NUM_SPARE_BLOCKS * EMU_FVB_BLOCK_SIZE);
PcdStatus = PcdSet32S (PcdFlashNvStorageFtwSpareBase,
(UINT32)(UINTN) SubPtr);
PcdStatus = PcdSet32S (
PcdFlashNvStorageFtwSpareBase,
(UINT32)(UINTN)SubPtr
);
ASSERT_RETURN_ERROR (PcdStatus);
//
// Setup FVB device path
//
Address = (EFI_PHYSICAL_ADDRESS)(UINTN) Ptr;
Address = (EFI_PHYSICAL_ADDRESS)(UINTN)Ptr;
mEmuVarsFvb.DevicePath.MemMapDevPath.StartingAddress = Address;
mEmuVarsFvb.DevicePath.MemMapDevPath.EndingAddress = Address + EMU_FVB_SIZE - 1;
mEmuVarsFvb.DevicePath.MemMapDevPath.EndingAddress = Address + EMU_FVB_SIZE - 1;
//
// Install the protocols
@ -833,5 +843,3 @@ FvbInitialize (
return EFI_SUCCESS;
}

39
OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.h
View File

@ -19,36 +19,33 @@ Abstract:
//
// Fvb Protocol instance data
//
#define FVB_DEVICE_FROM_THIS(a) CR (a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)
#define FVB_DEVICE_SIGNATURE SIGNATURE_32 ('F', 'V', 'B', 'N')
#define FVB_DEVICE_FROM_THIS(a) CR (a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)
#define FVB_DEVICE_SIGNATURE SIGNATURE_32 ('F', 'V', 'B', 'N')
#pragma pack (1)
typedef struct {
EFI_FIRMWARE_VOLUME_HEADER FvHdr;
EFI_FV_BLOCK_MAP_ENTRY EndBlockMap;
VARIABLE_STORE_HEADER VarHdr;
EFI_FIRMWARE_VOLUME_HEADER FvHdr;
EFI_FV_BLOCK_MAP_ENTRY EndBlockMap;
VARIABLE_STORE_HEADER VarHdr;
} FVB_FV_HDR_AND_VARS_TEMPLATE;
typedef struct {
MEMMAP_DEVICE_PATH MemMapDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
MEMMAP_DEVICE_PATH MemMapDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_DEVICE_PATH;
#pragma pack ()
typedef struct {
UINTN Signature;
FV_DEVICE_PATH DevicePath;
VOID *BufferPtr;
UINTN BlockSize;
UINTN Size;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FwVolBlockInstance;
UINTN Signature;
FV_DEVICE_PATH DevicePath;
VOID *BufferPtr;
UINTN BlockSize;
UINTN Size;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FwVolBlockInstance;
} EFI_FW_VOL_BLOCK_DEVICE;
//
// Constants
//
@ -63,12 +60,12 @@ typedef struct {
#define FTW_WRITE_QUEUE_SIZE \
(FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) - \
sizeof (EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER))
#define EMU_FV_HEADER_LENGTH OFFSET_OF (FVB_FV_HDR_AND_VARS_TEMPLATE, VarHdr)
#define EMU_FV_HEADER_LENGTH OFFSET_OF (FVB_FV_HDR_AND_VARS_TEMPLATE, VarHdr)
#define NOT_ERASED_BIT 0
#define ERASED_BIT 1
#define ERASED_UINT8 0xff
#define ERASED_UINT32 0xffffffff
#define NOT_ERASED_BIT 0
#define ERASED_BIT 1
#define ERASED_UINT8 0xff
#define ERASED_UINT32 0xffffffff
//
// Protocol APIs

20
OvmfPkg/EnrollDefaultKeys/AuthData.c
View File

@ -8,14 +8,13 @@
#include "EnrollDefaultKeys.h"
//
// Second KEK: "Microsoft Corporation KEK CA 2011".
// SHA1: 31:59:0b:fd:89:c9:d7:4e:d0:87:df:ac:66:33:4b:39:31:25:4b:30
//
// "dbx" updates in "dbxtool" are signed with a key derived from this KEK.
//
CONST UINT8 mMicrosoftKek[] = {
CONST UINT8 mMicrosoftKek[] = {
0x30, 0x82, 0x05, 0xe8, 0x30, 0x82, 0x03, 0xd0, 0xa0, 0x03, 0x02, 0x01, 0x02,
0x02, 0x0a, 0x61, 0x0a, 0xd1, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x30,
0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b, 0x05,
@ -135,8 +134,7 @@ CONST UINT8 mMicrosoftKek[] = {
0x57, 0x4e, 0x36, 0xd2, 0x32, 0x84, 0xbf, 0x9e
};
CONST UINTN mSizeOfMicrosoftKek = sizeof mMicrosoftKek;
CONST UINTN mSizeOfMicrosoftKek = sizeof mMicrosoftKek;
//
// First DB entry: "Microsoft Windows Production PCA 2011"
@ -145,7 +143,7 @@ CONST UINTN mSizeOfMicrosoftKek = sizeof mMicrosoftKek;
// Windows 8 and Windows Server 2012 R2 boot loaders are signed with a chain
// rooted in this certificate.
//
CONST UINT8 mMicrosoftPca[] = {
CONST UINT8 mMicrosoftPca[] = {
0x30, 0x82, 0x05, 0xd7, 0x30, 0x82, 0x03, 0xbf, 0xa0, 0x03, 0x02, 0x01, 0x02,
0x02, 0x0a, 0x61, 0x07, 0x76, 0x56, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x30,
0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b, 0x05,
@ -264,8 +262,7 @@ CONST UINT8 mMicrosoftPca[] = {
0x62, 0x1c, 0x59, 0x7e
};
CONST UINTN mSizeOfMicrosoftPca = sizeof mMicrosoftPca;
CONST UINTN mSizeOfMicrosoftPca = sizeof mMicrosoftPca;
//
// Second DB entry: "Microsoft Corporation UEFI CA 2011"
@ -273,7 +270,7 @@ CONST UINTN mSizeOfMicrosoftPca = sizeof mMicrosoftPca;
//
// To verify the "shim" binary and PCI expansion ROMs with.
//
CONST UINT8 mMicrosoftUefiCa[] = {
CONST UINT8 mMicrosoftUefiCa[] = {
0x30, 0x82, 0x06, 0x10, 0x30, 0x82, 0x03, 0xf8, 0xa0, 0x03, 0x02, 0x01, 0x02,
0x02, 0x0a, 0x61, 0x08, 0xd3, 0xc4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x30,
0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b, 0x05,
@ -396,8 +393,7 @@ CONST UINT8 mMicrosoftUefiCa[] = {
0x07, 0x92, 0x9b, 0xf5, 0xa6, 0xbc, 0x59, 0x83, 0x58
};
CONST UINTN mSizeOfMicrosoftUefiCa = sizeof mMicrosoftUefiCa;
CONST UINTN mSizeOfMicrosoftUefiCa = sizeof mMicrosoftUefiCa;
//
// The Microsoft.UefiSecureBootLogo.Tests.OutOfBoxConfirmDBXisPresent test case
@ -431,10 +427,10 @@ CONST UINTN mSizeOfMicrosoftUefiCa = sizeof mMicrosoftUefiCa;
// practice recommended -- in natural English langauge -- in the
// above-referenced TechNet article.
//
CONST UINT8 mSha256OfDevNull[] = {
CONST UINT8 mSha256OfDevNull[] = {
0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14, 0x9a, 0xfb, 0xf4, 0xc8, 0x99,
0x6f, 0xb9, 0x24, 0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c, 0xa4, 0x95,
0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
};
CONST UINTN mSizeOfSha256OfDevNull = sizeof mSha256OfDevNull;
CONST UINTN mSizeOfSha256OfDevNull = sizeof mSha256OfDevNull;

412
OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.c
View File

@ -24,7 +24,6 @@
#include "EnrollDefaultKeys.h"
/**
Fetch the X509 certificate (to be used as Platform Key and first Key Exchange
Key) from SMBIOS.
@ -54,47 +53,55 @@
STATIC
EFI_STATUS
GetPkKek1 (
OUT UINT8 **PkKek1,
OUT UINTN *SizeOfPkKek1
OUT UINT8 **PkKek1,
OUT UINTN *SizeOfPkKek1
)
{
CONST CHAR8 *Base64Cert;
CHAR8 OvmfPkKek1AppPrefix[GUID_STRING_LENGTH + 1 + 1];
EFI_STATUS Status;
EFI_SMBIOS_PROTOCOL *Smbios;
EFI_SMBIOS_HANDLE Handle;
EFI_SMBIOS_TYPE Type;
EFI_SMBIOS_TABLE_HEADER *Header;
SMBIOS_TABLE_TYPE11 *OemStringsTable;
UINTN Base64CertLen;
UINTN DecodedCertSize;
UINT8 *DecodedCert;
CONST CHAR8 *Base64Cert;
CHAR8 OvmfPkKek1AppPrefix[GUID_STRING_LENGTH + 1 + 1];
EFI_STATUS Status;
EFI_SMBIOS_PROTOCOL *Smbios;
EFI_SMBIOS_HANDLE Handle;
EFI_SMBIOS_TYPE Type;
EFI_SMBIOS_TABLE_HEADER *Header;
SMBIOS_TABLE_TYPE11 *OemStringsTable;
UINTN Base64CertLen;
UINTN DecodedCertSize;
UINT8 *DecodedCert;
Base64Cert = NULL;
//
// Format the application prefix, for OEM String matching.
//
AsciiSPrint (OvmfPkKek1AppPrefix, sizeof OvmfPkKek1AppPrefix, "%g:",
&gOvmfPkKek1AppPrefixGuid);
AsciiSPrint (
OvmfPkKek1AppPrefix,
sizeof OvmfPkKek1AppPrefix,
"%g:",
&gOvmfPkKek1AppPrefixGuid
);
//
// Scan all "OEM Strings" tables.
//
Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL,
(VOID **)&Smbios);
Status = gBS->LocateProtocol (
&gEfiSmbiosProtocolGuid,
NULL,
(VOID **)&Smbios
);
if (EFI_ERROR (Status)) {
AsciiPrint ("error: failed to locate EFI_SMBIOS_PROTOCOL: %r\n", Status);
return Status;
}
Handle = SMBIOS_HANDLE_PI_RESERVED;
Type = SMBIOS_TYPE_OEM_STRINGS;
Type = SMBIOS_TYPE_OEM_STRINGS;
for (Status = Smbios->GetNext (Smbios, &Handle, &Type, &Header, NULL);
!EFI_ERROR (Status);
Status = Smbios->GetNext (Smbios, &Handle, &Type, &Header, NULL)) {
CONST CHAR8 *OemString;
UINTN Idx;
Status = Smbios->GetNext (Smbios, &Handle, &Type, &Header, NULL))
{
CONST CHAR8 *OemString;
UINTN Idx;
if (Header->Length < sizeof *OemStringsTable) {
//
@ -102,6 +109,7 @@ GetPkKek1 (
//
continue;
}
OemStringsTable = (SMBIOS_TABLE_TYPE11 *)Header;
//
@ -110,13 +118,17 @@ GetPkKek1 (
//
OemString = (CONST CHAR8 *)(OemStringsTable + 1);
for (Idx = 0; Idx < OemStringsTable->StringCount; ++Idx) {
CHAR8 CandidatePrefix[sizeof OvmfPkKek1AppPrefix];
CHAR8 CandidatePrefix[sizeof OvmfPkKek1AppPrefix];
//
// NUL-terminate the candidate prefix for case-insensitive comparison.
//
AsciiStrnCpyS (CandidatePrefix, sizeof CandidatePrefix, OemString,
GUID_STRING_LENGTH + 1);
AsciiStrnCpyS (
CandidatePrefix,
sizeof CandidatePrefix,
OemString,
GUID_STRING_LENGTH + 1
);
if (AsciiStriCmp (OvmfPkKek1AppPrefix, CandidatePrefix) == 0) {
//
// The current string matches the prefix.
@ -124,6 +136,7 @@ GetPkKek1 (
Base64Cert = OemString + GUID_STRING_LENGTH + 1;
break;
}
OemString += AsciiStrSize (OemString);
}
@ -139,8 +152,11 @@ GetPkKek1 (
//
// No table with a matching string has been found.
//
AsciiPrint ("error: OEM String with app prefix %g not found: %r\n",
&gOvmfPkKek1AppPrefixGuid, Status);
AsciiPrint (
"error: OEM String with app prefix %g not found: %r\n",
&gOvmfPkKek1AppPrefixGuid,
Status
);
return EFI_NOT_FOUND;
}
@ -151,19 +167,23 @@ GetPkKek1 (
// Verify the base64 encoding, and determine the decoded size.
//
DecodedCertSize = 0;
Status = Base64Decode (Base64Cert, Base64CertLen, NULL, &DecodedCertSize);
Status = Base64Decode (Base64Cert, Base64CertLen, NULL, &DecodedCertSize);
switch (Status) {
case EFI_BUFFER_TOO_SMALL:
ASSERT (DecodedCertSize > 0);
break;
case EFI_SUCCESS:
AsciiPrint ("error: empty certificate after app prefix %g\n",
&gOvmfPkKek1AppPrefixGuid);
return EFI_PROTOCOL_ERROR;
default:
AsciiPrint ("error: invalid base64 string after app prefix %g\n",
&gOvmfPkKek1AppPrefixGuid);
return EFI_PROTOCOL_ERROR;
case EFI_BUFFER_TOO_SMALL:
ASSERT (DecodedCertSize > 0);
break;
case EFI_SUCCESS:
AsciiPrint (
"error: empty certificate after app prefix %g\n",
&gOvmfPkKek1AppPrefixGuid
);
return EFI_PROTOCOL_ERROR;
default:
AsciiPrint (
"error: invalid base64 string after app prefix %g\n",
&gOvmfPkKek1AppPrefixGuid
);
return EFI_PROTOCOL_ERROR;
}
//
@ -178,16 +198,19 @@ GetPkKek1 (
//
// Decoding will succeed at this point.
//
Status = Base64Decode (Base64Cert, Base64CertLen, DecodedCert,
&DecodedCertSize);
Status = Base64Decode (
Base64Cert,
Base64CertLen,
DecodedCert,
&DecodedCertSize
);
ASSERT_EFI_ERROR (Status);
*PkKek1 = DecodedCert;
*PkKek1 = DecodedCert;
*SizeOfPkKek1 = DecodedCertSize;
return EFI_SUCCESS;
}
/**
Enroll a set of certificates in a global variable, overwriting it.
@ -235,20 +258,20 @@ STATIC
EFI_STATUS
EFIAPI
EnrollListOfCerts (
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
IN EFI_GUID *CertType,
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
IN EFI_GUID *CertType,
...
)
{
UINTN DataSize;
SINGLE_HEADER *SingleHeader;
REPEATING_HEADER *RepeatingHeader;
VA_LIST Marker;
CONST UINT8 *Cert;
EFI_STATUS Status;
UINT8 *Data;
UINT8 *Position;
UINTN DataSize;
SINGLE_HEADER *SingleHeader;
REPEATING_HEADER *RepeatingHeader;
VA_LIST Marker;
CONST UINT8 *Cert;
EFI_STATUS Status;
UINT8 *Data;
UINT8 *Position;
Status = EFI_SUCCESS;
@ -259,25 +282,30 @@ EnrollListOfCerts (
VA_START (Marker, CertType);
for (Cert = VA_ARG (Marker, CONST UINT8 *);
Cert != NULL;
Cert = VA_ARG (Marker, CONST UINT8 *)) {
UINTN CertSize;
Cert = VA_ARG (Marker, CONST UINT8 *))
{
UINTN CertSize;
CertSize = VA_ARG (Marker, UINTN);
(VOID)VA_ARG (Marker, CONST EFI_GUID *);
if (CertSize == 0 ||
CertSize > MAX_UINT32 - sizeof *RepeatingHeader ||
DataSize > MAX_UINT32 - sizeof *RepeatingHeader - CertSize) {
if ((CertSize == 0) ||
(CertSize > MAX_UINT32 - sizeof *RepeatingHeader) ||
(DataSize > MAX_UINT32 - sizeof *RepeatingHeader - CertSize))
{
Status = EFI_INVALID_PARAMETER;
break;
}
DataSize += sizeof *RepeatingHeader + CertSize;
}
VA_END (Marker);
if (DataSize == sizeof *SingleHeader) {
Status = EFI_INVALID_PARAMETER;
}
if (EFI_ERROR (Status)) {
goto Out;
}
@ -291,27 +319,28 @@ EnrollListOfCerts (
Position = Data;
SingleHeader = (SINGLE_HEADER *)Position;
Status = gRT->GetTime (&SingleHeader->TimeStamp, NULL);
Status = gRT->GetTime (&SingleHeader->TimeStamp, NULL);
if (EFI_ERROR (Status)) {
goto FreeData;
}
SingleHeader->TimeStamp.Pad1 = 0;
SingleHeader->TimeStamp.Nanosecond = 0;
SingleHeader->TimeStamp.TimeZone = 0;
SingleHeader->TimeStamp.Daylight = 0;
SingleHeader->TimeStamp.Pad2 = 0;
#if 0
SingleHeader->dwLength = DataSize - sizeof SingleHeader->TimeStamp;
#else
#if 0
SingleHeader->dwLength = DataSize - sizeof SingleHeader->TimeStamp;
#else
//
// This looks like a bug in edk2. According to the UEFI specification,
// dwLength is "The length of the entire certificate, including the length of
// the header, in bytes". That shouldn't stop right after CertType -- it
// should include everything below it.
//
SingleHeader->dwLength = sizeof *SingleHeader
- sizeof SingleHeader->TimeStamp;
#endif
SingleHeader->dwLength = sizeof *SingleHeader
- sizeof SingleHeader->TimeStamp;
#endif
SingleHeader->wRevision = 0x0200;
SingleHeader->wCertificateType = WIN_CERT_TYPE_EFI_GUID;
CopyGuid (&SingleHeader->CertType, &gEfiCertPkcs7Guid);
@ -320,16 +349,17 @@ EnrollListOfCerts (
VA_START (Marker, CertType);
for (Cert = VA_ARG (Marker, CONST UINT8 *);
Cert != NULL;
Cert = VA_ARG (Marker, CONST UINT8 *)) {
UINTN CertSize;
CONST EFI_GUID *OwnerGuid;
Cert = VA_ARG (Marker, CONST UINT8 *))
{
UINTN CertSize;
CONST EFI_GUID *OwnerGuid;
CertSize = VA_ARG (Marker, UINTN);
OwnerGuid = VA_ARG (Marker, CONST EFI_GUID *);
RepeatingHeader = (REPEATING_HEADER *)Position;
CopyGuid (&RepeatingHeader->SignatureType, CertType);
RepeatingHeader->SignatureListSize =
RepeatingHeader->SignatureListSize =
(UINT32)(sizeof *RepeatingHeader + CertSize);
RepeatingHeader->SignatureHeaderSize = 0;
RepeatingHeader->SignatureSize =
@ -340,29 +370,39 @@ EnrollListOfCerts (
CopyMem (Position, Cert, CertSize);
Position += CertSize;
}
VA_END (Marker);
ASSERT (Data + DataSize == Position);
Status = gRT->SetVariable (VariableName, VendorGuid,
Status = gRT->SetVariable (
VariableName,
VendorGuid,
(EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_RUNTIME_ACCESS |
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS),
DataSize, Data);
DataSize,
Data
);
FreeData:
FreePool (Data);
Out:
if (EFI_ERROR (Status)) {
AsciiPrint ("error: %a(\"%s\", %g): %r\n", __FUNCTION__, VariableName,
VendorGuid, Status);
AsciiPrint (
"error: %a(\"%s\", %g): %r\n",
__FUNCTION__,
VariableName,
VendorGuid,
Status
);
}
return Status;
}
/**
Read a UEFI variable into a caller-allocated buffer, enforcing an exact size.
@ -404,39 +444,48 @@ Out:
STATIC
EFI_STATUS
GetExact (
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
OUT VOID *Data,
IN UINTN DataSize,
IN BOOLEAN AllowMissing
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
OUT VOID *Data,
IN UINTN DataSize,
IN BOOLEAN AllowMissing
)
{
UINTN Size;
EFI_STATUS Status;
UINTN Size;
EFI_STATUS Status;
Size = DataSize;
Size = DataSize;
Status = gRT->GetVariable (VariableName, VendorGuid, NULL, &Size, Data);
if (EFI_ERROR (Status)) {
if (Status == EFI_NOT_FOUND && AllowMissing) {
if ((Status == EFI_NOT_FOUND) && AllowMissing) {
ZeroMem (Data, DataSize);
return EFI_SUCCESS;
}
AsciiPrint ("error: GetVariable(\"%s\", %g): %r\n", VariableName,
VendorGuid, Status);
AsciiPrint (
"error: GetVariable(\"%s\", %g): %r\n",
VariableName,
VendorGuid,
Status
);
return Status;
}
if (Size != DataSize) {
AsciiPrint ("error: GetVariable(\"%s\", %g): expected size 0x%Lx, "
"got 0x%Lx\n", VariableName, VendorGuid, (UINT64)DataSize, (UINT64)Size);
AsciiPrint (
"error: GetVariable(\"%s\", %g): expected size 0x%Lx, "
"got 0x%Lx\n",
VariableName,
VendorGuid,
(UINT64)DataSize,
(UINT64)Size
);
return EFI_PROTOCOL_ERROR;
}
return EFI_SUCCESS;
}
/**
Populate a SETTINGS structure from the underlying UEFI variables.
@ -464,42 +513,65 @@ GetExact (
STATIC
EFI_STATUS
GetSettings (
OUT SETTINGS *Settings
OUT SETTINGS *Settings
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = GetExact (EFI_SETUP_MODE_NAME, &gEfiGlobalVariableGuid,
&Settings->SetupMode, sizeof Settings->SetupMode, FALSE);
Status = GetExact (
EFI_SETUP_MODE_NAME,
&gEfiGlobalVariableGuid,
&Settings->SetupMode,
sizeof Settings->SetupMode,
FALSE
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = GetExact (EFI_SECURE_BOOT_MODE_NAME, &gEfiGlobalVariableGuid,
&Settings->SecureBoot, sizeof Settings->SecureBoot, FALSE);
Status = GetExact (
EFI_SECURE_BOOT_MODE_NAME,
&gEfiGlobalVariableGuid,
&Settings->SecureBoot,
sizeof Settings->SecureBoot,
FALSE
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = GetExact (EFI_SECURE_BOOT_ENABLE_NAME,
&gEfiSecureBootEnableDisableGuid, &Settings->SecureBootEnable,
sizeof Settings->SecureBootEnable, TRUE);
Status = GetExact (
EFI_SECURE_BOOT_ENABLE_NAME,
&gEfiSecureBootEnableDisableGuid,
&Settings->SecureBootEnable,
sizeof Settings->SecureBootEnable,
TRUE
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = GetExact (EFI_CUSTOM_MODE_NAME, &gEfiCustomModeEnableGuid,
&Settings->CustomMode, sizeof Settings->CustomMode, FALSE);
Status = GetExact (
EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid,
&Settings->CustomMode,
sizeof Settings->CustomMode,
FALSE
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = GetExact (EFI_VENDOR_KEYS_VARIABLE_NAME, &gEfiGlobalVariableGuid,
&Settings->VendorKeys, sizeof Settings->VendorKeys, FALSE);
Status = GetExact (
EFI_VENDOR_KEYS_VARIABLE_NAME,
&gEfiGlobalVariableGuid,
&Settings->VendorKeys,
sizeof Settings->VendorKeys,
FALSE
);
return Status;
}
/**
Print the contents of a SETTINGS structure to the UEFI console.
@ -508,33 +580,38 @@ GetSettings (
STATIC
VOID
PrintSettings (
IN CONST SETTINGS *Settings
IN CONST SETTINGS *Settings
)
{
AsciiPrint ("info: SetupMode=%d SecureBoot=%d SecureBootEnable=%d "
"CustomMode=%d VendorKeys=%d\n", Settings->SetupMode, Settings->SecureBoot,
Settings->SecureBootEnable, Settings->CustomMode, Settings->VendorKeys);
AsciiPrint (
"info: SetupMode=%d SecureBoot=%d SecureBootEnable=%d "
"CustomMode=%d VendorKeys=%d\n",
Settings->SetupMode,
Settings->SecureBoot,
Settings->SecureBootEnable,
Settings->CustomMode,
Settings->VendorKeys
);
}
/**
Entry point function of this shell application.
**/
INTN
EFIAPI
ShellAppMain (
IN UINTN Argc,
IN CHAR16 **Argv
IN UINTN Argc,
IN CHAR16 **Argv
)
{
INTN RetVal;
EFI_STATUS Status;
SETTINGS Settings;
UINT8 *PkKek1;
UINTN SizeOfPkKek1;
BOOLEAN NoDefault;
INTN RetVal;
EFI_STATUS Status;
SETTINGS Settings;
UINT8 *PkKek1;
UINTN SizeOfPkKek1;
BOOLEAN NoDefault;
if (Argc == 2 && StrCmp (Argv[1], L"--no-default") == 0) {
if ((Argc == 2) && (StrCmp (Argv[1], L"--no-default") == 0)) {
NoDefault = TRUE;
} else {
NoDefault = FALSE;
@ -552,6 +629,7 @@ ShellAppMain (
if (EFI_ERROR (Status)) {
return RetVal;
}
PrintSettings (&Settings);
if (Settings.SetupMode != 1) {
@ -563,7 +641,7 @@ ShellAppMain (
// Set PkKek1 and SizeOfPkKek1 to suppress incorrect compiler/analyzer
// warnings.
//
PkKek1 = NULL;
PkKek1 = NULL;
SizeOfPkKek1 = 0;
//
@ -581,13 +659,21 @@ ShellAppMain (
//
if (Settings.CustomMode != CUSTOM_SECURE_BOOT_MODE) {
Settings.CustomMode = CUSTOM_SECURE_BOOT_MODE;
Status = gRT->SetVariable (EFI_CUSTOM_MODE_NAME, &gEfiCustomModeEnableGuid,
(EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS),
sizeof Settings.CustomMode, &Settings.CustomMode);
Status = gRT->SetVariable (
EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid,
(EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS),
sizeof Settings.CustomMode,
&Settings.CustomMode
);
if (EFI_ERROR (Status)) {
AsciiPrint ("error: SetVariable(\"%s\", %g): %r\n", EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid, Status);
AsciiPrint (
"error: SetVariable(\"%s\", %g): %r\n",
EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid,
Status
);
goto FreePkKek1;
}
}
@ -600,17 +686,26 @@ ShellAppMain (
EFI_IMAGE_SECURITY_DATABASE,
&gEfiImageSecurityDatabaseGuid,
&gEfiCertX509Guid,
PkKek1, SizeOfPkKek1, &gEfiCallerIdGuid,
NULL);
PkKek1,
SizeOfPkKek1,
&gEfiCallerIdGuid,
NULL
);
} else {
Status = EnrollListOfCerts (
EFI_IMAGE_SECURITY_DATABASE,
&gEfiImageSecurityDatabaseGuid,
&gEfiCertX509Guid,
mMicrosoftPca, mSizeOfMicrosoftPca, &gMicrosoftVendorGuid,
mMicrosoftUefiCa, mSizeOfMicrosoftUefiCa, &gMicrosoftVendorGuid,
NULL);
mMicrosoftPca,
mSizeOfMicrosoftPca,
&gMicrosoftVendorGuid,
mMicrosoftUefiCa,
mSizeOfMicrosoftUefiCa,
&gMicrosoftVendorGuid,
NULL
);
}
if (EFI_ERROR (Status)) {
goto FreePkKek1;
}
@ -622,8 +717,11 @@ ShellAppMain (
EFI_IMAGE_SECURITY_DATABASE1,
&gEfiImageSecurityDatabaseGuid,
&gEfiCertSha256Guid,
mSha256OfDevNull, mSizeOfSha256OfDevNull, &gEfiCallerIdGuid,
NULL);
mSha256OfDevNull,
mSizeOfSha256OfDevNull,
&gEfiCallerIdGuid,
NULL
);
if (EFI_ERROR (Status)) {
goto FreePkKek1;
}
@ -636,17 +734,26 @@ ShellAppMain (
EFI_KEY_EXCHANGE_KEY_NAME,
&gEfiGlobalVariableGuid,
&gEfiCertX509Guid,
PkKek1, SizeOfPkKek1, &gEfiCallerIdGuid,
NULL);
PkKek1,
SizeOfPkKek1,
&gEfiCallerIdGuid,
NULL
);
} else {
Status = EnrollListOfCerts (
EFI_KEY_EXCHANGE_KEY_NAME,
&gEfiGlobalVariableGuid,
&gEfiCertX509Guid,
PkKek1, SizeOfPkKek1, &gEfiCallerIdGuid,
mMicrosoftKek, mSizeOfMicrosoftKek, &gMicrosoftVendorGuid,
NULL);
PkKek1,
SizeOfPkKek1,
&gEfiCallerIdGuid,
mMicrosoftKek,
mSizeOfMicrosoftKek,
&gMicrosoftVendorGuid,
NULL
);
}
if (EFI_ERROR (Status)) {
goto FreePkKek1;
}
@ -658,8 +765,11 @@ ShellAppMain (
EFI_PLATFORM_KEY_NAME,
&gEfiGlobalVariableGuid,
&gEfiCertX509Guid,
PkKek1, SizeOfPkKek1, &gEfiGlobalVariableGuid,
NULL);
PkKek1,
SizeOfPkKek1,
&gEfiGlobalVariableGuid,
NULL
);
if (EFI_ERROR (Status)) {
goto FreePkKek1;
}
@ -669,12 +779,20 @@ ShellAppMain (
// signatures.
//
Settings.CustomMode = STANDARD_SECURE_BOOT_MODE;
Status = gRT->SetVariable (EFI_CUSTOM_MODE_NAME, &gEfiCustomModeEnableGuid,
EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
sizeof Settings.CustomMode, &Settings.CustomMode);
Status = gRT->SetVariable (
EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid,
EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
sizeof Settings.CustomMode,
&Settings.CustomMode
);
if (EFI_ERROR (Status)) {
AsciiPrint ("error: SetVariable(\"%s\", %g): %r\n", EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid, Status);
AsciiPrint (
"error: SetVariable(\"%s\", %g): %r\n",
EFI_CUSTOM_MODE_NAME,
&gEfiCustomModeEnableGuid,
Status
);
goto FreePkKek1;
}
@ -713,11 +831,13 @@ ShellAppMain (
if (EFI_ERROR (Status)) {
goto FreePkKek1;
}
PrintSettings (&Settings);
if (Settings.SetupMode != 0 || Settings.SecureBoot != 1 ||
Settings.SecureBootEnable != 1 || Settings.CustomMode != 0 ||
Settings.VendorKeys != 0) {
if ((Settings.SetupMode != 0) || (Settings.SecureBoot != 1) ||
(Settings.SecureBootEnable != 1) || (Settings.CustomMode != 0) ||
(Settings.VendorKeys != 0))
{
AsciiPrint ("error: unexpected\n");
goto FreePkKek1;
}

48
OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.h
View File

@ -75,30 +75,30 @@
//
#pragma pack (1)
typedef struct {
EFI_TIME TimeStamp;
EFI_TIME TimeStamp;
//
// dwLength covers data below
//
UINT32 dwLength;
UINT16 wRevision;
UINT16 wCertificateType;
EFI_GUID CertType;
UINT32 dwLength;
UINT16 wRevision;
UINT16 wCertificateType;
EFI_GUID CertType;
} SINGLE_HEADER;
typedef struct {
//
// SignatureListSize covers data below
//
EFI_GUID SignatureType;
UINT32 SignatureListSize;
UINT32 SignatureHeaderSize; // constant 0
UINT32 SignatureSize;
EFI_GUID SignatureType;
UINT32 SignatureListSize;
UINT32 SignatureHeaderSize; // constant 0
UINT32 SignatureSize;
//
// SignatureSize covers data below
//
EFI_GUID SignatureOwner;
EFI_GUID SignatureOwner;
//
// X.509 certificate follows
@ -106,33 +106,31 @@ typedef struct {
} REPEATING_HEADER;
#pragma pack ()
//
// A structure that collects the values of UEFI variables related to Secure
// Boot.
//
typedef struct {
UINT8 SetupMode;
UINT8 SecureBoot;
UINT8 SecureBootEnable;
UINT8 CustomMode;
UINT8 VendorKeys;
UINT8 SetupMode;
UINT8 SecureBoot;
UINT8 SecureBootEnable;
UINT8 CustomMode;
UINT8 VendorKeys;
} SETTINGS;
//
// Refer to "AuthData.c" for details on the following objects.
//
extern CONST UINT8 mMicrosoftKek[];
extern CONST UINTN mSizeOfMicrosoftKek;
extern CONST UINT8 mMicrosoftKek[];
extern CONST UINTN mSizeOfMicrosoftKek;
extern CONST UINT8 mMicrosoftPca[];
extern CONST UINTN mSizeOfMicrosoftPca;
extern CONST UINT8 mMicrosoftPca[];
extern CONST UINTN mSizeOfMicrosoftPca;
extern CONST UINT8 mMicrosoftUefiCa[];
extern CONST UINTN mSizeOfMicrosoftUefiCa;
extern CONST UINT8 mMicrosoftUefiCa[];
extern CONST UINTN mSizeOfMicrosoftUefiCa;
extern CONST UINT8 mSha256OfDevNull[];
extern CONST UINTN mSizeOfSha256OfDevNull;
extern CONST UINT8 mSha256OfDevNull[];
extern CONST UINTN mSizeOfSha256OfDevNull;
#endif /* ENROLL_DEFAULT_KEYS_H_ */

400
OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
View File

@ -27,103 +27,124 @@
//
#pragma pack (1)
typedef struct {
UINT32 Type;
UINT64 ChildBase;
UINT64 CpuBase;
UINT64 Size;
UINT32 Type;
UINT64 ChildBase;
UINT64 CpuBase;
UINT64 Size;
} DTB_PCI_HOST_RANGE_RECORD;
#pragma pack ()
#define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
#define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
#define DTB_PCI_HOST_RANGE_ALIASED BIT29
#define DTB_PCI_HOST_RANGE_MMIO32 BIT25
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
#define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
#define DTB_PCI_HOST_RANGE_ALIASED BIT29
#define DTB_PCI_HOST_RANGE_MMIO32 BIT25
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
STATIC
EFI_STATUS
MapGcdMmioSpace (
IN UINT64 Base,
IN UINT64 Size
IN UINT64 Base,
IN UINT64 Size
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, Base, Size,
EFI_MEMORY_UC);
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
Base,
Size,
EFI_MEMORY_UC
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"%a: failed to add GCD memory space for region [0x%Lx+0x%Lx)\n",
__FUNCTION__, Base, Size));
__FUNCTION__,
Base,
Size
));
return Status;
}
Status = gDS->SetMemorySpaceAttributes (Base, Size, EFI_MEMORY_UC);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"%a: failed to set memory space attributes for region [0x%Lx+0x%Lx)\n",
__FUNCTION__, Base, Size));
__FUNCTION__,
Base,
Size
));
}
return Status;
}
STATIC
EFI_STATUS
ProcessPciHost (
OUT UINT64 *IoBase,
OUT UINT64 *IoSize,
OUT UINT64 *Mmio32Base,
OUT UINT64 *Mmio32Size,
OUT UINT64 *Mmio64Base,
OUT UINT64 *Mmio64Size,
OUT UINT32 *BusMin,
OUT UINT32 *BusMax
OUT UINT64 *IoBase,
OUT UINT64 *IoSize,
OUT UINT64 *Mmio32Base,
OUT UINT64 *Mmio32Size,
OUT UINT64 *Mmio64Base,
OUT UINT64 *Mmio64Size,
OUT UINT32 *BusMin,
OUT UINT32 *BusMax
)
{
FDT_CLIENT_PROTOCOL *FdtClient;
INT32 Node;
UINT64 ConfigBase, ConfigSize;
CONST VOID *Prop;
UINT32 Len;
UINT32 RecordIdx;
EFI_STATUS Status;
UINT64 IoTranslation;
UINT64 Mmio32Translation;
UINT64 Mmio64Translation;
FDT_CLIENT_PROTOCOL *FdtClient;
INT32 Node;
UINT64 ConfigBase, ConfigSize;
CONST VOID *Prop;
UINT32 Len;
UINT32 RecordIdx;
EFI_STATUS Status;
UINT64 IoTranslation;
UINT64 Mmio32Translation;
UINT64 Mmio64Translation;
//
// The following output arguments are initialized only in
// order to suppress '-Werror=maybe-uninitialized' warnings
// *incorrectly* emitted by some gcc versions.
//
*IoBase = 0;
*IoBase = 0;
*Mmio32Base = 0;
*Mmio64Base = MAX_UINT64;
*BusMin = 0;
*BusMax = 0;
*BusMin = 0;
*BusMax = 0;
//
// *IoSize, *Mmio##Size and IoTranslation are initialized to zero because the
// logic below requires it. However, since they are also affected by the issue
// reported above, they are initialized early.
//
*IoSize = 0;
*Mmio32Size = 0;
*Mmio64Size = 0;
*IoSize = 0;
*Mmio32Size = 0;
*Mmio64Size = 0;
IoTranslation = 0;
Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
(VOID **)&FdtClient);
Status = gBS->LocateProtocol (
&gFdtClientProtocolGuid,
NULL,
(VOID **)&FdtClient
);
ASSERT_EFI_ERROR (Status);
Status = FdtClient->FindCompatibleNode (FdtClient, "pci-host-ecam-generic",
&Node);
Status = FdtClient->FindCompatibleNode (
FdtClient,
"pci-host-ecam-generic",
&Node
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: No 'pci-host-ecam-generic' compatible DT node found\n",
__FUNCTION__));
__FUNCTION__
));
return EFI_NOT_FOUND;
}
@ -134,15 +155,22 @@ ProcessPciHost (
// A DT can legally describe multiple PCI host bridges, but we are not
// equipped to deal with that. So assert that there is only one.
//
Status = FdtClient->FindNextCompatibleNode (FdtClient,
"pci-host-ecam-generic", Node, &Tmp);
Status = FdtClient->FindNextCompatibleNode (
FdtClient,
"pci-host-ecam-generic",
Node,
&Tmp
);
ASSERT (Status == EFI_NOT_FOUND);
);
);
Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg", &Prop, &Len);
if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT64)) {
DEBUG ((DEBUG_ERROR, "%a: 'reg' property not found or invalid\n",
__FUNCTION__));
if (EFI_ERROR (Status) || (Len != 2 * sizeof (UINT64))) {
DEBUG ((
DEBUG_ERROR,
"%a: 'reg' property not found or invalid\n",
__FUNCTION__
));
return EFI_PROTOCOL_ERROR;
}
@ -155,13 +183,22 @@ ProcessPciHost (
//
// Fetch the bus range (note: inclusive).
//
Status = FdtClient->GetNodeProperty (FdtClient, Node, "bus-range", &Prop,
&Len);
if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT32)) {
DEBUG ((DEBUG_ERROR, "%a: 'bus-range' not found or invalid\n",
__FUNCTION__));
Status = FdtClient->GetNodeProperty (
FdtClient,
Node,
"bus-range",
&Prop,
&Len
);
if (EFI_ERROR (Status) || (Len != 2 * sizeof (UINT32))) {
DEBUG ((
DEBUG_ERROR,
"%a: 'bus-range' not found or invalid\n",
__FUNCTION__
));
return EFI_PROTOCOL_ERROR;
}
*BusMin = SwapBytes32 (((CONST UINT32 *)Prop)[0]);
*BusMax = SwapBytes32 (((CONST UINT32 *)Prop)[1]);
@ -169,10 +206,14 @@ ProcessPciHost (
// Sanity check: the config space must accommodate all 4K register bytes of
// all 8 functions of all 32 devices of all buses.
//
if (*BusMax < *BusMin || *BusMax - *BusMin == MAX_UINT32 ||
DivU64x32 (ConfigSize, SIZE_4KB * 8 * 32) < *BusMax - *BusMin + 1) {
DEBUG ((DEBUG_ERROR, "%a: invalid 'bus-range' and/or 'reg'\n",
__FUNCTION__));
if ((*BusMax < *BusMin) || (*BusMax - *BusMin == MAX_UINT32) ||
(DivU64x32 (ConfigSize, SIZE_4KB * 8 * 32) < *BusMax - *BusMin + 1))
{
DEBUG ((
DEBUG_ERROR,
"%a: invalid 'bus-range' and/or 'reg'\n",
__FUNCTION__
));
return EFI_PROTOCOL_ERROR;
}
@ -180,66 +221,84 @@ ProcessPciHost (
// Iterate over "ranges".
//
Status = FdtClient->GetNodeProperty (FdtClient, Node, "ranges", &Prop, &Len);
if (EFI_ERROR (Status) || Len == 0 ||
Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0) {
if (EFI_ERROR (Status) || (Len == 0) ||
(Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0))
{
DEBUG ((DEBUG_ERROR, "%a: 'ranges' not found or invalid\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
for (RecordIdx = 0; RecordIdx < Len / sizeof (DTB_PCI_HOST_RANGE_RECORD);
++RecordIdx) {
CONST DTB_PCI_HOST_RANGE_RECORD *Record;
++RecordIdx)
{
CONST DTB_PCI_HOST_RANGE_RECORD *Record;
Record = (CONST DTB_PCI_HOST_RANGE_RECORD *)Prop + RecordIdx;
switch (SwapBytes32 (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK) {
case DTB_PCI_HOST_RANGE_IO:
*IoBase = SwapBytes64 (Record->ChildBase);
*IoSize = SwapBytes64 (Record->Size);
IoTranslation = SwapBytes64 (Record->CpuBase) - *IoBase;
case DTB_PCI_HOST_RANGE_IO:
*IoBase = SwapBytes64 (Record->ChildBase);
*IoSize = SwapBytes64 (Record->Size);
IoTranslation = SwapBytes64 (Record->CpuBase) - *IoBase;
ASSERT (PcdGet64 (PcdPciIoTranslation) == IoTranslation);
break;
ASSERT (PcdGet64 (PcdPciIoTranslation) == IoTranslation);
break;
case DTB_PCI_HOST_RANGE_MMIO32:
*Mmio32Base = SwapBytes64 (Record->ChildBase);
*Mmio32Size = SwapBytes64 (Record->Size);
Mmio32Translation = SwapBytes64 (Record->CpuBase) - *Mmio32Base;
case DTB_PCI_HOST_RANGE_MMIO32:
*Mmio32Base = SwapBytes64 (Record->ChildBase);
*Mmio32Size = SwapBytes64 (Record->Size);
Mmio32Translation = SwapBytes64 (Record->CpuBase) - *Mmio32Base;
if (*Mmio32Base > MAX_UINT32 || *Mmio32Size > MAX_UINT32 ||
*Mmio32Base + *Mmio32Size > SIZE_4GB) {
DEBUG ((DEBUG_ERROR, "%a: MMIO32 space invalid\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
if ((*Mmio32Base > MAX_UINT32) || (*Mmio32Size > MAX_UINT32) ||
(*Mmio32Base + *Mmio32Size > SIZE_4GB))
{
DEBUG ((DEBUG_ERROR, "%a: MMIO32 space invalid\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
ASSERT (PcdGet64 (PcdPciMmio32Translation) == Mmio32Translation);
ASSERT (PcdGet64 (PcdPciMmio32Translation) == Mmio32Translation);
if (Mmio32Translation != 0) {
DEBUG ((DEBUG_ERROR, "%a: unsupported nonzero MMIO32 translation "
"0x%Lx\n", __FUNCTION__, Mmio32Translation));
return EFI_UNSUPPORTED;
}
if (Mmio32Translation != 0) {
DEBUG ((
DEBUG_ERROR,
"%a: unsupported nonzero MMIO32 translation "
"0x%Lx\n",
__FUNCTION__,
Mmio32Translation
));
return EFI_UNSUPPORTED;
}
break;
break;
case DTB_PCI_HOST_RANGE_MMIO64:
*Mmio64Base = SwapBytes64 (Record->ChildBase);
*Mmio64Size = SwapBytes64 (Record->Size);
Mmio64Translation = SwapBytes64 (Record->CpuBase) - *Mmio64Base;
case DTB_PCI_HOST_RANGE_MMIO64:
*Mmio64Base = SwapBytes64 (Record->ChildBase);
*Mmio64Size = SwapBytes64 (Record->Size);
Mmio64Translation = SwapBytes64 (Record->CpuBase) - *Mmio64Base;
ASSERT (PcdGet64 (PcdPciMmio64Translation) == Mmio64Translation);
ASSERT (PcdGet64 (PcdPciMmio64Translation) == Mmio64Translation);
if (Mmio64Translation != 0) {
DEBUG ((DEBUG_ERROR, "%a: unsupported nonzero MMIO64 translation "
"0x%Lx\n", __FUNCTION__, Mmio64Translation));
return EFI_UNSUPPORTED;
}
if (Mmio64Translation != 0) {
DEBUG ((
DEBUG_ERROR,
"%a: unsupported nonzero MMIO64 translation "
"0x%Lx\n",
__FUNCTION__,
Mmio64Translation
));
return EFI_UNSUPPORTED;
}
break;
break;
}
}
if (*IoSize == 0 || *Mmio32Size == 0) {
DEBUG ((DEBUG_ERROR, "%a: %a space empty\n", __FUNCTION__,
(*IoSize == 0) ? "IO" : "MMIO32"));
if ((*IoSize == 0) || (*Mmio32Size == 0)) {
DEBUG ((
DEBUG_ERROR,
"%a: %a space empty\n",
__FUNCTION__,
(*IoSize == 0) ? "IO" : "MMIO32"
));
return EFI_PROTOCOL_ERROR;
}
@ -249,10 +308,23 @@ ProcessPciHost (
//
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) == ConfigBase);
DEBUG ((DEBUG_INFO, "%a: Config[0x%Lx+0x%Lx) Bus[0x%x..0x%x] "
DEBUG ((
DEBUG_INFO,
"%a: Config[0x%Lx+0x%Lx) Bus[0x%x..0x%x] "
"Io[0x%Lx+0x%Lx)@0x%Lx Mem32[0x%Lx+0x%Lx)@0x0 Mem64[0x%Lx+0x%Lx)@0x0\n",
__FUNCTION__, ConfigBase, ConfigSize, *BusMin, *BusMax, *IoBase, *IoSize,
IoTranslation, *Mmio32Base, *Mmio32Size, *Mmio64Base, *Mmio64Size));
__FUNCTION__,
ConfigBase,
ConfigSize,
*BusMin,
*BusMax,
*IoBase,
*IoSize,
IoTranslation,
*Mmio32Base,
*Mmio32Size,
*Mmio64Base,
*Mmio64Size
));
// Map the ECAM space in the GCD memory map
Status = MapGcdMmioSpace (ConfigBase, ConfigSize);
@ -284,21 +356,21 @@ ProcessPciHost (
PCI_ROOT_BRIDGE *
EFIAPI
PciHostBridgeGetRootBridges (
UINTN *Count
UINTN *Count
)
{
UINT64 IoBase, IoSize;
UINT64 Mmio32Base, Mmio32Size;
UINT64 Mmio64Base, Mmio64Size;
UINT32 BusMin, BusMax;
EFI_STATUS Status;
UINT64 Attributes;
UINT64 AllocationAttributes;
PCI_ROOT_BRIDGE_APERTURE Io;
PCI_ROOT_BRIDGE_APERTURE Mem;
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
UINT64 IoBase, IoSize;
UINT64 Mmio32Base, Mmio32Size;
UINT64 Mmio64Base, Mmio64Size;
UINT32 BusMin, BusMax;
EFI_STATUS Status;
UINT64 Attributes;
UINT64 AllocationAttributes;
PCI_ROOT_BRIDGE_APERTURE Io;
PCI_ROOT_BRIDGE_APERTURE Mem;
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
DEBUG ((DEBUG_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
@ -307,11 +379,23 @@ PciHostBridgeGetRootBridges (
return NULL;
}
Status = ProcessPciHost (&IoBase, &IoSize, &Mmio32Base, &Mmio32Size,
&Mmio64Base, &Mmio64Size, &BusMin, &BusMax);
Status = ProcessPciHost (
&IoBase,
&IoSize,
&Mmio32Base,
&Mmio32Size,
&Mmio64Base,
&Mmio64Size,
&BusMin,
&BusMax
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to discover PCI host bridge: %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to discover PCI host bridge: %r\n",
__FUNCTION__,
Status
));
*Count = 0;
return NULL;
}
@ -322,21 +406,21 @@ PciHostBridgeGetRootBridges (
ZeroMem (&PMem, sizeof (PMem));
ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G));
Attributes = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
EFI_PCI_ATTRIBUTE_VGA_IO_16 |
EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
Attributes = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
EFI_PCI_ATTRIBUTE_VGA_IO_16 |
EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
Io.Base = IoBase;
Io.Limit = IoBase + IoSize - 1;
Mem.Base = Mmio32Base;
Mem.Limit = Mmio32Base + Mmio32Size - 1;
Io.Base = IoBase;
Io.Limit = IoBase + IoSize - 1;
Mem.Base = Mmio32Base;
Mem.Limit = Mmio32Base + Mmio32Size - 1;
if (sizeof (UINTN) == sizeof (UINT64)) {
MemAbove4G.Base = Mmio64Base;
MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
MemAbove4G.Base = Mmio64Base;
MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
if (Mmio64Size > 0) {
AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
}
@ -347,32 +431,32 @@ PciHostBridgeGetRootBridges (
// BARs unless they are allocated below 4 GB. So ignore the range above
// 4 GB in this case.
//
MemAbove4G.Base = MAX_UINT64;
MemAbove4G.Limit = 0;
MemAbove4G.Base = MAX_UINT64;
MemAbove4G.Limit = 0;
}
//
// No separate ranges for prefetchable and non-prefetchable BARs
//
PMem.Base = MAX_UINT64;
PMem.Limit = 0;
PMemAbove4G.Base = MAX_UINT64;
PMemAbove4G.Limit = 0;
PMem.Base = MAX_UINT64;
PMem.Limit = 0;
PMemAbove4G.Base = MAX_UINT64;
PMemAbove4G.Limit = 0;
return PciHostBridgeUtilityGetRootBridges (
Count,
Attributes,
AllocationAttributes,
TRUE,
FALSE,
BusMin,
BusMax,
&Io,
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G
);
Count,
Attributes,
AllocationAttributes,
TRUE,
FALSE,
BusMin,
BusMax,
&Io,
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G
);
}
/**
@ -385,8 +469,8 @@ PciHostBridgeGetRootBridges (
VOID
EFIAPI
PciHostBridgeFreeRootBridges (
PCI_ROOT_BRIDGE *Bridges,
UINTN Count
PCI_ROOT_BRIDGE *Bridges,
UINTN Count
)
{
PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
@ -409,8 +493,8 @@ PciHostBridgeFreeRootBridges (
VOID
EFIAPI
PciHostBridgeResourceConflict (
EFI_HANDLE HostBridgeHandle,
VOID *Configuration
EFI_HANDLE HostBridgeHandle,
VOID *Configuration
)
{
PciHostBridgeUtilityResourceConflict (Configuration);

110
OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.c
View File

@ -22,59 +22,62 @@
//
#pragma pack (1)
typedef struct {
UINT32 Type;
UINT64 ChildBase;
UINT64 CpuBase;
UINT64 Size;
UINT32 Type;
UINT64 ChildBase;
UINT64 CpuBase;
UINT64 Size;
} DTB_PCI_HOST_RANGE_RECORD;
#pragma pack ()
#define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
#define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
#define DTB_PCI_HOST_RANGE_ALIASED BIT29
#define DTB_PCI_HOST_RANGE_MMIO32 BIT25
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
#define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
#define DTB_PCI_HOST_RANGE_ALIASED BIT29
#define DTB_PCI_HOST_RANGE_MMIO32 BIT25
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
STATIC
RETURN_STATUS
GetPciIoTranslation (
IN FDT_CLIENT_PROTOCOL *FdtClient,
IN INT32 Node,
OUT UINT64 *IoTranslation
IN FDT_CLIENT_PROTOCOL *FdtClient,
IN INT32 Node,
OUT UINT64 *IoTranslation
)
{
UINT32 RecordIdx;
CONST VOID *Prop;
UINT32 Len;
EFI_STATUS Status;
UINT64 IoBase;
UINT32 RecordIdx;
CONST VOID *Prop;
UINT32 Len;
EFI_STATUS Status;
UINT64 IoBase;
//
// Iterate over "ranges".
//
Status = FdtClient->GetNodeProperty (FdtClient, Node, "ranges", &Prop, &Len);
if (EFI_ERROR (Status) || Len == 0 ||
Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0) {
if (EFI_ERROR (Status) || (Len == 0) ||
(Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0))
{
DEBUG ((DEBUG_ERROR, "%a: 'ranges' not found or invalid\n", __FUNCTION__));
return RETURN_PROTOCOL_ERROR;
}
for (RecordIdx = 0; RecordIdx < Len / sizeof (DTB_PCI_HOST_RANGE_RECORD);
++RecordIdx) {
CONST DTB_PCI_HOST_RANGE_RECORD *Record;
UINT32 Type;
++RecordIdx)
{
CONST DTB_PCI_HOST_RANGE_RECORD *Record;
UINT32 Type;
Record = (CONST DTB_PCI_HOST_RANGE_RECORD *)Prop + RecordIdx;
Type = SwapBytes32 (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK;
Type = SwapBytes32 (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK;
if (Type == DTB_PCI_HOST_RANGE_IO) {
IoBase = SwapBytes64 (Record->ChildBase);
IoBase = SwapBytes64 (Record->ChildBase);
*IoTranslation = SwapBytes64 (Record->CpuBase) - IoBase;
return RETURN_SUCCESS;
}
}
return RETURN_NOT_FOUND;
}
@ -84,15 +87,15 @@ FdtPciPcdProducerLibConstructor (
VOID
)
{
UINT64 PciExpressBaseAddress;
FDT_CLIENT_PROTOCOL *FdtClient;
CONST UINT64 *Reg;
UINT32 RegSize;
EFI_STATUS Status;
INT32 Node;
RETURN_STATUS RetStatus;
UINT64 IoTranslation;
RETURN_STATUS PcdStatus;
UINT64 PciExpressBaseAddress;
FDT_CLIENT_PROTOCOL *FdtClient;
CONST UINT64 *Reg;
UINT32 RegSize;
EFI_STATUS Status;
INT32 Node;
RETURN_STATUS RetStatus;
UINT64 IoTranslation;
RETURN_STATUS PcdStatus;
PciExpressBaseAddress = PcdGet64 (PcdPciExpressBaseAddress);
if (PciExpressBaseAddress != MAX_UINT64) {
@ -106,38 +109,51 @@ FdtPciPcdProducerLibConstructor (
return EFI_SUCCESS;
}
Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
(VOID **)&FdtClient);
Status = gBS->LocateProtocol (
&gFdtClientProtocolGuid,
NULL,
(VOID **)&FdtClient
);
ASSERT_EFI_ERROR (Status);
PciExpressBaseAddress = 0;
Status = FdtClient->FindCompatibleNode (FdtClient, "pci-host-ecam-generic",
&Node);
Status = FdtClient->FindCompatibleNode (
FdtClient,
"pci-host-ecam-generic",
&Node
);
if (!EFI_ERROR (Status)) {
Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg",
(CONST VOID **)&Reg, &RegSize);
Status = FdtClient->GetNodeProperty (
FdtClient,
Node,
"reg",
(CONST VOID **)&Reg,
&RegSize
);
if (!EFI_ERROR (Status) && RegSize == 2 * sizeof (UINT64)) {
if (!EFI_ERROR (Status) && (RegSize == 2 * sizeof (UINT64))) {
PciExpressBaseAddress = SwapBytes64 (*Reg);
PcdStatus = PcdSetBoolS (PcdPciDisableBusEnumeration, FALSE);
ASSERT_RETURN_ERROR (PcdStatus);
IoTranslation = 0;
RetStatus = GetPciIoTranslation (FdtClient, Node, &IoTranslation);
RetStatus = GetPciIoTranslation (FdtClient, Node, &IoTranslation);
if (!RETURN_ERROR (RetStatus)) {
PcdStatus = PcdSet64S (PcdPciIoTranslation, IoTranslation);
ASSERT_RETURN_ERROR (PcdStatus);
PcdStatus = PcdSet64S (PcdPciIoTranslation, IoTranslation);
ASSERT_RETURN_ERROR (PcdStatus);
} else {
//
// Support for I/O BARs is not mandatory, and so it does not make sense
// to abort in the general case. So leave it up to the actual driver to
// complain about this if it wants to, and just issue a warning here.
//
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"%a: 'pci-host-ecam-generic' device encountered with no I/O range\n",
__FUNCTION__));
__FUNCTION__
));
}
}
}

131
OvmfPkg/Fdt/HighMemDxe/HighMemDxe.c
View File

@ -20,40 +20,58 @@
EFI_STATUS
EFIAPI
InitializeHighMemDxe (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
FDT_CLIENT_PROTOCOL *FdtClient;
EFI_CPU_ARCH_PROTOCOL *Cpu;
EFI_STATUS Status, FindNodeStatus;
INT32 Node;
CONST UINT32 *Reg;
UINT32 RegSize;
UINTN AddressCells, SizeCells;
UINT64 CurBase;
UINT64 CurSize;
UINT64 Attributes;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
FDT_CLIENT_PROTOCOL *FdtClient;
EFI_CPU_ARCH_PROTOCOL *Cpu;
EFI_STATUS Status, FindNodeStatus;
INT32 Node;
CONST UINT32 *Reg;
UINT32 RegSize;
UINTN AddressCells, SizeCells;
UINT64 CurBase;
UINT64 CurSize;
UINT64 Attributes;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
(VOID **)&FdtClient);
Status = gBS->LocateProtocol (
&gFdtClientProtocolGuid,
NULL,
(VOID **)&FdtClient
);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL,
(VOID **)&Cpu);
Status = gBS->LocateProtocol (
&gEfiCpuArchProtocolGuid,
NULL,
(VOID **)&Cpu
);
ASSERT_EFI_ERROR (Status);
//
// Check for memory node and add the memory spaces except the lowest one
//
for (FindNodeStatus = FdtClient->FindMemoryNodeReg (FdtClient, &Node,
(CONST VOID **) &Reg, &AddressCells,
&SizeCells, &RegSize);
for (FindNodeStatus = FdtClient->FindMemoryNodeReg (
FdtClient,
&Node,
(CONST VOID **)&Reg,
&AddressCells,
&SizeCells,
&RegSize
);
!EFI_ERROR (FindNodeStatus);
FindNodeStatus = FdtClient->FindNextMemoryNodeReg (FdtClient, Node,
&Node, (CONST VOID **) &Reg, &AddressCells,
&SizeCells, &RegSize)) {
FindNodeStatus = FdtClient->FindNextMemoryNodeReg (
FdtClient,
Node,
&Node,
(CONST VOID **)&Reg,
&AddressCells,
&SizeCells,
&RegSize
))
{
ASSERT (AddressCells <= 2);
ASSERT (SizeCells <= 2);
@ -62,36 +80,60 @@ InitializeHighMemDxe (
if (AddressCells > 1) {
CurBase = (CurBase << 32) | SwapBytes32 (*Reg++);
}
CurSize = SwapBytes32 (*Reg++);
if (SizeCells > 1) {
CurSize = (CurSize << 32) | SwapBytes32 (*Reg++);
}
RegSize -= (AddressCells + SizeCells) * sizeof (UINT32);
Status = gDS->GetMemorySpaceDescriptor (CurBase, &GcdDescriptor);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"%a: Region 0x%lx - 0x%lx not found in the GCD memory space map\n",
__FUNCTION__, CurBase, CurBase + CurSize - 1));
continue;
__FUNCTION__,
CurBase,
CurBase + CurSize - 1
));
continue;
}
if (GcdDescriptor.GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
Status = gDS->AddMemorySpace (EfiGcdMemoryTypeSystemMemory, CurBase,
CurSize, EFI_MEMORY_WB);
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeSystemMemory,
CurBase,
CurSize,
EFI_MEMORY_WB
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"%a: Failed to add System RAM @ 0x%lx - 0x%lx (%r)\n",
__FUNCTION__, CurBase, CurBase + CurSize - 1, Status));
__FUNCTION__,
CurBase,
CurBase + CurSize - 1,
Status
));
continue;
}
Status = gDS->SetMemorySpaceAttributes (CurBase, CurSize,
EFI_MEMORY_WB);
Status = gDS->SetMemorySpaceAttributes (
CurBase,
CurSize,
EFI_MEMORY_WB
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"%a: gDS->SetMemorySpaceAttributes() failed on region 0x%lx - 0x%lx (%r)\n",
__FUNCTION__, CurBase, CurBase + CurSize - 1, Status));
__FUNCTION__,
CurBase,
CurBase + CurSize - 1,
Status
));
}
//
@ -107,19 +149,30 @@ InitializeHighMemDxe (
//
Attributes = EFI_MEMORY_WB;
if ((PcdGet64 (PcdDxeNxMemoryProtectionPolicy) &
(1U << (UINT32)EfiConventionalMemory)) != 0) {
(1U << (UINT32)EfiConventionalMemory)) != 0)
{
Attributes |= EFI_MEMORY_XP;
}
Status = Cpu->SetMemoryAttributes (Cpu, CurBase, CurSize, Attributes);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"%a: Failed to set System RAM @ 0x%lx - 0x%lx attribute (%r)\n",
__FUNCTION__, CurBase, CurBase + CurSize - 1, Status));
__FUNCTION__,
CurBase,
CurBase + CurSize - 1,
Status
));
} else {
DEBUG ((DEBUG_INFO, "%a: Add System RAM @ 0x%lx - 0x%lx\n",
__FUNCTION__, CurBase, CurBase + CurSize - 1));
DEBUG ((
DEBUG_INFO,
"%a: Add System RAM @ 0x%lx - 0x%lx\n",
__FUNCTION__,
CurBase,
CurBase + CurSize - 1
));
}
}
}

129
OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.c
View File

@ -22,43 +22,62 @@
#pragma pack (1)
typedef struct {
VENDOR_DEVICE_PATH Vendor;
UINT64 PhysBase;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH Vendor;
UINT64 PhysBase;
EFI_DEVICE_PATH_PROTOCOL End;
} VIRTIO_TRANSPORT_DEVICE_PATH;
#pragma pack ()
EFI_STATUS
EFIAPI
InitializeVirtioFdtDxe (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status, FindNodeStatus;
FDT_CLIENT_PROTOCOL *FdtClient;
INT32 Node;
CONST UINT64 *Reg;
UINT32 RegSize;
VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
EFI_HANDLE Handle;
UINT64 RegBase;
EFI_STATUS Status, FindNodeStatus;
FDT_CLIENT_PROTOCOL *FdtClient;
INT32 Node;
CONST UINT64 *Reg;
UINT32 RegSize;
VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
EFI_HANDLE Handle;
UINT64 RegBase;
Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
(VOID **)&FdtClient);
Status = gBS->LocateProtocol (
&gFdtClientProtocolGuid,
NULL,
(VOID **)&FdtClient
);
ASSERT_EFI_ERROR (Status);
for (FindNodeStatus = FdtClient->FindCompatibleNode (FdtClient,
"virtio,mmio", &Node);
for (FindNodeStatus = FdtClient->FindCompatibleNode (
FdtClient,
"virtio,mmio",
&Node
);
!EFI_ERROR (FindNodeStatus);
FindNodeStatus = FdtClient->FindNextCompatibleNode (FdtClient,
"virtio,mmio", Node, &Node)) {
Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg",
(CONST VOID **)&Reg, &RegSize);
FindNodeStatus = FdtClient->FindNextCompatibleNode (
FdtClient,
"virtio,mmio",
Node,
&Node
))
{
Status = FdtClient->GetNodeProperty (
FdtClient,
Node,
"reg",
(CONST VOID **)&Reg,
&RegSize
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: GetNodeProperty () failed (Status == %r)\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: GetNodeProperty () failed (Status == %r)\n",
__FUNCTION__,
Status
));
continue;
}
@ -67,11 +86,12 @@ InitializeVirtioFdtDxe (
//
// Create a unique device path for this transport on the fly
//
RegBase = SwapBytes64 (*Reg);
RegBase = SwapBytes64 (*Reg);
DevicePath = (VIRTIO_TRANSPORT_DEVICE_PATH *)CreateDeviceNode (
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
sizeof (VIRTIO_TRANSPORT_DEVICE_PATH));
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
sizeof (VIRTIO_TRANSPORT_DEVICE_PATH)
);
if (DevicePath == NULL) {
DEBUG ((DEBUG_ERROR, "%a: Out of memory\n", __FUNCTION__));
continue;
@ -79,39 +99,62 @@ InitializeVirtioFdtDxe (
CopyGuid (&DevicePath->Vendor.Guid, &gVirtioMmioTransportGuid);
DevicePath->PhysBase = RegBase;
SetDevicePathNodeLength (&DevicePath->Vendor,
sizeof (*DevicePath) - sizeof (DevicePath->End));
SetDevicePathNodeLength (
&DevicePath->Vendor,
sizeof (*DevicePath) - sizeof (DevicePath->End)
);
SetDevicePathEndNode (&DevicePath->End);
Handle = NULL;
Status = gBS->InstallProtocolInterface (&Handle,
&gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
DevicePath);
Status = gBS->InstallProtocolInterface (
&Handle,
&gEfiDevicePathProtocolGuid,
EFI_NATIVE_INTERFACE,
DevicePath
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Failed to install the EFI_DEVICE_PATH "
DEBUG ((
DEBUG_ERROR,
"%a: Failed to install the EFI_DEVICE_PATH "
"protocol on a new handle (Status == %r)\n",
__FUNCTION__, Status));
__FUNCTION__,
Status
));
FreePool (DevicePath);
continue;
}
Status = VirtioMmioInstallDevice (RegBase, Handle);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Failed to install VirtIO transport @ 0x%Lx "
"on handle %p (Status == %r)\n", __FUNCTION__, RegBase,
Handle, Status));
DEBUG ((
DEBUG_ERROR,
"%a: Failed to install VirtIO transport @ 0x%Lx "
"on handle %p (Status == %r)\n",
__FUNCTION__,
RegBase,
Handle,
Status
));
Status = gBS->UninstallProtocolInterface (Handle,
&gEfiDevicePathProtocolGuid, DevicePath);
Status = gBS->UninstallProtocolInterface (
Handle,
&gEfiDevicePathProtocolGuid,
DevicePath
);
ASSERT_EFI_ERROR (Status);
FreePool (DevicePath);
continue;
}
}
if (EFI_ERROR (FindNodeStatus) && FindNodeStatus != EFI_NOT_FOUND) {
DEBUG ((DEBUG_ERROR, "%a: Error occurred while iterating DT nodes "
"(FindNodeStatus == %r)\n", __FUNCTION__, FindNodeStatus));
if (EFI_ERROR (FindNodeStatus) && (FindNodeStatus != EFI_NOT_FOUND)) {
DEBUG ((
DEBUG_ERROR,
"%a: Error occurred while iterating DT nodes "
"(FindNodeStatus == %r)\n",
__FUNCTION__,
FindNodeStatus
));
}
return EFI_SUCCESS;

8
OvmfPkg/Include/Guid/ConfidentialComputingSecret.h
View File

@ -1,4 +1,4 @@
/** @file
/** @file
UEFI Configuration Table for exposing the SEV Launch Secret location to UEFI
applications (boot loaders).
@ -19,10 +19,10 @@
}
typedef struct {
UINT64 Base;
UINT64 Size;
UINT64 Base;
UINT64 Size;
} CONFIDENTIAL_COMPUTING_SECRET_LOCATION;
extern EFI_GUID gConfidentialComputingSecretGuid;
extern EFI_GUID gConfidentialComputingSecretGuid;
#endif // SEV_LAUNCH_SECRET_H_

2
OvmfPkg/Include/Guid/MicrosoftVendor.h
View File

@ -50,6 +50,6 @@
{ 0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b }, \
}
extern EFI_GUID gMicrosoftVendorGuid;
extern EFI_GUID gMicrosoftVendorGuid;
#endif /* MICROSOFT_VENDOR_H_ */

2
OvmfPkg/Include/Guid/OvmfPkKek1AppPrefix.h
View File

@ -40,6 +40,6 @@
{ 0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27 }, \
}
extern EFI_GUID gOvmfPkKek1AppPrefixGuid;
extern EFI_GUID gOvmfPkKek1AppPrefixGuid;
#endif /* OVMF_PK_KEK1_APP_PREFIX_H_ */

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