BaseTools: BaseTools changes for RISC-V platform.
C code changes for building EDK2 RISC-V platform. Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Co-authored-by: Daniel Helmut Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
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@ -2,6 +2,7 @@
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Function prototypes and defines on Memory Only PE COFF loader
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Portion Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -25,6 +26,14 @@
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#define IMAGE_ERROR_FAILED_RELOCATION 9
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#define IMAGE_ERROR_FAILED_ICACHE_FLUSH 10
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//
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// Macro definitions for RISC-V architecture.
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//
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#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1))
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#define RISCV_IMM_BITS 12
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#define RISCV_IMM_REACH (1LL<<RISCV_IMM_BITS)
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#define RISCV_CONST_HIGH_PART(VALUE) \
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(((VALUE) + (RISCV_IMM_REACH/2)) & ~(RISCV_IMM_REACH-1))
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//
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// PE/COFF Loader Read Function passed in by caller
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