Update MDE Library instances according to code review comments.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5823 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -27,32 +27,19 @@
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#define PCI_CONFIGURATION_ADDRESS_PORT 0xCF8
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#define PCI_CONFIGURATION_DATA_PORT 0xCFC
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//
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// Declare macro to convert PCI Library formatted address to CF8 formatted address
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//
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// PCI Library formatted address CF8 Formatted Address
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// ============================= ======================
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// Bits 00..11 Register Bits 00..07 Register
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// Bits 12..14 Function Bits 08..10 Function
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// Bits 15..19 Device Bits 11..15 Device
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// Bits 20..27 Bus Bits 16..23 Bus
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// Bits 28..31 Reserved(MBZ) Bits 24..30 Reserved(MBZ)
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// Bits 31..31 Must be 1
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//
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/**
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Assert the validity of a PCI address. A valid PCI address should contain 1's
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only in the low 28 bits.
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Convert a PCI Library address to PCI CF8 formatted address.
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@param A The address to validate.
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@param M Additional bits to assert to be zero.
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**/
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#define ASSERT_INVALID_PCI_ADDRESS(A,M) \
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ASSERT (((A) & (~0xffff0ff | (M))) == 0)
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/**
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Convert a PCI Express address to PCI CF8 address.
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Declare macro to convert PCI Library address to PCI CF8 formatted address.
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Bit fields of PCI Library and CF8 formatted address is as follows:
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PCI Library formatted address CF8 Formatted Address
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============================= ======================
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Bits 00..11 Register Bits 00..07 Register
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Bits 12..14 Function Bits 08..10 Function
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Bits 15..19 Device Bits 11..15 Device
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Bits 20..27 Bus Bits 16..23 Bus
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Bits 28..31 Reserved(MBZ) Bits 24..30 Reserved(MBZ)
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Bits 31..31 Must be 1
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@param A The address to convert.
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@@ -62,6 +49,17 @@
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#define PCI_TO_CF8_ADDRESS(A) \
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((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))
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/**
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Assert the validity of a PCI CF8 address. A valid PCI CF8 address should contain 1's
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only in the low 28 bits, excluding bits 08..11.
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@param A The address to validate.
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@param M Additional bits to assert to be zero.
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**/
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#define ASSERT_INVALID_PCI_ADDRESS(A,M) \
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ASSERT (((A) & (~0xffff0ff | (M))) == 0)
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/**
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Reads an 8-bit PCI configuration register.
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