ArmPkg/ArmCpuLib: Replaced complex functions ArmCpuSynchronizeWait & ArmCpuSynchronizeSignal by sev & wfe
Previsouly the synchronization of MpCore was using the SGI (Software Generated Interrupt) to synchronize MpCore during the early boot. This commit replaced this mechanism by the more appropriate SEV/WFE instructions (Send/Wait Event instructions). That also eases the port to a new cpu/platform. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13249 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2011, ARM Limited. All rights reserved.
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Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@@ -15,39 +15,11 @@
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmCortexA9.h>
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VOID
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ArmCpuSynchronizeSignal (
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IN ARM_CPU_SYNCHRONIZE_EVENT Event
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)
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{
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if (Event == ARM_CPU_EVENT_BOOT_MEM_INIT) {
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// Do nothing, Cortex A9 secondary cores are waiting for the SCU to be
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// enabled (done by ArmCpuSetup()) as a way to know when the Init Boot
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// Mem as been initialized
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} else {
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// Send SGI to all Secondary core to wake them up from WFI state.
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ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
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}
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}
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VOID
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CArmCpuSynchronizeWait (
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IN ARM_CPU_SYNCHRONIZE_EVENT Event
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)
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{
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// Waiting for the SGI from the primary core
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ArmCallWFI ();
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// Acknowledge the interrupt and send End of Interrupt signal.
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ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
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}
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VOID
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ArmEnableScu (
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VOID
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