ArmPkg/ArmCpuLib: Replaced complex functions ArmCpuSynchronizeWait & ArmCpuSynchronizeSignal by sev & wfe

Previsouly the synchronization of MpCore was using the SGI (Software
Generated Interrupt) to synchronize MpCore during the early boot.
This commit replaced this mechanism by the more appropriate SEV/WFE
instructions (Send/Wait Event instructions).
That also eases the port to a new cpu/platform.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13249 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/PrePi/PeiMPCore.inf

@@ -38,7 +38,6 @@
   BaseLib
   DebugLib
   DebugAgentLib
-  ArmCpuLib
   ArmLib
   ArmGicLib
   IoLib

ArmPlatformPkg/PrePi/PeiUniCore.inf

@@ -1,6 +1,7 @@
 #/** @file
 #  
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#  
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
 #  which accompanies this distribution.  The full text of the license may be found at
@@ -38,7 +39,6 @@
   BaseLib
   DebugLib
   DebugAgentLib
-  ArmCpuLib
   ArmLib
   IoLib
   TimerLib

ArmPlatformPkg/PrePi/PrePi.c

@@ -14,7 +14,6 @@
 
 #include <PiPei.h>
 
-#include <Library/ArmCpuLib.h>
 #include <Library/DebugAgentLib.h>
 #include <Library/PrePiLib.h>
 #include <Library/PrintLib.h>
@@ -204,11 +203,12 @@ CEntryPoint (
     if (IS_PRIMARY_CORE(MpId)) {
       mGlobalVariableBase = GlobalVariableBase;
       if (ArmIsMpCore()) {
-        ArmCpuSynchronizeSignal (ARM_CPU_EVENT_DEFAULT);
+        // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
+        ArmCallSEV ();
       }
     } else {
-      // Wait the Primay core has defined the address of the Global Variable region
-      ArmCpuSynchronizeWait (ARM_CPU_EVENT_DEFAULT);
+      // Wait the Primay core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
+      ArmCallWFE ();
     }
   }
   

ArmPlatformPkg/Sec/Sec.c

@@ -54,7 +54,8 @@ CEntryPoint (
   // Primary CPU clears out the SCU tag RAMs, secondaries wait
   if (IS_PRIMARY_CORE(MpId)) {
     if (ArmIsMpCore()) {
-      ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
+      // Signal for the initial memory is configured (event: BOOT_MEM_INIT)
+      ArmCallSEV ();
     }
 
     // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
@@ -159,18 +160,18 @@ TrustedWorldInitialization (
   // Setup the Trustzone Chipsets
   if (IS_PRIMARY_CORE(MpId)) {
     if (ArmIsMpCore()) {
-      // Waiting for the Primary Core to have finished to initialize the Secure World
-      ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
+      // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
+      ArmCallSEV ();
     }
   } else {
     // The secondary cores need to wait until the Trustzone chipsets configuration is done
     // before switching to Non Secure World
 
-    // Waiting for the Primary Core to have finished to initialize the Secure World
-    ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
+    // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
+    ArmCallWFE ();
   }
 
-  // Call the Platform specific fucntion to execute additional actions if required
+  // Call the Platform specific function to execute additional actions if required
   JumpAddress = PcdGet32 (PcdFvBaseAddress);
   ArmPlatformSecExtraAction (MpId, &JumpAddress);
 

ArmPlatformPkg/Sec/SecEntryPoint.S

@@ -26,7 +26,7 @@ GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
 GCC_ASM_IMPORT(ArmWriteVBar)
 GCC_ASM_IMPORT(ArmReadMpidr)
 GCC_ASM_IMPORT(SecVectorTable)
-GCC_ASM_IMPORT(ArmCpuSynchronizeWait)
+GCC_ASM_IMPORT(ArmCallWFE)
 GCC_ASM_EXPORT(_ModuleEntryPoint)
 
 StartupAddr:        .word       ASM_PFX(CEntryPoint)
@@ -59,8 +59,8 @@ _IdentifyCpu:
   beq   _InitMem
   
 _WaitInitMem:
-  mov   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
-  bl    ASM_PFX(ArmCpuSynchronizeWait)
+  // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
+  bl    ASM_PFX(ArmCallWFE)
   // Now the Init Mem is initialized, we setup the secondary core stacks
   b     _SetupSecondaryCoreStack
   

ArmPlatformPkg/Sec/SecEntryPoint.asm

@@ -24,8 +24,8 @@
   IMPORT  ArmDisableCachesAndMmu
   IMPORT  ArmWriteVBar
   IMPORT  ArmReadMpidr
+  IMPORT  ArmCallWFE
   IMPORT  SecVectorTable
-  IMPORT  ArmCpuSynchronizeWait
   EXPORT  _ModuleEntryPoint
 
   PRESERVE8
@@ -61,8 +61,8 @@ _IdentifyCpu
   beq   _InitMem
   
 _WaitInitMem
-  mov   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
-  bl    ArmCpuSynchronizeWait
+  // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
+  bl    ArmCallWFE
   // Now the Init Mem is initialized, we setup the secondary core stacks
   b     _SetupSecondaryCoreStack