This revision can only work with Intel(c) UDK Debugger Tool version 1.3 or greater. Detailed change log is as below:
1. Add DebugAgentPei driver to initialize Debug Agent in PEI phase. Add DebugAgentDxe driver to initialize Debug Agent in DXE phase. DebugAgentDxe driver could be loaded and unloaded in shell. 2. Update the SourceLevelDebugPkg so that the debug agent can be initialized in any phase: SEC, PEI or DXE. 3. Add an enhanced retry algorithm that provides a robust connection when data loss happens in the debug channel. 4. Clear DR7 register in exception handler. 5. Set the default serial port parameter to 0 instead of PCDs. 6. Build pointer of Mailbox in HOB instead of Mailbox itself, since HOB may be moved at DXE entry point function. 7. Raise TPL to prevent recursion from EFI timer interrupts in SerialIo.c. 8. Add one spin lock for accessing Mailbox when MP debugging supported. 9. Use more non-NULL library instances in SourceLevelDebugPkg DSC file, thus DebugAgentDxe.efi built from SourceLevelDebugPkg could work in shell. 10.Separate all operations about IDT table entry from SecDebugAgentLib.c into DebugAgent\DebugAgentCommon's arch sub-directory. 11.Enhance Debug Agent to avoid breaking by hardware SMI during DXE debugging phase. 12.Add supporting on mode switch code debugging. 13.Remove reset Host Controller operation in DebugCommunicationLibUsb.c to avoid impacting EDKII usb stack. 14.Fix debug timer interrupt missing issue after back from legacy code. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14083 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
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/** @file
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Command header of for Debug Agent library instance.
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Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
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@@ -32,6 +32,8 @@
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#include <Library/DebugLib.h>
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#include <Library/TimerLib.h>
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#include <Library/PrintLib.h>
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#include <Library/PeCoffGetEntryPointLib.h>
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#include <Library/PeCoffExtraActionLib.h>
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#include <TransferProtocol.h>
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#include <ImageDebugSupport.h>
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@@ -40,11 +42,24 @@
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#include "DebugTimer.h"
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#include "ArchDebugSupport.h"
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//
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// These macros may be already defined in DebugAgentLib.h
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//
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#define DEBUG_AGENT_INIT_PEI 9
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#define DEBUG_AGENT_INIT_DXE_LOAD 10
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#define DEBUG_AGENT_INIT_DXE_UNLOAD 11
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#define DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64 12
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#define DEBUG_INT1_VECTOR 1
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#define DEBUG_INT3_VECTOR 3
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#define DEBUG_TIMER_VECTOR 32
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#define DEBUG_MAILBOX_VECTOR 33
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//
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// Timeout value for reading packet (unit is microsecond)
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//
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#define READ_PACKET_TIMEOUT (500 * 1000)
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#define SOFT_INTERRUPT_SIGNATURE SIGNATURE_32('S','O','F','T')
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#define SYSTEM_RESET_SIGNATURE SIGNATURE_32('S','Y','S','R')
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#define MEMORY_READY_SIGNATURE SIGNATURE_32('M','E','M','R')
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@@ -53,6 +68,8 @@ extern UINTN Exception0Handle;
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extern UINTN TimerInterruptHandle;
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extern UINT16 ExceptionStubHeaderSize;
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extern BOOLEAN mSkipBreakpoint;
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//
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// CPU exception information issued by debug agent
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//
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@@ -67,23 +84,44 @@ typedef struct {
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DEBUG_DATA_RESPONSE_GET_EXCEPTION ExceptionContent;
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} DEBUG_AGENT_EXCEPTION_BUFFER;
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#pragma pack(1)
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typedef struct {
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//
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// Lower 32 bits to store the status of DebugAgent
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//
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UINT32 HostAttached : 1; // 1: HOST is attached
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UINT32 AgentInProgress : 1; // 1: Debug Agent is communicating with HOST
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UINT32 MemoryReady : 1; // 1: Memory is ready
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UINT32 SteppingFlag : 1; // 1: Agent is running stepping command
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UINT32 Reserved1 : 28;
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#define DEBUG_AGENT_FLAG_HOST_ATTACHED BIT0
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#define DEBUG_AGENT_FLAG_AGENT_IN_PROGRESS BIT1
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#define DEBUG_AGENT_FLAG_MEMORY_READY BIT2
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#define DEBUG_AGENT_FLAG_STEPPING BIT3
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#define DEBUG_AGENT_FLAG_CHECK_MAILBOX_IN_HOB BIT4
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#define DEBUG_AGENT_FLAG_BREAK_ON_NEXT_SMI BIT32
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#define DEBUG_AGENT_FLAG_PRINT_ERROR_LEVEL (BIT33|BIT34|BIT35|BIT36)
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#define DEBUG_AGENT_FLAG_BREAK_BOOT_SCRIPT BIT37
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//
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// Higher 32bits to control the behavior of DebugAgent
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//
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UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
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UINT32 PrintErrorLevel : 8; // Bitmask of print error level for debug message
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UINT32 Reserved2 : 23;
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#define DEBUG_MAILBOX_DEBUG_FLAG_INDEX 1
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#define DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX 2
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#define DEBUG_MAILBOX_EXCEPTION_BUFFER_POINTER_INDEX 3
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#define DEBUG_MAILBOX_LAST_ACK 4
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#define DEBUG_MAILBOX_SEQUENCE_NO_INDEX 5
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#define DEBUG_MAILBOX_HOST_SEQUENCE_NO_INDEX 6
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#pragma pack(1)
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typedef union {
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struct {
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//
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// Lower 32 bits to store the status of DebugAgent
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//
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UINT32 HostAttached : 1; // 1: HOST is attached
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UINT32 AgentInProgress : 1; // 1: Debug Agent is communicating with HOST
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UINT32 MemoryReady : 1; // 1: Memory is ready
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UINT32 SteppingFlag : 1; // 1: Agent is running stepping command
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UINT32 CheckMailboxInHob : 1; // 1: Need to check mailbox saved in HOB
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UINT32 SendingPacket : 1; // 1: TARGET is sending debug packet to HOST
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UINT32 Reserved1 : 26;
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//
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// Higher 32bits to control the behavior of DebugAgent
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//
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UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
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UINT32 PrintErrorLevel : 4; // Bitmask of print error level for debug message
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UINT32 BreakOnBootScript : 1; // 1: Break before executing boot script
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UINT32 Reserved2 : 26;
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} Bits;
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UINT64 Uint64;
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} DEBUG_AGENT_FLAG;
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typedef struct {
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@@ -93,9 +131,29 @@ typedef struct {
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// Pointer to DEBUG_AGENT_EXCEPTION_BUFFER
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//
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UINT64 ExceptionBufferPointer;
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UINT8 LastAck; // The last ack packet type
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UINT8 SequenceNo;
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UINT8 HostSequenceNo;
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UINT8 CheckSum; // Mailbox checksum
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UINT8 ToBeCheckSum; // To be Mailbox checksum at the next
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} DEBUG_AGENT_MAILBOX;
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#pragma pack()
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///
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/// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
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///
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typedef union {
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struct {
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UINT32 OffsetLow:16; ///< Offset bits 15..0.
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UINT32 Selector:16; ///< Selector.
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UINT32 Reserved_0:8; ///< Reserved.
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UINT32 GateType:8; ///< Gate Type. See #defines above.
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UINT32 OffsetHigh:16; ///< Offset bits 31..16.
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} Bits;
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UINT64 Uint64;
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} IA32_IDT_ENTRY;
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typedef union {
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struct {
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UINT32 LimitLow : 16;
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@@ -115,22 +173,6 @@ typedef union {
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UINT64 Uint64;
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} IA32_GDT;
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/**
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Caller provided function to be invoked at the end of DebugPortInitialize().
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Refer to the descrption for DebugPortInitialize() for more details.
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@param[in] Context The first input argument of DebugPortInitialize().
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@param[in] DebugPortHandle Debug port handle created by Debug Communication Libary.
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**/
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VOID
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EFIAPI
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InitializeDebugAgentPhase2 (
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IN VOID *Context,
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IN DEBUG_PORT_HANDLE DebugPortHandle
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);
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/**
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Initialize IDT entries to support source level debug.
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@@ -242,5 +284,184 @@ DebugAgentMsgPrint (
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IN CHAR8 *Format,
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...
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);
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/**
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Trigger one software interrupt to debug agent to handle it.
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@param[in] Signature Software interrupt signature.
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**/
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VOID
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TriggerSoftInterrupt (
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IN UINT32 Signature
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);
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/**
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Check if debug agent support multi-processor.
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@retval TRUE Multi-processor is supported.
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@retval FALSE Multi-processor is not supported.
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**/
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BOOLEAN
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MultiProcessorDebugSupport (
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VOID
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);
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/**
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Find and report module image info to HOST.
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@param[in] AlignSize Image aligned size.
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**/
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VOID
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FindAndReportModuleImageInfo (
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IN UINTN AlignSize
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);
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/**
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Read IDT entry to check if IDT entries are setup by Debug Agent.
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@retval TRUE IDT entries were setup by Debug Agent.
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@retval FALSE IDT entries were not setup by Debug Agent.
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**/
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BOOLEAN
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IsDebugAgentInitialzed (
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VOID
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);
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/**
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Caculate Mailbox checksum and update the checksum field.
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@param[in] Mailbox Debug Agent Mailbox pointer.
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**/
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VOID
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UpdateMailboxChecksum (
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IN DEBUG_AGENT_MAILBOX *Mailbox
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);
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/**
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Verify Mailbox checksum.
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If checksum error, print debug message and run init dead loop.
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@param[in] Mailbox Debug Agent Mailbox pointer.
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**/
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VOID
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VerifyMailboxChecksum (
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IN DEBUG_AGENT_MAILBOX *Mailbox
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);
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/**
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Set debug flag in mailbox.
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@param[in] FlagMask Debug flag mask value.
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@param[in] FlagValue Debug flag value.
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**/
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VOID
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SetDebugFlag (
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IN UINT64 FlagMask,
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IN UINT32 FlagValue
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);
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/**
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Get debug flag in mailbox.
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@param[in] FlagMask Debug flag mask value.
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@return Debug flag value.
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**/
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UINT32
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GetDebugFlag (
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IN UINT64 FlagMask
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);
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/**
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Update Mailbox content by index.
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@param[in] Mailbox Debug Agent Mailbox pointer.
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@param[in] Index Mailbox content index.
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@param[in] Value Value to be set into mail box.
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**/
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VOID
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UpdateMailboxContent (
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IN DEBUG_AGENT_MAILBOX *Mailbox,
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IN UINTN Index,
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IN UINT64 Value
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);
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/**
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Retrieve exception handler from IDT table by ExceptionNum.
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@param[in] ExceptionNum Exception number
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@return Exception handler
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**/
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VOID *
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GetExceptionHandlerInIdtEntry (
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IN UINTN ExceptionNum
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);
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/**
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Set exception handler in IDT table by ExceptionNum.
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@param[in] ExceptionNum Exception number
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@param[in] ExceptionHandler Exception Handler to be set
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**/
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VOID
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SetExceptionHandlerInIdtEntry (
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IN UINTN ExceptionNum,
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IN VOID *ExceptionHandler
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);
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/**
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Prints a debug message to the debug output device if the specified error level is enabled.
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If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
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GetDebugPrintErrorLevel (), then print the message specified by Format and the
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associated variable argument list to the debug output device.
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If Format is NULL, then ASSERT().
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@param[in] ErrorLevel The error level of the debug message.
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@param[in] IsSend Flag of debug message to declare that the data is being sent or being received.
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@param[in] Data Variable argument list whose contents are accessed
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@param[in] Length based on the format string specified by Format.
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**/
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VOID
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EFIAPI
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DebugAgentDataMsgPrint (
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IN UINT8 ErrorLevel,
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IN BOOLEAN IsSend,
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IN UINT8 *Data,
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IN UINT8 Length
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);
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/**
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Read remaing debug packet except for the start symbol
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@param[in] Handle Pointer to Debug Port handle.
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@param[in, out] DebugHeader Debug header buffer including start symbol.
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@retval EFI_SUCCESS Read the symbol in BreakSymbol.
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@retval EFI_CRC_ERROR CRC check fail.
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@retval EFI_TIMEOUT Timeout occurs when reading debug packet.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
ReadRemainingBreakPacket (
|
||||
IN DEBUG_PORT_HANDLE Handle,
|
||||
IN OUT DEBUG_PACKET_HEADER *DebugHeader
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
|
@@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
Multi-Processor support functions implementation.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -14,27 +14,30 @@
|
||||
|
||||
#include "DebugAgent.h"
|
||||
|
||||
DEBUG_MP_CONTEXT volatile mDebugMpContext = {0,0,{0},{0},0,0,0,0,FALSE,FALSE};
|
||||
DEBUG_MP_CONTEXT volatile mDebugMpContext = {0,0,0,{0},{0},0,0,0,0,FALSE,FALSE};
|
||||
|
||||
DEBUG_CPU_DATA volatile mDebugCpuData = {0};
|
||||
|
||||
/**
|
||||
Acquire access control on debug port.
|
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Acquire a spin lock when Multi-processor supported.
|
||||
|
||||
It will block in the function if cannot get the access control.
|
||||
If Multi-processor is not supported, return directly.
|
||||
|
||||
@param[in, out] MpSpinLock A pointer to the spin lock.
|
||||
|
||||
**/
|
||||
VOID
|
||||
AcquireDebugPortControl (
|
||||
VOID
|
||||
AcquireMpSpinLock (
|
||||
IN OUT SPIN_LOCK *MpSpinLock
|
||||
)
|
||||
{
|
||||
if (!MultiProcessorDebugSupport) {
|
||||
if (!MultiProcessorDebugSupport()) {
|
||||
return;
|
||||
}
|
||||
|
||||
while (TRUE) {
|
||||
if (AcquireSpinLockOrFail (&mDebugMpContext.DebugPortSpinLock)) {
|
||||
if (AcquireSpinLockOrFail (MpSpinLock)) {
|
||||
break;
|
||||
}
|
||||
CpuPause ();
|
||||
@@ -43,51 +46,21 @@ AcquireDebugPortControl (
|
||||
}
|
||||
|
||||
/**
|
||||
Release access control on debug port.
|
||||
Release a spin lock when Multi-processor supported.
|
||||
|
||||
@param[in, out] MpSpinLock A pointer to the spin lock.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ReleaseDebugPortControl (
|
||||
VOID
|
||||
ReleaseMpSpinLock (
|
||||
IN OUT SPIN_LOCK *MpSpinLock
|
||||
)
|
||||
{
|
||||
if (!MultiProcessorDebugSupport) {
|
||||
if (!MultiProcessorDebugSupport()) {
|
||||
return;
|
||||
}
|
||||
|
||||
ReleaseSpinLock (&mDebugMpContext.DebugPortSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
Acquire access control on MP context.
|
||||
|
||||
It will block in the function if cannot get the access control.
|
||||
|
||||
**/
|
||||
VOID
|
||||
AcquireMpContextControl (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
while (TRUE) {
|
||||
if (AcquireSpinLockOrFail (&mDebugMpContext.MpContextSpinLock)) {
|
||||
break;
|
||||
}
|
||||
CpuPause ();
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
Release access control on MP context.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ReleaseMpContextControl (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
ReleaseSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
ReleaseSpinLock (MpSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -136,7 +109,7 @@ GetProcessorIndex (
|
||||
|
||||
LocalApicID = (UINT16) GetApicId ();
|
||||
|
||||
AcquireMpContextControl ();
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
|
||||
for (Index = 0; Index < mDebugCpuData.CpuCount; Index ++) {
|
||||
if (mDebugCpuData.ApicID[Index] == LocalApicID) {
|
||||
@@ -149,7 +122,7 @@ GetProcessorIndex (
|
||||
mDebugCpuData.CpuCount ++ ;
|
||||
}
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
|
||||
return Index;
|
||||
}
|
||||
@@ -170,9 +143,9 @@ IsBsp (
|
||||
{
|
||||
if (AsmMsrBitFieldRead64 (MSR_IA32_APIC_BASE_ADDRESS, 8, 8) == 1) {
|
||||
if (mDebugMpContext.BspIndex != ProcessorIndex) {
|
||||
AcquireMpContextControl ();
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
mDebugMpContext.BspIndex = ProcessorIndex;
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
return TRUE;
|
||||
} else {
|
||||
@@ -197,7 +170,7 @@ SetCpuStopFlagByIndex (
|
||||
UINT8 Value;
|
||||
UINTN Index;
|
||||
|
||||
AcquireMpContextControl ();
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
|
||||
Value = mDebugMpContext.CpuStopStatusMask[ProcessorIndex / 8];
|
||||
Index = ProcessorIndex % 8;
|
||||
@@ -208,7 +181,7 @@ SetCpuStopFlagByIndex (
|
||||
}
|
||||
mDebugMpContext.CpuStopStatusMask[ProcessorIndex / 8] = Value;
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -228,7 +201,7 @@ SetCpuBreakFlagByIndex (
|
||||
UINT8 Value;
|
||||
UINTN Index;
|
||||
|
||||
AcquireMpContextControl ();
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
|
||||
Value = mDebugMpContext.CpuBreakMask[ProcessorIndex / 8];
|
||||
Index = ProcessorIndex % 8;
|
||||
@@ -239,7 +212,7 @@ SetCpuBreakFlagByIndex (
|
||||
}
|
||||
mDebugMpContext.CpuBreakMask[ProcessorIndex / 8] = Value;
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -279,11 +252,9 @@ SetCpuRunningFlag (
|
||||
IN BOOLEAN RunningFlag
|
||||
)
|
||||
{
|
||||
AcquireMpContextControl ();
|
||||
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
mDebugMpContext.RunCommandSet = RunningFlag;
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -297,11 +268,9 @@ SetDebugViewPoint (
|
||||
IN UINT32 ProcessorIndex
|
||||
)
|
||||
{
|
||||
AcquireMpContextControl ();
|
||||
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
mDebugMpContext.ViewPointIndex = ProcessorIndex;
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -316,11 +285,9 @@ SetIpiSentByApFlag (
|
||||
IN BOOLEAN IpiSentByApFlag
|
||||
)
|
||||
{
|
||||
AcquireMpContextControl ();
|
||||
|
||||
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
mDebugMpContext.IpiSentByAp = IpiSentByApFlag;
|
||||
|
||||
ReleaseMpContextControl ();
|
||||
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -384,7 +351,7 @@ IsFirstBreakProcessor (
|
||||
IN UINT32 ProcessorIndex
|
||||
)
|
||||
{
|
||||
if (MultiProcessorDebugSupport) {
|
||||
if (MultiProcessorDebugSupport()) {
|
||||
if (mDebugMpContext.BreakAtCpuIndex != (UINT32) -1) {
|
||||
//
|
||||
// The current processor is not the first breaking one.
|
||||
|
@@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
Header file for Multi-Processor support.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -25,6 +25,7 @@ typedef struct {
|
||||
typedef struct {
|
||||
SPIN_LOCK MpContextSpinLock; ///< Lock for writting MP context
|
||||
SPIN_LOCK DebugPortSpinLock; ///< Lock for access debug port
|
||||
SPIN_LOCK MailboxSpinLock; ///< Lock for accessing mail box
|
||||
UINT8 CpuBreakMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of all breaking CPUs
|
||||
UINT8 CpuStopStatusMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of CPU stop status
|
||||
UINT32 ViewPointIndex; ///< Current view point to be debugged
|
||||
@@ -35,7 +36,6 @@ typedef struct {
|
||||
BOOLEAN RunCommandSet; ///< TRUE: RUN commmand is executing. FALSE : RUN command has been executed.
|
||||
} DEBUG_MP_CONTEXT;
|
||||
|
||||
extern CONST BOOLEAN MultiProcessorDebugSupport;
|
||||
extern DEBUG_MP_CONTEXT volatile mDebugMpContext;
|
||||
extern DEBUG_CPU_DATA volatile mDebugCpuData;
|
||||
|
||||
@@ -62,43 +62,28 @@ GetProcessorIndex (
|
||||
);
|
||||
|
||||
/**
|
||||
Acquire access control on MP context.
|
||||
Acquire a spin lock when Multi-processor supported.
|
||||
|
||||
It will block in the function if cannot get the access control.
|
||||
If Multi-processor is not supported, return directly.
|
||||
|
||||
@param[in, out] MpSpinLock A pointer to the spin lock.
|
||||
|
||||
**/
|
||||
VOID
|
||||
AcquireMpContextControl (
|
||||
VOID
|
||||
AcquireMpSpinLock (
|
||||
IN OUT SPIN_LOCK *MpSpinLock
|
||||
);
|
||||
|
||||
/**
|
||||
Release access control on MP context.
|
||||
Release a spin lock when Multi-processor supported.
|
||||
|
||||
@param[in, out] MpSpinLock A pointer to the spin lock.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ReleaseMpContextControl (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Acquire access control on debug port.
|
||||
|
||||
It will block in the function if cannot get the access control.
|
||||
|
||||
**/
|
||||
VOID
|
||||
AcquireDebugPortControl (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Release access control on debug port.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ReleaseDebugPortControl (
|
||||
VOID
|
||||
ReleaseMpSpinLock (
|
||||
IN OUT SPIN_LOCK *MpSpinLock
|
||||
);
|
||||
|
||||
/**
|
||||
|
@@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
Code for debug timer to support debug agent library implementation.
|
||||
|
||||
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -41,7 +41,7 @@ InitializeDebugTimer (
|
||||
|
||||
InitializeApicTimer (ApicTimerDivisor, InitialCount, TRUE, DEBUG_TIMER_VECTOR);
|
||||
|
||||
if (MultiProcessorDebugSupport) {
|
||||
if (MultiProcessorDebugSupport()) {
|
||||
mDebugMpContext.DebugTimerInitCount = InitialCount;
|
||||
}
|
||||
}
|
||||
@@ -65,19 +65,26 @@ SaveAndSetDebugTimerInterrupt (
|
||||
IN BOOLEAN EnableStatus
|
||||
)
|
||||
{
|
||||
BOOLEAN OldInterruptState;
|
||||
BOOLEAN OldDebugTimerInterruptState;
|
||||
|
||||
OldInterruptState = SaveAndDisableInterrupts ();
|
||||
OldDebugTimerInterruptState = GetApicTimerInterruptState ();
|
||||
|
||||
if (EnableStatus) {
|
||||
EnableApicTimerInterrupt ();
|
||||
} else {
|
||||
DisableApicTimerInterrupt ();
|
||||
if (OldDebugTimerInterruptState != EnableStatus) {
|
||||
if (EnableStatus) {
|
||||
EnableApicTimerInterrupt ();
|
||||
} else {
|
||||
DisableApicTimerInterrupt ();
|
||||
}
|
||||
//
|
||||
// Validate the Debug Timer interrupt state
|
||||
// This will make additional delay after Local Apic Timer interrupt state is changed.
|
||||
// Thus, CPU could handle the potential pending interrupt of Local Apic timer.
|
||||
//
|
||||
while (GetApicTimerInterruptState () != EnableStatus) {
|
||||
CpuPause ();
|
||||
}
|
||||
}
|
||||
|
||||
SetInterruptState (OldInterruptState);
|
||||
|
||||
return OldDebugTimerInterruptState;
|
||||
}
|
||||
|
||||
|
@@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
Supporting functions for IA32 architecture.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -39,17 +39,17 @@ InitializeDebugIdt (
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
for (Index = 0; Index < 20; Index ++) {
|
||||
if ((PcdGet32 (PcdExceptionsIgnoredByDebugger) & (1 << Index)) != 0) {
|
||||
if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
|
||||
//
|
||||
// If the exception is masked to be reserved, skip it
|
||||
// If the exception is masked to be reserved except for INT1 and INT3, skip it
|
||||
//
|
||||
continue;
|
||||
}
|
||||
InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
|
||||
IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
|
||||
IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
|
||||
IdtEntry[Index].Bits.Selector = CodeSegment;
|
||||
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
||||
IdtEntry[Index].Bits.Selector = CodeSegment;
|
||||
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
||||
}
|
||||
|
||||
InterruptHandler = (UINTN) &TimerInterruptHandle;
|
||||
@@ -63,3 +63,49 @@ InitializeDebugIdt (
|
||||
//
|
||||
AsmWriteCr4 (AsmReadCr4 () | BIT3);
|
||||
}
|
||||
|
||||
/**
|
||||
Retrieve exception handler from IDT table by ExceptionNum.
|
||||
|
||||
@param[in] ExceptionNum Exception number
|
||||
|
||||
@return Exception handler
|
||||
|
||||
**/
|
||||
VOID *
|
||||
GetExceptionHandlerInIdtEntry (
|
||||
IN UINTN ExceptionNum
|
||||
)
|
||||
{
|
||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||
IA32_DESCRIPTOR IdtDescriptor;
|
||||
|
||||
AsmReadIdtr (&IdtDescriptor);
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
return (VOID *) (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetLow) |
|
||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16));
|
||||
}
|
||||
|
||||
/**
|
||||
Set exception handler in IDT table by ExceptionNum.
|
||||
|
||||
@param[in] ExceptionNum Exception number
|
||||
@param[in] ExceptionHandler Exception Handler to be set
|
||||
|
||||
**/
|
||||
VOID
|
||||
SetExceptionHandlerInIdtEntry (
|
||||
IN UINTN ExceptionNum,
|
||||
IN VOID *ExceptionHandler
|
||||
)
|
||||
{
|
||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||
IA32_DESCRIPTOR IdtDescriptor;
|
||||
|
||||
AsmReadIdtr (&IdtDescriptor);
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
|
||||
IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);
|
||||
}
|
||||
|
@@ -1,6 +1,6 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -33,6 +33,7 @@ ASM_PFX(ExceptionStubHeaderSize): .word ASM_PFX(Exception1Handle) - ASM_PFX
|
||||
|
||||
.text
|
||||
|
||||
.byte 0x41, 0x47, 0x54, 0x48 # AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')
|
||||
ASM_PFX(Exception0Handle):
|
||||
cli
|
||||
pushl %eax
|
||||
@@ -259,7 +260,7 @@ NoExtrPush:
|
||||
pushl %eax
|
||||
## clear Dr7 while executing debugger itself
|
||||
xorl %eax,%eax
|
||||
# movl %eax, %dr7
|
||||
movl %eax, %dr7
|
||||
|
||||
movl %dr6, %eax
|
||||
pushl %eax
|
||||
|
@@ -1,6 +1,6 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
; Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -39,6 +39,7 @@ CommonEntryAddr DD CommonEntry
|
||||
|
||||
.code
|
||||
|
||||
db 41h, 47h, 54h, 48h ; AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')
|
||||
Exception0Handle:
|
||||
cli
|
||||
push eax
|
||||
@@ -259,7 +260,7 @@ NoExtrPush:
|
||||
|
||||
;; clear Dr7 while executing debugger itself
|
||||
xor eax, eax
|
||||
;; mov dr7, eax
|
||||
mov dr7, eax
|
||||
|
||||
;; Dr6
|
||||
mov eax, dr6
|
||||
|
@@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
Supporting functions for X64 architecture.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -39,9 +39,9 @@ InitializeDebugIdt (
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
for (Index = 0; Index < 20; Index ++) {
|
||||
if ((PcdGet32 (PcdExceptionsIgnoredByDebugger) & (1 << Index)) != 0) {
|
||||
if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
|
||||
//
|
||||
// If the exception is masked to be reserved, skip it
|
||||
// If the exception is masked to be reserved except for INT1 and INT3, skip it
|
||||
//
|
||||
continue;
|
||||
}
|
||||
@@ -65,3 +65,51 @@ InitializeDebugIdt (
|
||||
//
|
||||
AsmWriteCr4 (AsmReadCr4 () | BIT3);
|
||||
}
|
||||
|
||||
/**
|
||||
Retrieve exception handler from IDT table by ExceptionNum.
|
||||
|
||||
@param[in] ExceptionNum Exception number
|
||||
|
||||
@return Exception handler
|
||||
|
||||
**/
|
||||
VOID *
|
||||
GetExceptionHandlerInIdtEntry (
|
||||
IN UINTN ExceptionNum
|
||||
)
|
||||
{
|
||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||
IA32_DESCRIPTOR IdtDescriptor;
|
||||
|
||||
AsmReadIdtr (&IdtDescriptor);
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
return (VOID *) (IdtEntry[ExceptionNum].Bits.OffsetLow |
|
||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16) |
|
||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetUpper) << 32));
|
||||
}
|
||||
|
||||
/**
|
||||
Set exception handler in IDT table by ExceptionNum.
|
||||
|
||||
@param[in] ExceptionNum Exception number
|
||||
@param[in] ExceptionHandler Exception Handler to be set
|
||||
|
||||
**/
|
||||
VOID
|
||||
SetExceptionHandlerInIdtEntry (
|
||||
IN UINTN ExceptionNum,
|
||||
IN VOID *ExceptionHandler
|
||||
)
|
||||
{
|
||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||
IA32_DESCRIPTOR IdtDescriptor;
|
||||
|
||||
AsmReadIdtr (&IdtDescriptor);
|
||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
|
||||
|
||||
IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
|
||||
IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);
|
||||
IdtEntry[ExceptionNum].Bits.OffsetUpper = (UINT32)((UINTN)ExceptionHandler >> 32);
|
||||
}
|
||||
|
@@ -1,6 +1,6 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -35,6 +35,7 @@ ASM_PFX(ExceptionStubHeaderSize): .word ASM_PFX(Exception1Handle) - ASM_PFX
|
||||
|
||||
.text
|
||||
|
||||
.byte 0x41, 0x47, 0x54, 0x48 # AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')
|
||||
ASM_PFX(Exception0Handle):
|
||||
cli
|
||||
pushq %rcx
|
||||
@@ -280,7 +281,7 @@ NoExtrPush:
|
||||
pushq %rax
|
||||
## clear Dr7 while executing debugger itself
|
||||
xorq %rax, %rax
|
||||
#debug movq %rax, %dr7
|
||||
movq %rax, %dr7
|
||||
|
||||
movq %dr6, %rax
|
||||
pushq %rax
|
||||
|
@@ -1,6 +1,6 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
; Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
@@ -33,6 +33,7 @@ CommonEntryAddr dq CommonEntry ;
|
||||
|
||||
.code
|
||||
|
||||
db 41h, 47h, 54h, 48h ; AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')
|
||||
Exception0Handle:
|
||||
cli
|
||||
push rcx
|
||||
@@ -198,7 +199,7 @@ NoExtrPush:
|
||||
push rax
|
||||
mov rax, cr2
|
||||
push rax
|
||||
push 0 ; cr0 will not saved???
|
||||
push 0
|
||||
mov rax, cr0
|
||||
push rax
|
||||
|
||||
|
Reference in New Issue
Block a user