MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support.
Add SDMA, ADMA2 and 26b data length support. If V4 64 bit address mode is supported in capabilities register, program controller to enable V4 host mode and use appropriate SDMA registers supporting 64 bit addresses. If V4 64 bit address mode is supported in capabilities register, program controller to enable V4 host mode and use appropriate ADMA descriptors supporting 64 bit addresses. If host controller version is above V4.0, enable ADMA2 with 26b data length support for better performance. HC 2 register is configured to use 26 bit data lengths and ADMA2 descriptors are configured appropriately. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1359 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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@@ -1,6 +1,7 @@
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/** @file
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This file provides some helper functions which are specific for SD card device.
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Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@@ -864,7 +865,7 @@ SdCardSetBusMode (
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return Status;
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}
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Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot]);
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Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot], Private->ControllerVersion[Slot]);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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@@ -1064,7 +1065,7 @@ SdCardIdentification (
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goto Error;
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}
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SdMmcHcInitClockFreq (PciIo, Slot, Private->BaseClkFreq[Slot]);
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SdMmcHcInitClockFreq (PciIo, Slot, Private->BaseClkFreq[Slot], Private->ControllerVersion[Slot]);
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gBS->Stall (1000);
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