diff --git a/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c
index 4086a294da..6fd69658e0 100644
--- a/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c
+++ b/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c
@@ -25,7 +25,7 @@ ArmGicArchLibInitialize (
   // feature is implemented on the CPU. This is also convenient as our GICv3
   // driver requires SRE. If only Memory mapped access is available we try to
   // drive the GIC as a v2.
-  if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
+  if (ArmHasGicSystemRegisters ()) {
     // Make sure System Register access is enabled (SRE). This depends on the
     // higher privilege level giving us permission, otherwise we will either
     // cause an exception here, or the write doesn't stick in which case we need
diff --git a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c
index 222d805982..7e7e46e69f 100644
--- a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c
+++ b/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c
@@ -25,7 +25,7 @@ ArmGicArchLibInitialize (
   // feature is implemented on the CPU. This is also convenient as our GICv3
   // driver requires SRE. If only Memory mapped access is available we try to
   // drive the GIC as a v2.
-  if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
+  if (ArmHasGicSystemRegisters ()) {
     // Make sure System Register access is enabled (SRE). This depends on the
     // higher privilege level giving us permission, otherwise we will either
     // cause an exception here, or the write doesn't stick in which case we need
diff --git a/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c
index 4f2479e70c..ca81951b2b 100644
--- a/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c
+++ b/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c
@@ -23,7 +23,7 @@ ArmGicGetSupportedArchRevision (
   // feature is implemented on the CPU. This is also convenient as our GICv3
   // driver requires SRE. If only Memory mapped access is available we try to
   // drive the GIC as a v2.
-  if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
+  if (ArmHasGicSystemRegisters ()) {
     // Make sure System Register access is enabled (SRE). This depends on the
     // higher privilege level giving us permission, otherwise we will either
     // cause an exception here, or the write doesn't stick in which case we need
diff --git a/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c
index 8e1baeee20..2373ca409a 100644
--- a/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c
+++ b/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c
@@ -23,7 +23,7 @@ ArmGicGetSupportedArchRevision (
   // feature is implemented on the CPU. This is also convenient as our GICv3
   // driver requires SRE. If only Memory mapped access is available we try to
   // drive the GIC as a v2.
-  if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
+  if (ArmHasGicSystemRegisters ()) {
     // Make sure System Register access is enabled (SRE). This depends on the
     // higher privilege level giving us permission, otherwise we will either
     // cause an exception here, or the write doesn't stick in which case we need