IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support.

If IOMMU is enabled, the legacy BIOS need allow the legacy memory
access by the legacy device.
The legacy memory is below 1M memory and HighPmm memory.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 60794ee6b0)
This commit is contained in:
Jiewen Yao
2017-09-04 09:28:26 +08:00
committed by Star Zeng
parent 332b4e030e
commit b7fc17ce1f
3 changed files with 73 additions and 1 deletions

View File

@ -137,6 +137,7 @@
gEfiLegacyBiosProtocolGuid ## PRODUCES gEfiLegacyBiosProtocolGuid ## PRODUCES
gEfiSerialIoProtocolGuid ## CONSUMES gEfiSerialIoProtocolGuid ## CONSUMES
gEfiSioProtocolGuid ## CONSUMES gEfiSioProtocolGuid ## CONSUMES
gEdkiiIoMmuProtocolGuid ## CONSUMES
[Pcd] [Pcd]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion ## CONSUMES gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion ## CONSUMES

View File

@ -47,6 +47,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Protocol/PciRootBridgeIo.h> #include <Protocol/PciRootBridgeIo.h>
#include <Protocol/SerialIo.h> #include <Protocol/SerialIo.h>
#include <Protocol/SuperIo.h> #include <Protocol/SuperIo.h>
#include <Protocol/IoMmu.h>
#include <Library/BaseLib.h> #include <Library/BaseLib.h>
#include <Library/DebugLib.h> #include <Library/DebugLib.h>

View File

@ -41,7 +41,7 @@ BOOLEAN mIgnoreBbsUpdateFlag;
BOOLEAN mVgaInstallationInProgress = FALSE; BOOLEAN mVgaInstallationInProgress = FALSE;
UINT32 mRomCount = 0x00; UINT32 mRomCount = 0x00;
ROM_INSTANCE_ENTRY mRomEntry[ROM_MAX_ENTRIES]; ROM_INSTANCE_ENTRY mRomEntry[ROM_MAX_ENTRIES];
EDKII_IOMMU_PROTOCOL *mIoMmu;
/** /**
Query shadowed legacy ROM parameters registered by RomShadow() previously. Query shadowed legacy ROM parameters registered by RomShadow() previously.
@ -2696,6 +2696,61 @@ Done:
return Status; return Status;
} }
/**
Let IOMMU grant DMA access for the PCI device.
@param PciHandle The EFI handle for the PCI device.
@param HostAddress The system memory address to map to the PCI controller.
@param NumberOfBytes The number of bytes to map.
@retval EFI_SUCCESS The DMA access is granted.
**/
EFI_STATUS
IoMmuGrantAccess (
IN EFI_HANDLE PciHandle,
IN EFI_PHYSICAL_ADDRESS HostAddress,
IN UINTN NumberOfBytes
)
{
EFI_PHYSICAL_ADDRESS DeviceAddress;
VOID *Mapping;
EFI_STATUS Status;
if (PciHandle == NULL) {
return EFI_UNSUPPORTED;
}
Status = EFI_SUCCESS;
if (mIoMmu == NULL) {
gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmu);
}
if (mIoMmu != NULL) {
Status = mIoMmu->Map (
mIoMmu,
EdkiiIoMmuOperationBusMasterCommonBuffer,
(VOID *)(UINTN)HostAddress,
&NumberOfBytes,
&DeviceAddress,
&Mapping
);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuMap - %r\n", Status));
} else {
ASSERT (DeviceAddress == HostAddress);
Status = mIoMmu->SetAttribute (
mIoMmu,
PciHandle,
Mapping,
EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuSetAttribute - %r\n", Status));
}
}
}
return Status;
}
/** /**
Load a legacy PC-AT OPROM on the PciHandle device. Return information Load a legacy PC-AT OPROM on the PciHandle device. Return information
about how many disks were added by the OPROM and the shadow address and about how many disks were added by the OPROM and the shadow address and
@ -2978,6 +3033,21 @@ LegacyBiosInstallPciRom (
RuntimeImageLength = Pcir->MaxRuntimeImageLength * 512; RuntimeImageLength = Pcir->MaxRuntimeImageLength * 512;
} }
} }
//
// Grant access for below 1M
// BDA/EBDA/LowPMM and scratch memory for OPROM.
//
IoMmuGrantAccess (PciHandle, 0, SIZE_1MB);
//
// Grant access for HiPmm
//
IoMmuGrantAccess (
PciHandle,
Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemory,
Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemorySizeInBytes
);
// //
// Shadow and initialize the OpROM. // Shadow and initialize the OpROM.
// //