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UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism

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Introduce page table pool mechanism for smm page table to simplify
page table memory management and protection. This mechanism has been
used in DxeIpl. The basic idea is to allocate a bunch of continuous
pages of memory in advance, and all future page tables consumption
will happen in those pool instead of system memory.
Since we have centralized page tables, we only need to mark all page
table pools as RO, instead of searching page table memory layer by
layer in smm page table. Once current page table pool has been used
up, another memory pool will be allocated and the new pool will also
be set as RO if current page table memory has been marked as RO.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
duntan
2022-12-21 12:21:54 +08:00
committed by mergify[bot]
parent 0b633b1494
commit b822be1a20
5 changed files with 172 additions and 66 deletions
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31
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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@@ -260,12 +260,43 @@ extern UINTN mNumberOfCpus;
extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
extern EFI_MM_MP_PROTOCOL mSmmMp;
extern BOOLEAN m5LevelPagingNeeded;
extern BOOLEAN mIsReadOnlyPageTable;
///
/// The mode of the CPU at the time an SMI occurs
///
extern UINT8 mSmmSaveStateRegisterLma;
#define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB
#define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB
#define PAGE_TABLE_POOL_UNIT_PAGES EFI_SIZE_TO_PAGES (PAGE_TABLE_POOL_UNIT_SIZE)
#define PAGE_TABLE_POOL_ALIGN_MASK \
(~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
typedef struct {
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
} PAGE_TABLE_POOL;
/**
Disable CET.
**/
VOID
EFIAPI
DisableCet (
VOID
);
/**
Enable CET.
**/
VOID
EFIAPI
EnableCet (
VOID
);
//
// SMM CPU Protocol function prototypes.
//