sravan/system76-edk2
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Move microcode to offset 0 of BIOS region.

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Move microcode, whose address is fixed by SEC binary, to offset 0 of BIOS region.  

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mang Guo <mang.guo@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17224 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Mang Guo
2015-04-28 03:31:12 +00:00
committed by zwei4
parent c8c48cbb19
commit b9459211df
5 changed files with 48 additions and 61 deletions
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7
Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
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@@ -584,8 +584,8 @@
[PcdsFixedAtBuild.common]
!if $(MINNOW2_FSP_BUILD) == TRUE
# $(FLASH_REGION_VLVMICROCODE_BASE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFDD0000
# $(FLASH_REGION_VLVMICROCODE_BASE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFD00000
# $(FLASH_REGION_VLVMICROCODE_SIZE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x00030000
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x60
@@ -594,7 +594,8 @@
# $(FLASH_AREA_SIZE)
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
# $(FLASH_REGION_FSPBIN_BASE)
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFD80000
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
!endif
!if $(PERFORMANCE_ENABLE) == TRUE