ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.
Some AArch64 platforms have RAM and flash devices >4GB. Update some additional Pcd entries to 64-bit, and change the corresponding PcdGet32 calls to PcdGet64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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@@ -131,7 +131,7 @@ PrimaryMain (
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// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
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// the base of the primary core stack
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PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
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TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
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TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
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TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
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// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
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@@ -144,7 +144,7 @@ PrimaryMain (
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = TemporaryRamSize;
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