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UefiPayloadPkg: Add PCI support from DuetPkg

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In coreboot, we mark GPU prefmem above 4GB, because NVIDIA wants a lot
(16GB region on the 30 series), otherwise coreboot will obviously fail
to allocate the resources.

In EDK2, we then end up hitting this assert:

    InitRootBridge: populated root bus 0, with room for 36 subordinate bus(es)
    RootBridge: PciRoot(0x0)
      Support/Attr: 7001F / 7001F
        DmaAbove4G: No
    NoExtConfSpace: No
         AllocAttr: 0 ()
               Bus: 0 - 24 Translation=0
                Io: 1000 - EFFF Translation=0
               Mem: 80400000 - 1001FFFFFF Translation=0
        MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
              PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
       PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
    ASSERT [PciHostBridgeDxe] .../edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c(120): Bridge->Mem.Limit < 0x0000000100000000ULL

So, bring back Pci*NoEnumerationDxe from the deleted DuetPkg, which
doesn't check anything and let's us boot.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2021-10-26 16:36:22 -06:00
parent 61a7f360d9
commit bbc04972bc
36 changed files with 13072 additions and 7 deletions
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46
UefiPayloadPkg/Include/Guid/PciExpressBaseAddress.h Normal file
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/** @file
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PciExpressBaseAddress.h
Abstract:
GUIDs used for PciExpress Base Address
**/
#ifndef _EFI_PCI_EXPRESS_BASE_ADDRESS_H_
#define _EFI_PCI_EXPRESS_BASE_ADDRESS_H_
#define EFI_PCI_EXPRESS_BASE_ADDRESS_GUID \
{ \
0x3677d529, 0x326f, 0x4603, {0xa9, 0x26, 0xea, 0xac, 0xe0, 0x1d, 0xcb, 0xb0} \
}
//
// Following structure defines PCI Express Base Address information.
// This information is platform specific, and built into hob in PEI phase.
// It can be consumed by PEI PCI driver and DXE PCI driver.
//
#pragma pack(1)
typedef struct _EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION {
UINT32 HostBridgeNumber;
UINT32 RootBridgeNumber;
UINT64 PciExpressBaseAddress;
} EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION;
#pragma pack()
extern EFI_GUID gEfiPciExpressBaseAddressGuid;
#endif