EdkCompatibilityPkg: Removing ipf from edk2.

Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
  [Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
  of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.

Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.

Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.

Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.

The following rules are specially proposed by package owner:
* Remove CommonIpf.dsc file.
* Update Common.dsc file, to remove the section with IPF key.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
This commit is contained in:
Chen A Chen
2018-06-29 11:19:34 +08:00
committed by Zhang, Chao B
parent 94d67262d8
commit bc7c34afb1
160 changed files with 128 additions and 17950 deletions

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -41,10 +41,6 @@ COMPONENT_TYPE = LIBRARY
memcpy.c | GCC
memset.c | GCC
[sources.Ipf]
memcpy.c
memset.c
[sources.ARM]
Dummy.c

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -39,13 +39,6 @@ COMPONENT_TYPE = LIBRARY
# x64/memcpy.asm
# x64/memset.asm
[sources.Ipf]
memcpy.c | MSFT
memset.c | MSFT
memcpy.c | INTEL
memset.c | INTEL
memcpy.c | GCC
[sources.ebc]
memcpy.c
memset.c

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -49,9 +49,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
X64/PerformancePrimitives.c
[sources.ipf]
Ipf/PerformancePrimitives.s
[sources.ebc]
Ebc/PerformancePrimitives.c
@@ -89,9 +86,6 @@ COMPONENT_TYPE = LIBRARY
[libraries.x64]
CpuIA32Lib
[libraries.ipf]
CpuIA64Lib
[libraries.ARM]
CompilerIntrinsicsLib

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -49,14 +49,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
X64/PerformancePrimitives.c
[sources.ipf]
Ipf/PerformancePrimitives.s
#
# Only for CYGWINGCC IPF tool chain, EFI_BREAKPOINT and MEMORY_FENCE
# is defined as two functions EcpEfiBreakPoint and EcpMemoryFence.
#
Ipf/AsmCpuMisc.s | GCC
[sources.ebc]
Ebc/PerformancePrimitives.c
@@ -87,7 +79,4 @@ COMPONENT_TYPE = LIBRARY
[libraries.x64]
CpuIA32Lib
[libraries.ipf]
CpuIA64Lib
[nmake.common]

View File

@@ -1,44 +0,0 @@
/// @file
/// Contains an implementation of EcpEfiBreakPoint and EcpMemoryFence on Itanium-based
/// architecture.
///
/// Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AsmCpuMisc.s
///
///
.text
.proc EcpEfiBreakPoint
.type EcpEfiBreakPoint, @function
EcpEfiBreakPoint::
break.i 0;;
br.ret.dpnt b0;;
.endp EcpEfiBreakPoint
.proc EcpMemoryFence
.type EcpMemoryFence, @function
EcpMemoryFence::
mf;; // memory access ordering
// do we need the mf.a also here?
mf.a // wait for any IO to complete?
// not sure if we need serialization here, just put it, in case...
srlz.d;;
srlz.i;;
br.ret.dpnt b0;;
.endp EcpMemoryFence

View File

@@ -1,61 +0,0 @@
//++
// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// PerformancePrimitives.s
//
// Abstract:
//
//
// Revision History:
//
//--
.file "PerformancePrimitives.s"
#include "IpfMacro.i"
//-----------------------------------------------------------------------------
//++
// GetTimerValue
//
// Implementation of CPU-based time service
//
// On Entry :
// EFI_STATUS
// GetTimerValue (
// OUT UINT64 *TimerValue
// )
//
// Return Value:
// r8 = Status
// r9 = 0
// r10 = 0
// r11 = 0
//
// As per static calling conventions.
//
//--
//---------------------------------------------------------------------------
PROCEDURE_ENTRY (GetTimerValue)
NESTED_SETUP (1,8,0,0)
mov r8 = ar.itc;;
st8 [r32]= r8
mov r8 = r0
mov r9 = r0
mov r10 = r0
mov r11 = r0
NESTED_RETURN
PROCEDURE_EXIT (GetTimerValue)
//---------------------------------------------------------------------------

View File

@@ -1,93 +0,0 @@
/*++
Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuFuncs.h
Abstract:
--*/
#ifndef _CPU_FUNCS_H
#define _CPU_FUNCS_H
#define EFI_CPUID_SIGNATURE 0x0
#define EFI_CPUID_VERSION_INFO 0x1
#define EFI_CPUID_CACHE_INFO 0x2
#define EFI_CPUID_SERIAL_NUMBER 0x3
#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000
#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001
#define EFI_CPUID_BRAND_STRING1 0x80000002
#define EFI_CPUID_BRAND_STRING2 0x80000003
#define EFI_CPUID_BRAND_STRING3 0x80000004
#define EFI_MSR_IA32_APIC_BASE 0x1B
#define EFI_MSR_EBC_HARD_POWERON 0x2A
#define EFI_MSR_EBC_SOFT_POWERON 0x2B
#define EFI_MSR_EBC_FREQUENCY_ID 0x2C
#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B
#define EFI_APIC_GLOBAL_ENABLE 0x800
#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200
#define EFI_CACHE_VARIABLE_MTRR_END 0x20F
#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF
#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
#define EFI_CACHE_MTRR_VALID 0x800
#define EFI_CACHE_FIXED_MTRR_VALID 0x400
#define EFI_MSR_VALID_MASK 0xFFFFFFFFF
#define EFI_IA32_MTRR_FIX64K_00000 0x250
#define EFI_IA32_MTRR_FIX16K_80000 0x258
#define EFI_IA32_MTRR_FIX16K_A0000 0x259
#define EFI_IA32_MTRR_FIX4K_C0000 0x268
#define EFI_IA32_MTRR_FIX4K_C8000 0x269
#define EFI_IA32_MTRR_FIX4K_D0000 0x26A
#define EFI_IA32_MTRR_FIX4K_D8000 0x26B
#define EFI_IA32_MTRR_FIX4K_E0000 0x26C
#define EFI_IA32_MTRR_FIX4K_E8000 0x26D
#define EFI_IA32_MTRR_FIX4K_F0000 0x26E
#define EFI_IA32_MTRR_FIX4K_F8000 0x26F
#define EFI_IA32_MCG_CAP 0x179
#define EFI_IA32_MCG_CTL 0x17B
#define EFI_IA32_MC0_CTL 0x400
#define EFI_IA32_MC0_STATUS 0x401
#define EFI_CACHE_UNCACHEABLE 0
#define EFI_CACHE_WRITECOMBINING 1
#define EFI_CACHE_WRITETHROUGH 4
#define EFI_CACHE_WRITEPROTECTED 5
#define EFI_CACHE_WRITEBACK 6
UINT64
EfiReadTsc (
VOID
)
/*++
Routine Description:
Read Time stamp.
Arguments:
None
Returns:
Return the read data
--*/
;
#endif

View File

@@ -1,119 +0,0 @@
/*++
Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
ProcDep.h
Abstract:
IPF specific Runtime Lib code. IPF has a SAL API that does not
exit on IA-32. Thus
--*/
#ifndef _PROC_DEP_H_
#define _PROC_DEP_H_
#include EFI_PROTOCOL_DEFINITION (ExtendedSalGuid)
#include EFI_PROTOCOL_DEFINITION (ExtendedSalBootService)
#include "SalApi.h"
EFI_STATUS
RegisterEsalFunction (
IN UINT64 FunctionId,
IN EFI_GUID *ClassGuid,
IN SAL_INTERNAL_EXTENDED_SAL_PROC Function,
IN VOID *ModuleGlobal
)
/*++
Routine Description:
Register ESAL Class Function and it's asociated global.
This function is boot service only!
Arguments:
FunctionId - ID of function to register
ClassGuid - GUID of function class
Function - Function to register under ClassGuid/FunctionId pair
ModuleGlobal - Module global for Function.
Returns:
EFI_SUCCESS - If ClassGuid/FunctionId Function was registered.
--*/
;
EFI_STATUS
RegisterEsalClass (
IN EFI_GUID *ClassGuid,
IN VOID *ModuleGlobal,
...
)
/*++
Routine Description:
Register ESAL Class and it's asociated global.
This function is boot service only!
Arguments:
ClassGuid - GUID of function class
ModuleGlobal - Module global for Function.
.. - SAL_INTERNAL_EXTENDED_SAL_PROC and FunctionId pairs. NULL
indicates the end of the list.
Returns:
EFI_SUCCESS - All members of ClassGuid registered
--*/
;
SAL_RETURN_REGS
EfiCallEsalService (
IN EFI_GUID *ClassGuid,
IN UINT64 FunctionId,
IN UINT64 Arg2,
IN UINT64 Arg3,
IN UINT64 Arg4,
IN UINT64 Arg5,
IN UINT64 Arg6,
IN UINT64 Arg7,
IN UINT64 Arg8
)
/*++
Routine Description:
Call module that is not linked direclty to this module. This code is IP
relative and hides the binding issues of virtual or physical calling. The
function that gets dispatched has extra arguments that include the registered
module global and a boolean flag to indicate if the system is in virutal mode.
Arguments:
ClassGuid - GUID of function
FunctionId - Function in ClassGuid to call
Arg2 - Argument 2 ClassGuid/FunctionId defined
Arg3 - Argument 3 ClassGuid/FunctionId defined
Arg4 - Argument 4 ClassGuid/FunctionId defined
Arg5 - Argument 5 ClassGuid/FunctionId defined
Arg6 - Argument 6 ClassGuid/FunctionId defined
Arg7 - Argument 7 ClassGuid/FunctionId defined
Arg8 - Argument 8 ClassGuid/FunctionId defined
Returns:
Status of ClassGuid/FuncitonId
--*/
;
#endif

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -113,11 +113,6 @@ Abstract:
#ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__
#define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__
#endif
#ifdef MDE_CPU_IPF // IPF
#ifndef __EDKII_GLUE_EDK_DXE_SAL_LIB__
#define __EDKII_GLUE_EDK_DXE_SAL_LIB__
#endif
#endif // IPF
#endif
//
@@ -266,15 +261,10 @@ Abstract:
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#endif
#elif defined(MDE_CPU_IPF)
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#endif
#endif
//
// If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ or
// __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__ can be
// replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
// can be replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
//
#endif
@@ -406,15 +396,10 @@ Abstract:
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#endif
#elif defined(MDE_CPU_IPF)
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#endif
#endif
//
// If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ or
// __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__ can be
// replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
// can be replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
//
#endif
@@ -435,15 +420,10 @@ Abstract:
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#endif
#elif defined(MDE_CPU_IPF)
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#endif
#endif
//
// If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ or
// __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__ can be
// replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
// can be replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
//
#endif
@@ -458,15 +438,10 @@ Abstract:
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__
#endif
#elif defined(MDE_CPU_IPF)
#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__
#endif
#endif
//
// If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ or
// __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_KR1__ can be
// replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
// can be replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__
//
#endif

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -148,14 +148,4 @@ Abstract:
| REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED \
)
//
// for IPF only
// The base address of IPF IO Block
//
#ifdef MDE_CPU_IPF
#ifndef EDKII_GLUE_IoBlockBaseAddressForIpf
#define EDKII_GLUE_IoBlockBaseAddressForIpf 0x0ffffc000000
#endif
#endif
#endif

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -47,13 +47,6 @@ Abstract:
#include "EfiStatusCode.h"
#include "EfiPerf.h"
//
// IPF only
//
#ifdef MDE_CPU_IPF
#include "SalApi.h"
#endif
//
// GUID definitions
//
@@ -229,14 +222,6 @@ Abstract:
#include EFI_ARCH_PROTOCOL_DEFINITION (VariableWrite)
#include EFI_ARCH_PROTOCOL_DEFINITION (WatchdogTimer)
//
// IPF only
//
#ifdef MDE_CPU_IPF
#include EFI_PROTOCOL_DEFINITION (ExtendedSalGuid)
#include EFI_PROTOCOL_DEFINITION (ExtendedSalBootService)
#endif
//
// EDK Library headers used by EDKII Glue Libraries
//

View File

@@ -1,73 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EdkIIGlueProcessorBind.h
Abstract:
Processor specific definitions
--*/
#ifndef __EDKII_GLUE_PROCESSOR_BIND_H__
#define __EDKII_GLUE_PROCESSOR_BIND_H__
//
// The Microsoft* C compiler can removed references to unreferenced data items
// if the /OPT:REF linker option is used. We defined a macro as this is a
// a non standard extension
//
#if defined(_MSC_EXTENSIONS)
#define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
#else
#define GLOBAL_REMOVE_IF_UNREFERENCED
#endif
#if !defined(MDE_CPU_IPF)
#define MDE_CPU_IPF
#endif
//
// IPF Specific Functions
//
typedef struct {
UINT64 Status;
UINT64 r9;
UINT64 r10;
UINT64 r11;
} PAL_CALL_RETURN;
#define EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_LO 0x4871260ec1a74056
#define EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_HI 0x116e5ba645e631a0
#define EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_LO 0x4d02efdb7e97a470
#define EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_HI 0x96a27bd29061ce8f
#define EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_LO 0x4370c6414ecb6c53
#define EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_HI 0x78836e490e3bb28c
#define EFI_EXTENDED_SAL_MTC_SERVICES_PROTOCOL_GUID_LO 0x408b75e8899afd18
#define EFI_EXTENDED_SAL_MTC_SERVICES_PROTOCOL_GUID_HI 0x54f4cd7e2e6e1aa4
#define EFI_EXTENDED_SAL_RESET_SERVICES_PROTOCOL_GUID_LO 0x46f58ce17d019990
#define EFI_EXTENDED_SAL_RESET_SERVICES_PROTOCOL_GUID_HI 0xa06a6798513c76a7
//
// Per the Itanium Software Conventions and Runtime Architecture Guide,
// section 3.3.4, IPF stack must always be 16-byte aligned.
//
#define CPU_STACK_ALIGNMENT 16
#endif

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -23,10 +23,6 @@ Abstract:
#ifndef __EDKII_GLUE_DXE_RUNTIME_DRIVER_LIB_H__
#define __EDKII_GLUE_DXE_RUNTIME_DRIVER_LIB_H__
#ifdef MDE_CPU_IPF
#include "EdkIIGlueEdkDxeSalLib.h"
#endif
#if (EFI_SPECIFICATION_VERSION < 0x00020000)
typedef struct {

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -28,15 +28,5 @@ Abstract:
// Override these through compiler option "/D" in PlatformTools.env if needed
//
//
// IoBlockBaseAddressForIpf Pcd
//
#ifdef MDE_CPU_IPF
#ifndef __EDKII_GLUE_PCD_PcdIoBlockBaseAddressForIpf__
#define __EDKII_GLUE_PCD_PcdIoBlockBaseAddressForIpf__ EDKII_GLUE_IoBlockBaseAddressForIpf
#endif
#endif
#include "Pcd/EdkIIGluePcd.h"
#endif

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,9 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
X86Cache.c
[sources.ipf]
IpfCache.c
[sources.ebc]
EbcCache.c
@@ -71,11 +68,8 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D MDE_CPU_EBC

View File

@@ -1,245 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
x86Cache.c
Abstract:
Cache Maintenance Functions.
--*/
#include "EdkIIGlueBase.h"
/**
Invalidates the entire instruction cache in cache coherency domain of the
calling CPU.
Invalidates the entire instruction cache in cache coherency domain of the
calling CPU.
**/
VOID
EFIAPI
GlueInvalidateInstructionCache (
VOID
)
{
PalCallStatic (NULL, 1, 1, 1, 0);
}
/**
Invalidates a range of instruction cache lines in the cache coherency domain
of the calling CPU.
Invalidates the instruction cache lines specified by Address and Length. If
Address is not aligned on a cache line boundary, then entire instruction
cache line containing Address is invalidated. If Address + Length is not
aligned on a cache line boundary, then the entire instruction cache line
containing Address + Length -1 is invalidated. This function may choose to
invalidate the entire instruction cache if that is more efficient than
invalidating the specified range. If Length is 0, the no instruction cache
lines are invalidated. Address is returned.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@param Address The base address of the instruction cache lines to
invalidate. If the CPU is in a physical addressing mode, then
Address is a physical address. If the CPU is in a virtual
addressing mode, then Address is a virtual address.
@param Length The number of bytes to invalidate from the instruction cache.
@return Address
**/
VOID *
EFIAPI
InvalidateInstructionCacheRange (
IN VOID *Address,
IN UINTN Length
)
{
return AsmFlushCacheRange (Address, Length);
}
/**
Writes Back and Invalidates the entire data cache in cache coherency domain
of the calling CPU.
Writes Back and Invalidates the entire data cache in cache coherency domain
of the calling CPU. This function guarantees that all dirty cache lines are
written back to system memory, and also invalidates all the data cache lines
in the cache coherency domain of the calling CPU.
**/
VOID
EFIAPI
WriteBackInvalidateDataCache (
VOID
)
{
PalCallStatic (NULL, 1, 2, 1, 0);
}
/**
Writes Back and Invalidates a range of data cache lines in the cache
coherency domain of the calling CPU.
Writes Back and Invalidate the data cache lines specified by Address and
Length. If Address is not aligned on a cache line boundary, then entire data
cache line containing Address is written back and invalidated. If Address +
Length is not aligned on a cache line boundary, then the entire data cache
line containing Address + Length -1 is written back and invalidated. This
function may choose to write back and invalidate the entire data cache if
that is more efficient than writing back and invalidating the specified
range. If Length is 0, the no data cache lines are written back and
invalidated. Address is returned.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@param Address The base address of the data cache lines to write back and
invalidate. If the CPU is in a physical addressing mode, then
Address is a physical address. If the CPU is in a virtual
addressing mode, then Address is a virtual address.
@param Length The number of bytes to write back and invalidate from the
data cache.
@return Address
**/
VOID *
EFIAPI
WriteBackInvalidateDataCacheRange (
IN VOID *Address,
IN UINTN Length
)
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return AsmFlushCacheRange (Address, Length);
}
/**
Writes Back the entire data cache in cache coherency domain of the calling
CPU.
Writes Back the entire data cache in cache coherency domain of the calling
CPU. This function guarantees that all dirty cache lines are written back to
system memory. This function may also invalidate all the data cache lines in
the cache coherency domain of the calling CPU.
**/
VOID
EFIAPI
WriteBackDataCache (
VOID
)
{
PalCallStatic (NULL, 1, 2, 0, 0);
}
/**
Writes Back a range of data cache lines in the cache coherency domain of the
calling CPU.
Writes Back the data cache lines specified by Address and Length. If Address
is not aligned on a cache line boundary, then entire data cache line
containing Address is written back. If Address + Length is not aligned on a
cache line boundary, then the entire data cache line containing Address +
Length -1 is written back. This function may choose to write back the entire
data cache if that is more efficient than writing back the specified range.
If Length is 0, the no data cache lines are written back. This function may
also invalidate all the data cache lines in the specified range of the cache
coherency domain of the calling CPU. Address is returned.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@param Address The base address of the data cache lines to write back. If
the CPU is in a physical addressing mode, then Address is a
physical address. If the CPU is in a virtual addressing
mode, then Address is a virtual address.
@param Length The number of bytes to write back from the data cache.
@return Address
**/
VOID *
EFIAPI
WriteBackDataCacheRange (
IN VOID *Address,
IN UINTN Length
)
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return AsmFlushCacheRange (Address, Length);
}
/**
Invalidates the entire data cache in cache coherency domain of the calling
CPU.
Invalidates the entire data cache in cache coherency domain of the calling
CPU. This function must be used with care because dirty cache lines are not
written back to system memory. It is typically used for cache diagnostics. If
the CPU does not support invalidation of the entire data cache, then a write
back and invalidate operation should be performed on the entire data cache.
**/
VOID
EFIAPI
InvalidateDataCache (
VOID
)
{
WriteBackInvalidateDataCache ();
}
/**
Invalidates a range of data cache lines in the cache coherency domain of the
calling CPU.
Invalidates the data cache lines specified by Address and Length. If Address
is not aligned on a cache line boundary, then entire data cache line
containing Address is invalidated. If Address + Length is not aligned on a
cache line boundary, then the entire data cache line containing Address +
Length -1 is invalidated. This function must never invalidate any cache lines
outside the specified range. If Length is 0, the no data cache lines are
invalidated. Address is returned. This function must be used with care
because dirty cache lines are not written back to system memory. It is
typically used for cache diagnostics. If the CPU does not support
invalidation of a data cache range, then a write back and invalidate
operation should be performed on the data cache range.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@param Address The base address of the data cache lines to invalidate. If
the CPU is in a physical addressing mode, then Address is a
physical address. If the CPU is in a virtual addressing mode,
then Address is a virtual address.
@param Length The number of bytes to invalidate from the data cache.
@return Address
**/
VOID *
EFIAPI
InvalidateDataCacheRange (
IN VOID *Address,
IN UINTN Length
)
{
return AsmFlushCacheRange (Address, Length);
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
[includes.common]
@@ -70,9 +68,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -39,10 +39,6 @@ COMPONENT_TYPE = LIBRARY
IoLibIcc.c | INTEL
IoLib.c
[sources.ipf]
IoLibIpf.c
IoHighLevel.c
[sources.ebc]
# doesn't support EBC
@@ -80,9 +76,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,490 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
IoLibIpf.c
Abstract:
--*/
#include "EdkIIGlueBase.h"
#define BIT63 0x8000000000000000UL
#define MAP_PORT_BASE_TO_MEM(_Port) \
((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))
/**
Reads a 8-bit I/O port.
Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
@param Port The I/O port to read.
@return The value read.
**/
UINT8
EFIAPI
IoRead8 (
IN UINT64 Port
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioRead8 (Address);
}
/**
Reads a 16-bit I/O port.
Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
@param Port The I/O port to read.
@return The value read.
**/
UINT16
EFIAPI
IoRead16 (
IN UINT64 Port
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioRead16 (Address);
}
/**
Reads a 32-bit I/O port.
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
@param Port The I/O port to read.
@return The value read.
**/
UINT32
EFIAPI
IoRead32 (
IN UINT64 Port
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioRead32 (Address);
}
/**
Reads a 64-bit I/O port.
Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
If 64-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
UINT64
EFIAPI
IoRead64 (
IN UINTN Port
)
{
ASSERT (FALSE);
return 0;
}
/**
Writes a 8-bit I/O port.
Writes the 8-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT8
EFIAPI
IoWrite8 (
IN UINT64 Port,
IN UINT8 Data
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioWrite8 (Address, Data);
}
/**
Writes a 16-bit I/O port.
Writes the 16-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT16
EFIAPI
IoWrite16 (
IN UINT64 Port,
IN UINT16 Data
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioWrite16 (Address, Data);
}
/**
Writes a 32-bit I/O port.
Writes the 32-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT32
EFIAPI
IoWrite32 (
IN UINT64 Port,
IN UINT32 Data
)
{
UINT64 Address;
//
// Add the 64MB aligned IO Port space to the IO address
//
Address = MAP_PORT_BASE_TO_MEM (Port);
Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
return MmioWrite32 (Address, Data);
}
/**
Writes a 64-bit I/O port.
Writes the 64-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
If 64-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT64
EFIAPI
IoWrite64 (
IN UINTN Port,
IN UINT64 Value
)
{
ASSERT (FALSE);
return 0;
}
/**
Reads a 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
@param Address The MMIO register to read.
@return The value read.
**/
UINT8
EFIAPI
MmioRead8 (
IN UINT64 Address
)
{
UINT8 Data;
Address |= BIT63;
MemoryFence ();
Data = *((volatile UINT8 *) Address);
MemoryFence ();
return Data;
}
/**
Reads a 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
@param Address The MMIO register to read.
@return The value read.
**/
UINT16
EFIAPI
MmioRead16 (
IN UINT64 Address
)
{
UINT16 Data;
Address |= BIT63;
MemoryFence ();
Data = *((volatile UINT16 *) Address);
MemoryFence ();
return Data;
}
/**
Reads a 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
@param Address The MMIO register to read.
@return The value read.
**/
UINT32
EFIAPI
MmioRead32 (
IN UINT64 Address
)
{
UINT32 Data;
Address |= BIT63;
MemoryFence ();
Data = *((volatile UINT32 *) Address);
MemoryFence ();
return Data;
}
/**
Reads a 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
@param Address The MMIO register to read.
@return The value read.
**/
UINT64
EFIAPI
MmioRead64 (
IN UINT64 Address
)
{
UINT64 Data;
Address |= BIT63;
MemoryFence ();
Data = *((volatile UINT64 *) Address);
MemoryFence ();
return Data;
}
/**
Writes a 8-bit MMIO register.
Writes the 8-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
@param Address The MMIO register to write.
@param Data The value to write to the MMIO register.
@return The value written the memory address.
**/
UINT8
EFIAPI
MmioWrite8 (
IN UINT64 Address,
IN UINT8 Data
)
{
Address |= BIT63;
MemoryFence ();
*((volatile UINT8 *) Address) = Data;
MemoryFence ();
return Data;
}
/**
Writes a 16-bit MMIO register.
Writes the 16-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
@param Address The MMIO register to write.
@param Data The value to write to the MMIO register.
@return The value written the memory address.
**/
UINT16
EFIAPI
MmioWrite16 (
IN UINT64 Address,
IN UINT16 Data
)
{
Address |= BIT63;
MemoryFence ();
*((volatile UINT16 *) Address) = Data;
MemoryFence ();
return Data;
}
/**
Writes a 32-bit MMIO register.
Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
@param Address The MMIO register to write.
@param Data The value to write to the MMIO register.
@return The value written the memory address.
**/
UINT32
EFIAPI
MmioWrite32 (
IN UINT64 Address,
IN UINT32 Data
)
{
Address |= BIT63;
MemoryFence ();
*((volatile UINT32 *) Address) = Data;
MemoryFence ();
return Data;
}
/**
Writes a 64-bit MMIO register.
Writes the 64-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
@param Address The MMIO register to write.
@param Data The value to write to the MMIO register.
@return The value written the memory address.
**/
UINT64
EFIAPI
MmioWrite64 (
IN UINT64 Address,
IN UINT64 Data
)
{
Address |= BIT63;
MemoryFence ();
*((volatile UINT64 *) Address) = Data;
MemoryFence ();
return Data;
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -560,39 +560,6 @@ COMPONENT_TYPE = LIBRARY
SynchronizationGcc.c | GCC
ChkStkGcc.c | GCC
[Sources.IPF]
Ipf/asm.h
Ipf/ia_64gen.h
Ipf/PalCallStatic.s
Ipf/setjmp.s
Ipf/longjmp.s
Ipf/SwitchStack.s
Ipf/Unaligned.c
Ipf/InterlockedCompareExchange32.s
Ipf/InterlockedCompareExchange64.s
Ipf/Synchronization.c
Ipf/CpuPause.s
Ipf/CpuFlushTlb.s
Ipf/GetInterruptState.s
Ipf/InternalSwitchStack.c
Ipf/FlushCacheRange.s
Ipf/AccessDbr.s
Ipf/AccessEicr.s
Ipf/AccessGcr.s
Ipf/AccessKr.s
Ipf/AccessPmr.s
Ipf/AccessPsr.s
Ipf/AsmPalCall.s
Ipf/ExecFc.s
Ipf/ReadCpuid.s
Ipf/AccessGp.s
Math64.c
Ipf/CpuBreakpoint.c | INTEL
Ipf/CpuBreakpointMsc.c | MSFT
Synchronization.c | INTEL
SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC
[sources.ebc]
Math64.c
Unaligned.c
@@ -648,11 +615,8 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D MDE_CPU_EBC

View File

@@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -831,44 +831,6 @@ InternalX86DisablePaging64 (
IN UINT32 NewStack
);
#elif defined (MDE_CPU_IPF)
//
//
// IPF specific functions
//
/**
Transfers control to a function starting with a new stack.
Transfers control to the function specified by EntryPoint using the new stack
specified by NewStack and passing in the parameters specified by Context1 and
Context2. Context1 and Context2 are optional and may be NULL. The function
EntryPoint must never return.
If EntryPoint is NULL, then ASSERT().
If NewStack is NULL, then ASSERT().
@param EntryPoint A pointer to function to call with the new stack.
@param Context1 A pointer to the context to pass into the EntryPoint
function.
@param Context2 A pointer to the context to pass into the EntryPoint
function.
@param NewStack A pointer to the new stack to use for the EntryPoint
function.
@param NewBsp A pointer to the new memory location for RSE backing
store.
**/
VOID
EFIAPI
AsmSwitchStackAndBackingStore (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
IN VOID *Context1, OPTIONAL
IN VOID *Context2, OPTIONAL
IN VOID *NewStack,
IN VOID *NewBsp
);
#else
#endif

View File

@@ -1,117 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessDbr.s
///
///
/// IPF specific Debug Breakpoint Registers accessing functions
///
//---------------------------------------------------------------------------------
//++
// AsmReadDbr
//
// This routine is used to Reads the current value of Data Breakpoint Register (DBR).
//
// Arguments :
//
// On Entry : The 8-bit DBR index to read.
//
// Return Value: The current value of DBR by Index.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadDbr, @function
.proc AsmReadDbr
.regstk 1, 0, 0, 0
AsmReadDbr::
mov r8 = dbr[in0];;
br.ret.dpnt b0;;
.endp AsmReadDbr
//---------------------------------------------------------------------------------
//++
// AsmWriteDbr
//
// This routine is used to write the current value to Data Breakpoint Register (DBR).
//
// Arguments :
//
// On Entry : The 8-bit DBR index to read.
// The value should be written to DBR
//
// Return Value: The value written to DBR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteDbr, @function
.proc AsmWriteDbr
.regstk 2, 0, 0, 0
AsmWriteDbr::
mov dbr[in0] = in1
mov r8 = in1;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteDbr
//---------------------------------------------------------------------------------
//++
// AsmReadIbr
//
// This routine is used to Reads the current value of Instruction Breakpoint Register (IBR).
//
// Arguments :
//
// On Entry : The 8-bit IBR index.
//
// Return Value: The current value of IBR by Index.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIbr, @function
.proc AsmReadIbr
.regstk 1, 0, 0, 0
AsmReadIbr::
mov r8 = ibr[in0];;
br.ret.dpnt b0;;
.endp AsmReadIbr
//---------------------------------------------------------------------------------
//++
// AsmWriteIbr
//
// This routine is used to write the current value to Instruction Breakpoint Register (IBR).
//
// Arguments :
//
// On Entry : The 8-bit IBR index.
// The value should be written to IBR
//
// Return Value: The value written to IBR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteIbr, @function
.proc AsmWriteIbr
.regstk 2, 0, 0, 0
AsmWriteIbr::
mov ibr[in0] = in1
mov r8 = in1;;
srlz.i;;
br.ret.dpnt b0;;
.endp AsmWriteIbr

View File

@@ -1,511 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessEicr.s
///
///
/// IPF specific External Interrupt Control Registers accessing functions
///
//---------------------------------------------------------------------------------
//++
// AsmReadLid
//
// This routine is used to read the value of Local Interrupt ID Register (LID).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of LID.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadLid, @function
.proc AsmReadLid
AsmReadLid::
mov r8 = cr.lid;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmReadLid
//---------------------------------------------------------------------------------
//++
// AsmWriteLid
//
// This routine is used to write the value to Local Interrupt ID Register (LID).
//
// Arguments :
//
// On Entry : The value need to be written to LID.
//
// Return Value: The value written to LID.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteLid, @function
.proc AsmWriteLid
.regstk 1, 0, 0, 0
AsmWriteLid::
mov cr.lid = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteLid
//---------------------------------------------------------------------------------
//++
// AsmReadIvr
//
// This routine is used to read the value of External Interrupt Vector Register (IVR).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IVR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIvr, @function
.proc AsmReadIvr
AsmReadIvr::
mov r8 = cr.ivr;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmReadIvr
//---------------------------------------------------------------------------------
//++
// AsmReadTpr
//
// This routine is used to read the value of Task Priority Register (TPR).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of TPR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadTpr, @function
.proc AsmReadTpr
AsmReadTpr::
mov r8 = cr.tpr;;
br.ret.dpnt b0;;
.endp AsmReadTpr
//---------------------------------------------------------------------------------
//++
// AsmWriteTpr
//
// This routine is used to write the value to Task Priority Register (TPR).
//
// Arguments :
//
// On Entry : The value need to be written to TPR.
//
// Return Value: The value written to TPR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteTpr, @function
.proc AsmWriteTpr
.regstk 1, 0, 0, 0
AsmWriteTpr::
mov cr.tpr = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteTpr
//---------------------------------------------------------------------------------
//++
// AsmWriteEoi
//
// This routine is used to write the value to End of External Interrupt Register (EOI).
//
// Arguments :
//
// On Entry : The value need to be written to EOI.
//
// Return Value: The value written to EOI.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteEoi, @function
.proc AsmWriteEoi
AsmWriteEoi::
mov cr.eoi = r0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteEoi
//---------------------------------------------------------------------------------
//++
// AsmReadIrr0
//
// This routine is used to Read the value of External Interrupt Request Register 0 (IRR0).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IRR0.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIrr0, @function
.proc AsmReadIrr0
AsmReadIrr0::
mov r8 = cr.irr0;;
br.ret.dpnt b0;;
.endp AsmReadIrr0
//---------------------------------------------------------------------------------
//++
// AsmReadIrr1
//
// This routine is used to Read the value of External Interrupt Request Register 1 (IRR1).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IRR1.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIrr1, @function
.proc AsmReadIrr1
AsmReadIrr1::
mov r8 = cr.irr1;;
br.ret.dpnt b0;;
.endp AsmReadIrr1
//---------------------------------------------------------------------------------
//++
// AsmReadIrr2
//
// This routine is used to Read the value of External Interrupt Request Register 2 (IRR2).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IRR2.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIrr2, @function
.proc AsmReadIrr2
AsmReadIrr2::
mov r8 = cr.irr2;;
br.ret.dpnt b0;;
.endp AsmReadIrr2
//---------------------------------------------------------------------------------
//++
// AsmReadIrr3
//
// This routine is used to Read the value of External Interrupt Request Register 3 (IRR3).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IRR3.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIrr3, @function
.proc AsmReadIrr3
AsmReadIrr3::
mov r8 = cr.irr3;;
br.ret.dpnt b0;;
.endp AsmReadIrr3
//---------------------------------------------------------------------------------
//++
// AsmReadItv
//
// This routine is used to Read the value of Interval Timer Vector Register (ITV).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of ITV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadItv, @function
.proc AsmReadItv
AsmReadItv::
mov r8 = cr.itv;;
br.ret.dpnt b0;;
.endp AsmReadItv
//---------------------------------------------------------------------------------
//++
// AsmWriteItv
//
// This routine is used to write the value to Interval Timer Vector Register (ITV).
//
// Arguments :
//
// On Entry : The value need to be written to ITV
//
// Return Value: The value written to ITV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteItv, @function
.proc AsmWriteItv
.regstk 1, 0, 0, 0
AsmWriteItv::
mov cr.itv = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteItv
//---------------------------------------------------------------------------------
//++
// AsmReadPmv
//
// This routine is used to Read the value of Performance Monitoring Vector Register (PMV).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of PMV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadPmv, @function
.proc AsmReadPmv
AsmReadPmv::
mov r8 = cr.pmv;;
br.ret.dpnt b0;;
.endp AsmReadPmv
//---------------------------------------------------------------------------------
//++
// AsmWritePmv
//
// This routine is used to write the value to Performance Monitoring Vector Register (PMV).
//
// Arguments :
//
// On Entry : The value need to be written to PMV
//
// Return Value: The value written to PMV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWritePmv, @function
.proc AsmWritePmv
.regstk 1, 0, 0, 0
AsmWritePmv::
mov cr.pmv = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWritePmv
//---------------------------------------------------------------------------------
//++
// AsmReadCmcv
//
// This routine is used to Read the value of Corrected Machine Check Vector Register (CMCV).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of CMCV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadCmcv, @function
.proc AsmReadCmcv
AsmReadCmcv::
mov r8 = cr.cmcv;;
br.ret.dpnt b0;;
.endp AsmReadCmcv
//---------------------------------------------------------------------------------
//++
// AsmWriteCmcv
//
// This routine is used to write the value to Corrected Machine Check Vector Register (CMCV).
//
// Arguments :
//
// On Entry : The value need to be written to CMCV
//
// Return Value: The value written to CMCV.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteCmcv, @function
.proc AsmWriteCmcv
.regstk 1, 0, 0, 0
AsmWriteCmcv::
mov cr.cmcv = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteCmcv
//---------------------------------------------------------------------------------
//++
// AsmReadLrr0
//
// This routine is used to read the value of Local Redirection Register 0 (LRR0).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of LRR0.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadLrr0, @function
.proc AsmReadLrr0
AsmReadLrr0::
mov r8 = cr.lrr0;;
br.ret.dpnt b0;;
.endp AsmReadLrr0
//---------------------------------------------------------------------------------
//++
// AsmWriteLrr0
//
// This routine is used to write the value to Local Redirection Register 0 (LRR0).
//
// Arguments :
//
// On Entry : The value need to be written to LRR0.
//
// Return Value: The value written to LRR0.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteLrr0, @function
.proc AsmWriteLrr0
.regstk 1, 0, 0, 0
AsmWriteLrr0::
mov cr.lrr0 = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteLrr0
//---------------------------------------------------------------------------------
//++
// AsmReadLrr1
//
// This routine is used to read the value of Local Redirection Register 1 (LRR1).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of LRR1.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadLrr1, @function
.proc AsmReadLrr1
AsmReadLrr1::
mov r8 = cr.lrr1;;
br.ret.dpnt b0;;
.endp AsmReadLrr1
//---------------------------------------------------------------------------------
//++
// AsmWriteLrr1
//
// This routine is used to write the value to Local Redirection Register 1 (LRR1).
//
// Arguments :
//
// On Entry : The value need to be written to LRR1.
//
// Return Value: The value written to LRR1.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteLrr1, @function
.proc AsmWriteLrr1
.regstk 1, 0, 0, 0
AsmWriteLrr1::
mov cr.lrr1 = in0
mov r8 = in0;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteLrr1

View File

@@ -1,263 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessGcr.s
///
///
/// IPF specific Global Control Registers accessing functions
///
//---------------------------------------------------------------------------------
//++
// AsmReadDcr
//
// This routine is used to Read the value of Default Control Register (DCR).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of DCR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadDcr, @function
.proc AsmReadDcr
AsmReadDcr::
mov r8 = cr.dcr;;
br.ret.dpnt b0;;
.endp AsmReadDcr
//---------------------------------------------------------------------------------
//++
// AsmWriteDcr
//
// This routine is used to write the value to Default Control Register (DCR).
//
// Arguments :
//
// On Entry : The value need to be written to DCR
//
// Return Value: The value written to DCR.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteDcr, @function
.proc AsmWriteDcr
.regstk 1, 0, 0, 0
AsmWriteDcr::
mov cr.dcr = in0
mov r8 = in0;;
srlz.i;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWriteDcr
//---------------------------------------------------------------------------------
//++
// AsmReadItc
//
// This routine is used to Read the value of Interval Timer Counter Register (ITC).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of ITC.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadItc, @function
.proc AsmReadItc
AsmReadItc::
mov r8 = ar.itc;;
br.ret.dpnt b0;;
.endp AsmReadItc
//---------------------------------------------------------------------------------
//++
// AsmWriteItc
//
// This routine is used to write the value to Interval Timer Counter Register (ITC).
//
// Arguments :
//
// On Entry : The value need to be written to the ITC
//
// Return Value: The value written to the ITC.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteItc, @function
.proc AsmWriteItc
.regstk 1, 0, 0, 0
AsmWriteItc::
mov ar.itc = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteItc
//---------------------------------------------------------------------------------
//++
// AsmReadItm
//
// This routine is used to Read the value of Interval Timer Match Register (ITM).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of ITM.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadItm, @function
.proc AsmReadItm
AsmReadItm::
mov r8 = cr.itm;;
br.ret.dpnt b0;;
.endp AsmReadItm
//---------------------------------------------------------------------------------
//++
// AsmWriteItm
//
// This routine is used to write the value to Interval Timer Match Register (ITM).
//
// Arguments :
//
// On Entry : The value need to be written to ITM
//
// Return Value: The value written to ITM.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteItm, @function
.proc AsmWriteItm
.regstk 1, 0, 0, 0
AsmWriteItm::
mov cr.itm = in0
mov r8 = in0;;
srlz.d;
br.ret.dpnt b0;;
.endp AsmWriteItm
//---------------------------------------------------------------------------------
//++
// AsmReadIva
//
// This routine is used to read the value of Interruption Vector Address Register (IVA).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of IVA.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadIva, @function
.proc AsmReadIva
AsmReadIva::
mov r8 = cr.iva;;
br.ret.dpnt b0;;
.endp AsmReadIva
//---------------------------------------------------------------------------------
//++
// AsmWriteIva
//
// This routine is used to write the value to Interruption Vector Address Register (IVA).
//
// Arguments :
//
// On Entry : The value need to be written to IVA
//
// Return Value: The value written to IVA.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteIva, @function
.proc AsmWriteIva
.regstk 1, 0, 0, 0
AsmWriteIva::
mov cr.iva = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteIva
//---------------------------------------------------------------------------------
//++
// AsmReadPta
//
// This routine is used to read the value of Page Table Address Register (PTA).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current value of PTA.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadPta, @function
.proc AsmReadPta
AsmReadPta::
mov r8 = cr.pta;;
br.ret.dpnt b0;;
.endp AsmReadPta
//---------------------------------------------------------------------------------
//++
// AsmWritePta
//
// This routine is used to write the value to Page Table Address Register (PTA)).
//
// Arguments :
//
// On Entry : The value need to be written to PTA
//
// Return Value: The value written to PTA.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWritePta, @function
.proc AsmWritePta
.regstk 1, 0, 0, 0
AsmWritePta::
mov cr.pta = in0
mov r8 = in0;;
srlz.i;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWritePta

View File

@@ -1,85 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessGp.s
///
///
/// IPF specific Global Pointer and Stack Pointer accessing functions
///
//---------------------------------------------------------------------------------
//++
// AsmReadGp
//
// This routine is used to read the current value of 64-bit Global Pointer (GP).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current GP value.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadGp, @function
.proc AsmReadGp
AsmReadGp::
mov r8 = gp;;
br.ret.dpnt b0;;
.endp AsmReadGp
//---------------------------------------------------------------------------------
//++
// AsmWriteGp
//
// This routine is used to write the current value of 64-bit Global Pointer (GP).
//
// Arguments :
//
// On Entry : The value need to be written.
//
// Return Value: The value have been written.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteGp, @function
.proc AsmWriteGp
.regstk 1, 0, 0, 0
AsmWriteGp::
mov gp = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteGp
//---------------------------------------------------------------------------------
//++
// AsmReadSp
//
// This routine is used to read the current value of 64-bit Stack Pointer (SP).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current SP value.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadSp, @function
.proc AsmReadSp
AsmReadSp::
mov r8 = sp;;
br.ret.dpnt b0;;
.endp AsmReadSp

View File

@@ -1,399 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessKr.s
///
///
/// IPF specific AsmReadKrX() and AsmWriteKrX functions, 'X' is from '0' to '7'
///
//---------------------------------------------------------------------------------
//++
// AsmReadKr0
//
// This routine is used to get KR0.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR0.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr0, @function
.proc AsmReadKr0
AsmReadKr0::
mov r8 = ar.k0;;
br.ret.dpnt b0;;
.endp AsmReadKr0
//---------------------------------------------------------------------------------
//++
// AsmWriteKr0
//
// This routine is used to Write KR0.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR0.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr0, @function
.proc AsmWriteKr0
.regstk 1, 0, 0, 0
AsmWriteKr0::
mov ar.k0 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr0
//---------------------------------------------------------------------------------
//++
// AsmReadKr1
//
// This routine is used to get KR1.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR1.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr1, @function
.proc AsmReadKr1
AsmReadKr1::
mov r8 = ar.k1;;
br.ret.dpnt b0;;
.endp AsmReadKr1
//---------------------------------------------------------------------------------
//++
// AsmWriteKr1
//
// This routine is used to Write KR1.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR1.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr1, @function
.proc AsmWriteKr1
AsmWriteKr1::
mov ar.k1 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr1
//---------------------------------------------------------------------------------
//++
// AsmReadKr2
//
// This routine is used to get KR2.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR2.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr2, @function
.proc AsmReadKr2
AsmReadKr2::
mov r8 = ar.k2;;
br.ret.dpnt b0;;
.endp AsmReadKr2
//---------------------------------------------------------------------------------
//++
// AsmWriteKr2
//
// This routine is used to Write KR2.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR2.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr2, @function
.proc AsmWriteKr2
AsmWriteKr2::
mov ar.k2 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr2
//---------------------------------------------------------------------------------
//++
// AsmReadKr3
//
// This routine is used to get KR3.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR3.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr3, @function
.proc AsmReadKr3
AsmReadKr3::
mov r8 = ar.k3;;
br.ret.dpnt b0;;
.endp AsmReadKr3
//---------------------------------------------------------------------------------
//++
// AsmWriteKr3
//
// This routine is used to Write KR3.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR3.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr3, @function
.proc AsmWriteKr3
AsmWriteKr3::
mov ar.k3 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr3
//---------------------------------------------------------------------------------
//++
// AsmReadKr4
//
// This routine is used to get KR4.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR4.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr4, @function
.proc AsmReadKr4
AsmReadKr4::
mov r8 = ar.k4;;
br.ret.dpnt b0;;
.endp AsmReadKr4
//---------------------------------------------------------------------------------
//++
// AsmWriteKr4
//
// This routine is used to Write KR4.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR4.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr4, @function
.proc AsmWriteKr4
AsmWriteKr4::
mov ar.k4 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr4
//---------------------------------------------------------------------------------
//++
// AsmReadKr5
//
// This routine is used to get KR5.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR5.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr5, @function
.proc AsmReadKr5
AsmReadKr5::
mov r8 = ar.k5;;
br.ret.dpnt b0;;
.endp AsmReadKr5
//---------------------------------------------------------------------------------
//++
// AsmWriteKr5
//
// This routine is used to Write KR5.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR5.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr5, @function
.proc AsmWriteKr5
AsmWriteKr5::
mov ar.k5 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr5
//---------------------------------------------------------------------------------
//++
// AsmReadKr6
//
// This routine is used to get KR6.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR6.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr6, @function
.proc AsmReadKr6
AsmReadKr6::
mov r8 = ar.k6;;
br.ret.dpnt b0;;
.endp AsmReadKr6
//---------------------------------------------------------------------------------
//++
// AsmWriteKr6
//
// This routine is used to write KR6.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR6.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr6, @function
.proc AsmWriteKr6
AsmWriteKr6::
mov ar.k6 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr6
//---------------------------------------------------------------------------------
//++
// AsmReadKr7
//
// This routine is used to get KR7.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value store in KR7.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadKr7, @function
.proc AsmReadKr7
AsmReadKr7::
mov r8 = ar.k7;;
br.ret.dpnt b0;;
.endp AsmReadKr7
//---------------------------------------------------------------------------------
//++
// AsmWriteKr7
//
// This routine is used to write KR7.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: The value written to the KR7.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWriteKr7, @function
.proc AsmWriteKr7
AsmWriteKr7::
mov ar.k7 = in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmWriteKr7

View File

@@ -1,123 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessPmr.s
///
///
/// IPF specific Performance Monitor Configuration/Data Registers accessing functions
///
//---------------------------------------------------------------------------------
//++
// AsmReadPmc
//
// This routine is used to Reads the current value of Performance Monitor Configuration Register (PMC).
//
// Arguments :
//
// On Entry : The 8-bit PMC index.
//
// Return Value: The current value of PMC by Index.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadPmc, @function
.proc AsmReadPmc
.regstk 1, 0, 0, 0
AsmReadPmc::
srlz.i;;
srlz.d;;
mov r8 = pmc[in0];;
br.ret.dpnt b0;;
.endp AsmReadPmc
//---------------------------------------------------------------------------------
//++
// AsmWritePmc
//
// This routine is used to write the current value to a Performance Monitor Configuration Register (PMC).
//
// Arguments :
//
// On Entry : The 8-bit PMC index.
// The value should be written to PMC
//
// Return Value: The value written to PMC.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWritePmc, @function
.proc AsmWritePmc
.regstk 2, 0, 0, 0
AsmWritePmc::
mov pmc[in0] = in1
mov r8 = in1;;
srlz.i;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWritePmc
//---------------------------------------------------------------------------------
//++
// AsmReadPmd
//
// This routine is used to Reads the current value of Performance Monitor Data Register (PMD).
//
// Arguments :
//
// On Entry : The 8-bit PMD index.
//
// Return Value: The current value of PMD by Index.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadPmd, @function
.proc AsmReadPmd
.regstk 1, 0, 0, 0
AsmReadPmd::
srlz.i;;
srlz.d;;
mov r8 = pmd[in0];;
br.ret.dpnt b0;;
.endp AsmReadPmd
//---------------------------------------------------------------------------------
//++
// AsmWritePmd
//
// This routine is used to write the current value to Performance Monitor Data Register (PMD).
//
// Arguments :
//
// On Entry : The 8-bit PMD index.
// The value should be written to PMD
//
// Return Value: The value written to PMD.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWritePmd, @function
.proc AsmWritePmd
.regstk 2, 0, 0, 0
AsmWritePmd::
mov pmd[in0] = in1
mov r8 = in1;;
srlz.i;;
srlz.d;;
br.ret.dpnt b0;;
.endp AsmWritePmd

View File

@@ -1,110 +0,0 @@
/// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AccessPsr.s
///
///
/// IPF specific Processor Status Register accessing functions
///
#define CpuModeMask 0x0000001008020000
#define CpuInVirtualMode 0x1
#define CpuInPhysicalMode 0x0
#define CpuInMixMode (0x0 - 0x1)
//---------------------------------------------------------------------------------
//++
// AsmReadPsr
//
// This routine is used to read the current value of Processor Status Register (PSR).
//
// Arguments :
//
// On Entry :
//
// Return Value: The current PSR value.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadPsr, @function
.proc AsmReadPsr
AsmReadPsr::
mov r8 = psr;;
br.ret.dpnt b0;;
.endp AsmReadPsr
//---------------------------------------------------------------------------------
//++
// AsmWritePsr
//
// This routine is used to write the value of Processor Status Register (PSR).
//
// Arguments :
//
// On Entry : The value need to be written.
//
// Return Value: The value have been written.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmWritePsr, @function
.proc AsmWritePsr
.regstk 1, 0, 0, 0
AsmWritePsr::
mov psr.l = in0
mov r8 = in0;;
srlz.d;;
srlz.i;;
br.ret.dpnt b0;;
.endp AsmWritePsr
//---------------------------------------------------------------------------------
//++
// AsmCpuVirtual
//
// This routine is used to determines if the CPU is currently executing
// in virtual, physical, or mixed mode.
//
// If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
// If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
// If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
// and -1 is returned.
//
// Arguments:
//
// On Entry: None
//
// Return Value: The CPU mode flag
// return 1 The CPU is in virtual mode.
// return 0 The CPU is in physical mode.
// return -1 The CPU is in mixed mode.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmCpuVirtual, @function
.proc AsmCpuVirtual
AsmCpuVirtual::
mov r29 = psr
movl r30 = CpuModeMask;;
and r28 = r30, r29;;
cmp.eq p6, p7 = r30, r28;;
(p6) mov r8 = CpuInVirtualMode;;
(p6) br.ret.dpnt b0;;
(p7) cmp.eq p6, p7 = 0x0, r28;;
(p6) mov r8 = CpuInPhysicalMode;;
(p7) mov r8 = CpuInMixMode;;
br.ret.dpnt b0;;
.endp AsmCpuVirtual

View File

@@ -1,158 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AsmPalCall.s
///
///
/// Contains an implementation of CallPalProcStacked on Itanium-based
/// architecture.
///
//-----------------------------------------------------------------------------
//++
// AsmPalCall
//
// Makes a PAL procedure call.
// This is function to make a PAL procedure call. Based on the Index
// value this API will make static or stacked PAL call. The following table
// describes the usage of PAL Procedure Index Assignment. Architected procedures
// may be designated as required or optional. If a PAL procedure is specified
// as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
// Status field of the PAL_CALL_RETURN structure.
// This indicates that the procedure is not present in this PAL implementation.
// It is the caller's responsibility to check for this return code after calling
// any optional PAL procedure.
// No parameter checking is performed on the 5 input parameters, but there are
// some common rules that the caller should follow when making a PAL call. Any
// address passed to PAL as buffers for return parameters must be 8-byte aligned.
// Unaligned addresses may cause undefined results. For those parameters defined
// as reserved or some fields defined as reserved must be zero filled or the invalid
// argument return value may be returned or undefined result may occur during the
// execution of the procedure. If the PalEntryPoint does not point to a valid
// PAL entry point then the system behavior is undefined. This function is only
// available on IPF.
//
// On Entry :
// in0: PAL_PROC entrypoint
// in1-in4 : PAL_PROC arguments
//
// Return Value:
//
// As per stacked calling conventions.
//
//--
//---------------------------------------------------------------------------
//
// PAL function calls
//
#define PAL_MC_CLEAR_LOG 0x0015
#define PAL_MC_DYNAMIC_STATE 0x0018
#define PAL_MC_ERROR_INFO 0x0019
#define PAL_MC_RESUME 0x001a
.text
.proc AsmPalCall
.type AsmPalCall, @function
AsmPalCall::
alloc loc1 = ar.pfs,5,8,4,0
mov loc0 = b0
mov loc3 = b5
mov loc4 = r2
mov loc7 = r1
mov r2 = psr;;
mov r28 = in1
mov loc5 = r2;;
movl loc6 = 0x100;;
cmp.ge p6,p7 = r28,loc6;;
(p6) movl loc6 = 0x1FF;;
(p7) br.dpnt.few PalCallStatic;; // 0 ~ 255 make a static Pal Call
(p6) cmp.le p6,p7 = r28,loc6;;
(p6) br.dpnt.few PalCallStacked;; // 256 ~ 511 make a stacked Pal Call
(p7) movl loc6 = 0x300;;
(p7) cmp.ge p6,p7 = r28,loc6;;
(p7) br.dpnt.few PalCallStatic;; // 512 ~ 767 make a static Pal Call
(p6) movl loc6 = 0x3FF;;
(p6) cmp.le p6,p7 = r28,loc6;;
(p6) br.dpnt.few PalCallStacked;; // 768 ~ 1023 make a stacked Pal Call
(p7) mov r8 = 0xFFFFFFFFFFFFFFFF;; // > 1024 return invalid
(p7) br.dpnt.few ComeBackFromPALCall;;
PalCallStatic:
movl loc6 = PAL_MC_CLEAR_LOG;;
cmp.eq p6,p7 = r28,loc6;;
(p7) movl loc6 = PAL_MC_DYNAMIC_STATE;;
(p7) cmp.eq p6,p7 = r28,loc6;;
(p7) movl loc6 = PAL_MC_ERROR_INFO;;
(p7) cmp.eq p6,p7 = r28,loc6;;
(p7) movl loc6 = PAL_MC_RESUME;;
(p7) cmp.eq p6,p7 = r28,loc6 ;;
mov loc6 = 0x1;;
(p7) dep r2 = loc6,r2,13,1;; // psr.ic = 1
// p6 will be true, if it is one of the MCHK calls. There has been lots of debate
// on psr.ic for these values. For now, do not do any thing to psr.ic
dep r2 = r0,r2,14,1;; // psr.i = 0
mov psr.l = r2
srlz.d // Needs data serailization.
srlz.i // Needs instruction serailization.
StaticGetPALLocalIP:
mov loc2 = ip;;
add loc2 = ComeBackFromPALCall - StaticGetPALLocalIP,loc2;;
mov b0 = loc2 // return address after Pal call
mov r29 = in2
mov r30 = in3
mov r31 = in4
mov b5 = in0;; // get the PalProcEntrypt from input
br.sptk b5;; // Take the plunge.
PalCallStacked:
dep r2 = r0,r2,14,1;; // psr.i = 0
mov psr.l = r2;;
srlz.d // Needs data serailization.
srlz.i // Needs instruction serailization.
StackedGetPALLocalIP:
mov out0 = in1
mov out1 = in2
mov out2 = in3
mov out3 = in4
mov b5 = in0 ;; // get the PalProcEntrypt from input
br.call.dpnt b0 = b5 ;; // Take the plunge.
ComeBackFromPALCall:
mov psr.l = loc5 ;;
srlz.d // Needs data serailization.
srlz.i // Needs instruction serailization.
mov b5 = loc3
mov r2 = loc4
mov r1 = loc7
mov b0 = loc0
mov ar.pfs = loc1;;
br.ret.dpnt b0;;
.endp AsmPalCall

View File

@@ -1,118 +0,0 @@
/*++
Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuBreakpint.c
Abstract:
--*/
#include "BaseLibInternals.h"
/**
Generates a breakpoint on the CPU.
Generates a breakpoint on the CPU. The breakpoint must be implemented such
that code can resume normal execution after the breakpoint.
**/
VOID
EFIAPI
CpuBreakpoint (
VOID
)
{
__break (0);
}
/**
Used to serialize load and store operations.
All loads and stores that proceed calls to this function are guaranteed to be
globally visible when this function returns.
**/
VOID
EFIAPI
MemoryFence (
VOID
)
{
__mfa ();
}
/**
Disables CPU interrupts.
Disables CPU interrupts.
**/
VOID
EFIAPI
DisableInterrupts (
VOID
)
{
_disable ();
}
/**
Enables CPU interrupts.
Enables CPU interrupts.
**/
VOID
EFIAPI
EnableInterrupts (
VOID
)
{
_enable ();
}
/**
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
**/
VOID
EFIAPI
EnableDisableInterrupts (
VOID
)
{
EnableInterrupts ();
DisableInterrupts ();
}
/**
Places the CPU in a sleep state until an interrupt is received.
Places the CPU in a sleep state until an interrupt is received. If interrupts
are disabled prior to calling this function, then the CPU will be placed in a
sleep state indefinitely.
**/
VOID
EFIAPI
CpuSleep (
VOID
)
{
PalCallStatic (NULL, 29, 0, 0, 0);
}

View File

@@ -1,118 +0,0 @@
/** @file
Base Library CPU functions for Itanium
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
#pragma intrinsic (_enable)
#pragma intrinsic (_disable)
#pragma intrinsic (__break)
#pragma intrinsic (__mfa)
/**
Generates a breakpoint on the CPU.
Generates a breakpoint on the CPU. The breakpoint must be implemented such
that code can resume normal execution after the breakpoint.
**/
VOID
EFIAPI
CpuBreakpoint (
VOID
)
{
__break (0);
}
/**
Used to serialize load and store operations.
All loads and stores that proceed calls to this function are guaranteed to be
globally visible when this function returns.
**/
VOID
EFIAPI
MemoryFence (
VOID
)
{
__mfa ();
}
/**
Disables CPU interrupts.
Disables CPU interrupts.
**/
VOID
EFIAPI
DisableInterrupts (
VOID
)
{
_disable ();
}
/**
Enables CPU interrupts.
Enables CPU interrupts.
**/
VOID
EFIAPI
EnableInterrupts (
VOID
)
{
_enable ();
}
/**
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
**/
VOID
EFIAPI
EnableDisableInterrupts (
VOID
)
{
EnableInterrupts ();
DisableInterrupts ();
}
/**
Places the CPU in a sleep state until an interrupt is received.
Places the CPU in a sleep state until an interrupt is received. If interrupts
are disabled prior to calling this function, then the CPU will be placed in a
sleep state indefinitely.
**/
VOID
EFIAPI
CpuSleep (
VOID
)
{
PalCallStatic (NULL, 29, 0, 0, 0);
}

View File

@@ -1,59 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// CpuFlushTlb.s
///
/// Abstract:
///
///
.auto
.text
.globl PalCallStatic
.type PalCallStatic, @function
.proc CpuFlushTlb
.type CpuFlushTlb, @function
CpuFlushTlb::
alloc loc0 = ar.pfs, 0, 3, 5, 0
mov out0 = 0
mov out1 = 6
mov out2 = 0
mov out3 = 0
mov loc1 = b0
mov out4 = 0
brl.call.sptk b0 = PalCallStatic
mov loc2 = psr // save PSR
mov ar.pfs = loc0
extr.u r14 = r10, 32, 32 // r14 <- count1
rsm 1 << 14 // Disable interrupts
extr.u r15 = r11, 32, 32 // r15 <- stride1
extr.u r10 = r10, 0, 32 // r10 <- count2
add r10 = -1, r10
extr.u r11 = r11, 0, 32 // r11 <- stride2
br.cond.sptk LoopPredicate
LoopOuter:
mov ar.lc = r10 // LC <- count2
mov ar.ec = r0 // EC <- 0
Loop:
ptc.e r9
add r9 = r11, r9 // r9 += stride2
br.ctop.sptk Loop
add r9 = r15, r9 // r9 += stride1
LoopPredicate:
cmp.ne p6 = r0, r14 // count1 == 0?
add r14 = -1, r14
(p6) br.cond.sptk LoopOuter
mov psr.l = loc2
mov b0 = loc1
br.ret.sptk.many b0
.endp

View File

@@ -1,26 +0,0 @@
/// Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// CpuPause.s
///
/// Abstract:
///
///
.auto
.text
.proc CpuPause
.type CpuPause, @function
CpuPause::
hint.i @pause
br.ret.sptk.many b0
.endp

View File

@@ -1,66 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: ExecFc.s
///
///
/// IPF specific AsmFc() and AsmFci () functions
///
//---------------------------------------------------------------------------------
//++
// AsmFc
//
// This routine is used to execute a FC instruction on the specific address.
//
// Arguments :
//
// On Entry : The specific address need to execute FC instruction.
//
// Return Value: The specific address have been execute FC instruction.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmFc, @function
.proc AsmFc
.regstk 1, 0, 0, 0
AsmFc::
fc in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmFc
//---------------------------------------------------------------------------------
//++
// AsmFci
//
// This routine is used to execute a FC.i instruction on the specific address.
//
// Arguments :
//
// On Entry : The specific address need to execute FC.i instruction.
//
// Return Value: The specific address have been execute FC.i instruction.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmFci, @function
.proc AsmFci
.regstk 1, 0, 0, 0
AsmFci::
fc.i in0
mov r8 = in0;;
br.ret.dpnt b0;;
.endp AsmFci

View File

@@ -1,95 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// FlushCacheRange.s
///
/// Abstract:
///
///
.file "IpfCpuCache.s"
#include "IpfMacro.i"
#include "IpfDefines.h"
//
// Invalidates a range of instruction cache lines in the cache coherency domain
// of the calling CPU.
//
// Invalidates the instruction cache lines specified by Address and Length. If
// Address is not aligned on a cache line boundary, then entire instruction
// cache line containing Address is invalidated. If Address + Length is not
// aligned on a cache line boundary, then the entire instruction cache line
// containing Address + Length -1 is invalidated. This function may choose to
// invalidate the entire instruction cache if that is more efficient than
// invalidating the specified range. If Length is 0, the no instruction cache
// lines are invalidated. Address is returned.
// This function is only available on IPF.
//
// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
//
// @param Address The base address of the instruction cache lines to
// invalidate. If the CPU is in a physical addressing mode, then
// Address is a physical address. If the CPU is in a virtual
// addressing mode, then Address is a virtual address.
//
// @param Length The number of bytes to invalidate from the instruction cache.
//
// @return Address
//
// VOID *
// EFIAPI
// AsmFlushCacheRange (
// IN VOID *Address,
// IN UINTN Length
// );
//
PROCEDURE_ENTRY (AsmFlushCacheRange)
NESTED_SETUP (5,8,0,0)
mov loc2 = ar.lc
mov loc3 = in0 // Start address.
mov loc4 = in1;; // Length in bytes.
cmp.eq p6,p7 = loc4, r0;; // If Length is zero then don't flush any cache
(p6) br.spnt.many DoneFlushingC;;
add loc4 = loc4,loc3
mov loc5 = 1;;
sub loc4 = loc4, loc5 ;; // the End address to flush
dep loc3 = r0,loc3,0,5
dep loc4 = r0,loc4,0,5;;
shr loc3 = loc3,5
shr loc4 = loc4,5;; // 32 byte cache line
sub loc4 = loc4,loc3;; // total flush count, It should be add 1 but
// the br.cloop will first execute one time
mov loc3 = in0
mov loc5 = 32
mov ar.lc = loc4;;
StillFlushingC:
fc loc3;;
sync.i;;
srlz.i;;
add loc3 = loc5,loc3;;
br.cloop.sptk.few StillFlushingC;;
DoneFlushingC:
mov ar.lc = loc2
mov r8 = in0 // return *Address
NESTED_RETURN
PROCEDURE_EXIT (AsmFlushCacheRange)

View File

@@ -1,27 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// GetInterruptState.s
///
/// Abstract:
///
///
.auto
.text
.proc GlueGetInterruptState
.type GlueGetInterruptState, @function
GlueGetInterruptState::
mov r8 = psr
extr.u r8 = r8, 14, 1
br.ret.sptk.many b0
.endp GlueGetInterruptState

View File

@@ -1,29 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// InterlockedCompareExchange32.s
///
/// Abstract:
///
///
.auto
.text
.proc InternalSyncCompareExchange32
.type InternalSyncCompareExchange32, @function
InternalSyncCompareExchange32::
zxt4 r33 = r33
mov ar.ccv = r33
cmpxchg4.rel r8 = [r32], r34
mf
br.ret.sptk.many b0
.endp InternalSyncCompareExchange32

View File

@@ -1,28 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// InterlockedCompareExchange64.s
///
/// Abstract:
///
///
.auto
.text
.proc InternalSyncCompareExchange64
.type InternalSyncCompareExchange64, @function
InternalSyncCompareExchange64::
mov ar.ccv = r33
cmpxchg8.rel r8 = [r32], r34
mf
br.ret.sptk.many b0
.endp InternalSyncCompareExchange64

View File

@@ -1,68 +0,0 @@
/**
SwitchStack() function for IPF.
Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name: InternalSwitchStack.c
**/
#include <BaseLibInternals.h>
/**
Transfers control to a function starting with a new stack.
Transfers control to the function specified by EntryPoint using the
new stack specified by NewStack and passing in the parameters specified
by Context1 and Context2. Context1 and Context2 are optional and may
be NULL. The function EntryPoint must never return.
Marker will be ignored on IA-32, x64, and EBC.
IPF CPUs expect one additional parameter of type VOID * that specifies
the new backing store pointer.
If EntryPoint is NULL, then ASSERT().
If NewStack is NULL, then ASSERT().
@param EntryPoint A pointer to function to call with the new stack.
@param Context1 A pointer to the context to pass into the EntryPoint
function.
@param Context2 A pointer to the context to pass into the EntryPoint
function.
@param NewStack A pointer to the new stack to use for the EntryPoint
function.
@param Marker VA_LIST marker for the variable argument list.
**/
VOID
EFIAPI
InternalSwitchStack (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
IN VOID *Context1, OPTIONAL
IN VOID *Context2, OPTIONAL
IN VOID *NewStack,
IN VA_LIST Marker
)
{
VOID *NewBsp;
//
// Get new backing store pointer from variable list
//
NewBsp = VA_ARG (Marker, VOID *);
//
// Stack should be aligned with CPU_STACK_ALIGNMENT
//
ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
ASSERT (((UINTN)NewBsp & (CPU_STACK_ALIGNMENT - 1)) == 0);
AsmSwitchStackAndBackingStore (EntryPoint, Context1, Context2, NewStack, NewBsp);
}

View File

@@ -1,48 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// PalCallStatic.s
///
/// Abstract:
///
///
.auto
.text
.proc PalCallStatic
.type PalCallStatic, @function
.regstk 5, 0, 0, 0
PalCallStatic::
cmp.eq p15 = in0, r0
mov r31 = in4
mov r8 = ip
(p15) mov in0 = ar.k5
add r8 = (_PalProcReturn - PalCallStatic), r8
mov r30 = in3
mov in4 = psr
mov in3 = b0
mov b7 = in0
rsm 1 << 14 // Disable interrupts
mov r29 = in2
mov r28 = in1
mov b0 = r8
br.cond.sptk.many b7
_PalProcReturn:
mov psr.l = in4
mov b0 = in3
br.ret.sptk.many b0
.endp PalCallStatic

View File

@@ -1,39 +0,0 @@
/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: ReadCpuid.s
///
///
/// IPF specific AsmReadCpuid()function
///
//---------------------------------------------------------------------------------
//++
// AsmReadCpuid
//
// This routine is used to Reads the current value of Processor Identifier Register (CPUID).
//
// Arguments :
//
// On Entry : The 8-bit Processor Identifier Register index to read.
//
// Return Value: The current value of Processor Identifier Register specified by Index.
//
//--
//----------------------------------------------------------------------------------
.text
.type AsmReadCpuid, @function
.proc AsmReadCpuid
.regstk 1, 0, 0, 0
AsmReadCpuid::
mov r8 = cpuid[in0];;
br.ret.dpnt b0;;
.endp AsmReadCpuid

View File

@@ -1,51 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// SwitchStack.s
///
/// Abstract:
///
///
.auto
.text
.proc AsmSwitchStackAndBackingStore
.type AsmSwitchStackAndBackingStore, @function
.regstk 5, 0, 0, 0
AsmSwitchStackAndBackingStore::
mov r14 = ar.rsc
movl r2 = ~((((1 << 14) - 1) << 16) | 3)
mov r17 = in1
mov r18 = in2
and r2 = r14, r2
mov ar.rsc = r2
mov sp = in3
mov r19 = in4
ld8.nt1 r16 = [in0], 8
ld8.nta gp = [in0]
mov r3 = -1
loadrs
mov ar.bspstore = r19
mov b7 = r16
alloc r2 = ar.pfs, 0, 0, 2, 0
mov out0 = r17
mov out1 = r18
mov ar.rnat = r3
mov ar.rsc = r14
br.call.sptk.many b0 = b7
.endp AsmSwitchStackAndBackingStore

View File

@@ -1,83 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Synchronization.c
Abstract:
--*/
#include "BaseLibInternals.h"
/**
Performs an atomic increment of an 32-bit unsigned integer.
Performs an atomic increment of the 32-bit unsigned integer specified by
Value and returns the incremented value. The increment operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to increment.
@return The incremented value.
**/
UINT32
EFIAPI
InternalSyncIncrement (
IN volatile UINT32 *Value
)
{
UINT32 OriginalValue;
do {
OriginalValue = *Value;
} while (OriginalValue != InternalSyncCompareExchange32 (
Value,
OriginalValue,
OriginalValue + 1
));
return OriginalValue + 1;
}
/**
Performs an atomic decrement of an 32-bit unsigned integer.
Performs an atomic decrement of the 32-bit unsigned integer specified by
Value and returns the decrement value. The decrement operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to decrement.
@return The decrement value.
**/
UINT32
EFIAPI
InternalSyncDecrement (
IN volatile UINT32 *Value
)
{
UINT32 OriginalValue;
do {
OriginalValue = *Value;
} while (OriginalValue != InternalSyncCompareExchange32 (
Value,
OriginalValue,
OriginalValue - 1
));
return OriginalValue - 1;
}

View File

@@ -1,249 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Unaligned.c
Abstract:
--*/
#include "BaseLibInternals.h"
/**
Reads a 16-bit value from memory that may be unaligned.
This function returns the 16-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 16-bit value that may be unaligned.
@return *Uint16
**/
UINT16
EFIAPI
ReadUnaligned16 (
IN CONST UINT16 *Buffer
)
{
ASSERT (Buffer != NULL);
return (UINT16)(((UINT8*)Buffer)[0] | (((UINT8*)Buffer)[1] << 8));
}
/**
Writes a 16-bit value to memory that may be unaligned.
This function writes the 16-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 16-bit value that may be unaligned.
@param Value 16-bit value to write to Buffer.
@return Value
**/
UINT16
EFIAPI
WriteUnaligned16 (
OUT UINT16 *Buffer,
IN UINT16 Value
)
{
ASSERT (Buffer != NULL);
((UINT8*)Buffer)[0] = (UINT8)Value;
((UINT8*)Buffer)[1] = (UINT8)(Value >> 8);
return Value;
}
/**
Reads a 24-bit value from memory that may be unaligned.
This function returns the 24-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 24-bit value that may be unaligned.
@return The value read.
**/
UINT32
EFIAPI
ReadUnaligned24 (
IN CONST UINT32 *Buffer
)
{
ASSERT (Buffer != NULL);
return (UINT32)(
ReadUnaligned16 ((UINT16*)Buffer) |
(((UINT8*)Buffer)[2] << 16)
);
}
/**
Writes a 24-bit value to memory that may be unaligned.
This function writes the 24-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 24-bit value that may be unaligned.
@param Value 24-bit value to write to Buffer.
@return The value written.
**/
UINT32
EFIAPI
WriteUnaligned24 (
OUT UINT32 *Buffer,
IN UINT32 Value
)
{
ASSERT (Buffer != NULL);
WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
*(UINT8*)((UINT16*)Buffer + 1) = (UINT8)(Value >> 16);
return Value;
}
/**
Reads a 32-bit value from memory that may be unaligned.
This function returns the 32-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 32-bit value that may be unaligned.
@return *Uint32
**/
UINT32
EFIAPI
ReadUnaligned32 (
IN CONST UINT32 *Buffer
)
{
UINT16 LowerBytes;
UINT16 HigherBytes;
ASSERT (Buffer != NULL);
LowerBytes = ReadUnaligned16 ((UINT16*) Buffer);
HigherBytes = ReadUnaligned16 ((UINT16*) Buffer + 1);
return (UINT32) (LowerBytes | (HigherBytes << 16));
}
/**
Writes a 32-bit value to memory that may be unaligned.
This function writes the 32-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 32-bit value that may be unaligned.
@param Value 32-bit value to write to Buffer.
@return Value
**/
UINT32
EFIAPI
WriteUnaligned32 (
OUT UINT32 *Buffer,
IN UINT32 Value
)
{
ASSERT (Buffer != NULL);
WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
WriteUnaligned16 ((UINT16*)Buffer + 1, (UINT16)(Value >> 16));
return Value;
}
/**
Reads a 64-bit value from memory that may be unaligned.
This function returns the 64-bit value pointed to by Buffer. The function
guarantees that the read operation does not produce an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 64-bit value that may be unaligned.
@return *Uint64
**/
UINT64
EFIAPI
ReadUnaligned64 (
IN CONST UINT64 *Buffer
)
{
UINT32 LowerBytes;
UINT32 HigherBytes;
ASSERT (Buffer != NULL);
LowerBytes = ReadUnaligned32 ((UINT32*) Buffer);
HigherBytes = ReadUnaligned32 ((UINT32*) Buffer + 1);
return (UINT64) (LowerBytes | LShiftU64 (HigherBytes, 32));
}
/**
Writes a 64-bit value to memory that may be unaligned.
This function writes the 64-bit value specified by Value to Buffer. Value is
returned. The function guarantees that the write operation does not produce
an alignment fault.
If the Buffer is NULL, then ASSERT().
@param Buffer Pointer to a 64-bit value that may be unaligned.
@param Value 64-bit value to write to Buffer.
@return Value
**/
UINT64
EFIAPI
WriteUnaligned64 (
OUT UINT64 *Buffer,
IN UINT64 Value
)
{
ASSERT (Buffer != NULL);
WriteUnaligned32 ((UINT32*)Buffer, (UINT32)Value);
WriteUnaligned32 ((UINT32*)Buffer + 1, (UINT32)RShiftU64 (Value, 32));
return Value;
}

View File

@@ -1,33 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
asm.h
Abstract:
--*/
#ifndef _ASM_H
#define _ASM_H
#define TRUE 1
#define FALSE 0
#define PROCEDURE_ENTRY(name) .##text; \
.##type name, @function; \
.##proc name; \
name::
#define PROCEDURE_EXIT(name) .##endp name
#endif // _ASM_H

View File

@@ -1,211 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
asm.h
Abstract:
--*/
#ifndef _IA64GEN_H
#define _IA64GEN_H
#define TT_UNAT 0
#define C_PSR 0
#define J_UNAT 0
#define T_TYPE 0
#define T_IPSR 0x8
#define T_ISR 0x10
#define T_IIP 0x18
#define T_IFA 0x20
#define T_IIPA 0x28
#define T_IFS 0x30
#define T_IIM 0x38
#define T_RSC 0x40
#define T_BSP 0x48
#define T_BSPSTORE 0x50
#define T_RNAT 0x58
#define T_PFS 0x60
#define T_KBSPSTORE 0x68
#define T_UNAT 0x70
#define T_CCV 0x78
#define T_DCR 0x80
#define T_PREDS 0x88
#define T_NATS 0x90
#define T_R1 0x98
#define T_GP 0x98
#define T_R2 0xa0
#define T_R3 0xa8
#define T_R4 0xb0
#define T_R5 0xb8
#define T_R6 0xc0
#define T_R7 0xc8
#define T_R8 0xd0
#define T_R9 0xd8
#define T_R10 0xe0
#define T_R11 0xe8
#define T_R12 0xf0
#define T_SP 0xf0
#define T_R13 0xf8
#define T_R14 0x100
#define T_R15 0x108
#define T_R16 0x110
#define T_R17 0x118
#define T_R18 0x120
#define T_R19 0x128
#define T_R20 0x130
#define T_R21 0x138
#define T_R22 0x140
#define T_R23 0x148
#define T_R24 0x150
#define T_R25 0x158
#define T_R26 0x160
#define T_R27 0x168
#define T_R28 0x170
#define T_R29 0x178
#define T_R30 0x180
#define T_R31 0x188
#define T_F2 0x1f0
#define T_F3 0x200
#define T_F4 0x210
#define T_F5 0x220
#define T_F6 0x230
#define T_F7 0x240
#define T_F8 0x250
#define T_F9 0x260
#define T_F10 0x270
#define T_F11 0x280
#define T_F12 0x290
#define T_F13 0x2a0
#define T_F14 0x2b0
#define T_F15 0x2c0
#define T_F16 0x2d0
#define T_F17 0x2e0
#define T_F18 0x2f0
#define T_F19 0x300
#define T_F20 0x310
#define T_F21 0x320
#define T_F22 0x330
#define T_F23 0x340
#define T_F24 0x350
#define T_F25 0x360
#define T_F26 0x370
#define T_F27 0x380
#define T_F28 0x390
#define T_F29 0x3a0
#define T_F30 0x3b0
#define T_F31 0x3c0
#define T_FPSR 0x1e0
#define T_B0 0x190
#define T_B1 0x198
#define T_B2 0x1a0
#define T_B3 0x1a8
#define T_B4 0x1b0
#define T_B5 0x1b8
#define T_B6 0x1c0
#define T_B7 0x1c8
#define T_EC 0x1d0
#define T_LC 0x1d8
#define J_NATS 0x8
#define J_PFS 0x10
#define J_BSP 0x18
#define J_RNAT 0x20
#define J_PREDS 0x28
#define J_LC 0x30
#define J_R4 0x38
#define J_R5 0x40
#define J_R6 0x48
#define J_R7 0x50
#define J_SP 0x58
#define J_F2 0x60
#define J_F3 0x70
#define J_F4 0x80
#define J_F5 0x90
#define J_F16 0xa0
#define J_F17 0xb0
#define J_F18 0xc0
#define J_F19 0xd0
#define J_F20 0xe0
#define J_F21 0xf0
#define J_F22 0x100
#define J_F23 0x110
#define J_F24 0x120
#define J_F25 0x130
#define J_F26 0x140
#define J_F27 0x150
#define J_F28 0x160
#define J_F29 0x170
#define J_F30 0x180
#define J_F31 0x190
#define J_FPSR 0x1a0
#define J_B0 0x1a8
#define J_B1 0x1b0
#define J_B2 0x1b8
#define J_B3 0x1c0
#define J_B4 0x1c8
#define J_B5 0x1d0
#define TRAP_FRAME_LENGTH 0x3d0
#define C_UNAT 0x28
#define C_NATS 0x30
#define C_PFS 0x8
#define C_BSPSTORE 0x10
#define C_RNAT 0x18
#define C_RSC 0x20
#define C_PREDS 0x38
#define C_LC 0x40
#define C_DCR 0x48
#define C_R1 0x50
#define C_GP 0x50
#define C_R4 0x58
#define C_R5 0x60
#define C_R6 0x68
#define C_R7 0x70
#define C_SP 0x78
#define C_R13 0x80
#define C_F2 0x90
#define C_F3 0xa0
#define C_F4 0xb0
#define C_F5 0xc0
#define C_F16 0xd0
#define C_F17 0xe0
#define C_F18 0xf0
#define C_F19 0x100
#define C_F20 0x110
#define C_F21 0x120
#define C_F22 0x130
#define C_F23 0x140
#define C_F24 0x150
#define C_F25 0x160
#define C_F26 0x170
#define C_F27 0x180
#define C_F28 0x190
#define C_F29 0x1a0
#define C_F30 0x1b0
#define C_F31 0x1c0
#define C_FPSR 0x1d0
#define C_B0 0x1d8
#define C_B1 0x1e0
#define C_B2 0x1e8
#define C_B3 0x1f0
#define C_B4 0x1f8
#define C_B5 0x200
#define TT_R2 0x8
#define TT_R3 0x10
#define TT_R8 0x18
#define TT_R9 0x20
#define TT_R10 0x28
#define TT_R11 0x30
#define TT_R14 0x38
#endif _IA64GEN_H

View File

@@ -1,122 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// longjmp.s
///
/// Abstract:
///
///
.auto
.text
.proc InternalLongJump
.type InternalLongJump, @function
.regstk 2, 0, 0, 0
InternalLongJump::
add r10 = 0x10*20 + 8*14, in0
movl r2 = ~((((1 << 14) - 1) << 16) | 3)
ld8.nt1 r14 = [r10], -8*2 // BSP, skip PFS
mov r15 = ar.bspstore // BSPSTORE
ld8.nt1 r17 = [r10], -8 // UNAT after spill
mov r16 = ar.rsc // RSC
cmp.leu p6 = r14, r15
ld8.nt1 r18 = [r10], -8 // UNAT
ld8.nt1 r25 = [r10], -8 // b5
and r2 = r16, r2
ldf.fill.nt1 f2 = [in0], 0x10
ld8.nt1 r24 = [r10], -8 // b4
mov b5 = r25
mov ar.rsc = r2
ld8.nt1 r23 = [r10], -8 // b3
mov b4 = r24
ldf.fill.nt1 f3 = [in0], 0x10
mov ar.unat = r17
(p6) br.spnt.many _skip_flushrs
flushrs
mov r15 = ar.bsp // New BSPSTORE
_skip_flushrs:
mov r31 = ar.rnat // RNAT
loadrs
ldf.fill.nt1 f4 = [in0], 0x10
ld8.nt1 r22 = [r10], -8
dep r2 = -1, r14, 3, 6
ldf.fill.nt1 f5 = [in0], 0x10
ld8.nt1 r21 = [r10], -8
cmp.ltu p6 = r2, r15
ld8.nt1 r20 = [r10], -0x10 // skip sp
(p6) ld8.nta r31 = [r2]
mov b3 = r23
ldf.fill.nt1 f16 = [in0], 0x10
ld8.fill.nt1 r7 = [r10], -8
mov b2 = r22
ldf.fill.nt1 f17 = [in0], 0x10
ld8.fill.nt1 r6 = [r10], -8
mov b1 = r21
ldf.fill.nt1 f18 = [in0], 0x10
ld8.fill.nt1 r5 = [r10], -8
mov b0 = r20
ldf.fill.nt1 f19 = [in0], 0x10
ld8.fill.nt1 r4 = [r10], 8*13
ldf.fill.nt1 f20 = [in0], 0x10
ld8.nt1 r19 = [r10], 0x10 // PFS
ldf.fill.nt1 f21 = [in0], 0x10
ld8.nt1 r26 = [r10], 8 // Predicate
mov ar.pfs = r19
ldf.fill.nt1 f22 = [in0], 0x10
ld8.nt1 r27 = [r10], 8 // LC
mov pr = r26, -1
ldf.fill.nt1 f23 = [in0], 0x10
ld8.nt1 r28 = [r10], -17*8 - 0x10
mov ar.lc = r27
ldf.fill.nt1 f24 = [in0], 0x10
ldf.fill.nt1 f25 = [in0], 0x10
mov r8 = in1
ldf.fill.nt1 f26 = [in0], 0x10
ldf.fill.nt1 f31 = [r10], -0x10
ldf.fill.nt1 f27 = [in0], 0x10
ldf.fill.nt1 f30 = [r10], -0x10
ldf.fill.nt1 f28 = [in0]
ldf.fill.nt1 f29 = [r10], 0x10*3 + 8*4
ld8.fill.nt1 sp = [r10]
mov ar.unat = r18
mov ar.bspstore = r14
mov ar.rnat = r31
invala
mov ar.rsc = r16
br.ret.sptk b0
.endp

View File

@@ -1,109 +0,0 @@
/// Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
/// This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name:
///
/// setjmp.s
///
/// Abstract:
///
///
.auto
.text
.globl InternalAssertJumpBuffer
.type InternalAssertJumpBuffer, @function
.proc SetJump
.type SetJump, @function
SetJump::
alloc loc0 = ar.pfs, 1, 2, 1, 0
mov loc1 = b0
mov out0 = in0
brl.call.sptk.many b0 = InternalAssertJumpBuffer
mov r14 = ar.unat
mov r15 = ar.bsp
add r10 = 0x10*20, in0
stf.spill.nta [in0] = f2, 0x10
st8.spill.nta [r10] = r4, 8
mov r21 = b1
stf.spill.nta [in0] = f3, 0x10
st8.spill.nta [r10] = r5, 8
mov r22 = b2
stf.spill.nta [in0] = f4, 0x10
st8.spill.nta [r10] = r6, 8
mov r23 = b3
stf.spill.nta [in0] = f5, 0x10
st8.spill.nta [r10] = r7, 8
mov r24 = b4
stf.spill.nta [in0] = f16, 0x10
st8.spill.nta [r10] = sp, 8
mov r25 = b5
stf.spill.nta [in0] = f17, 0x10
st8.nta [r10] = loc1, 8
mov r16 = pr
stf.spill.nta [in0] = f18, 0x10
st8.nta [r10] = r21, 8
mov r17 = ar.lc
stf.spill.nta [in0] = f19, 0x10
st8.nta [r10] = r22, 8
stf.spill.nta [in0] = f20, 0x10
st8.nta [r10] = r23, 8
stf.spill.nta [in0] = f21, 0x10
st8.nta [r10] = r24, 8
stf.spill.nta [in0] = f22, 0x10
st8.nta [r10] = r25, 8
stf.spill.nta [in0] = f23, 0x10
mov r18 = ar.unat
stf.spill.nta [in0] = f24, 0x10
st8.nta [r10] = r14, 8 // UNAT
stf.spill.nta [in0] = f25, 0x10
st8.nta [r10] = r18, 8 // UNAT after spill
stf.spill.nta [in0] = f26, 0x10
st8.nta [r10] = loc0, 8 // PFS
stf.spill.nta [in0] = f27, 0x10
st8.nta [r10] = r15, 8 // BSP
mov r8 = 0
stf.spill.nta [in0] = f28, 0x10
mov r19 = ar.fpsr
stf.spill.nta [in0] = f29, 0x10
st8.nta [r10] = r16, 8 // PR
mov ar.pfs = loc0
stf.spill.nta [in0] = f30, 0x10
st8.nta [r10] = r17, 8 // LC
mov b0 = loc1
stf.spill.nta [in0] = f31, 0x10
st8.nta [r10] = r19 // FPSR
mov ar.unat = r14
br.ret.sptk b0
.endp SetJump

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -101,11 +101,6 @@ COMPONENT_TYPE = LIBRARY
CopyMemWrapper.c
MemLibGuid.c
[sources.ipf]
Ipf/CopyMem.c
Ipf/MemLibGeneric.c
Ipf/SetMem.c
[sources.ebc]
Ebc/CopyMem.c
Ebc/MemLibGeneric.c
@@ -145,9 +140,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,65 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CopyMem.c
Abstract:
Internal CopyMem
--*/
#include "BaseMemoryLibInternal.h"
/**
Copy Length bytes from Source to Destination.
@param Destination Target of copy
@param Source Place to copy from
@param Length Number of bytes to copy
@return Destination
**/
VOID *
EFIAPI
InternalMemCopyMem (
OUT VOID *Destination,
IN CONST VOID *Source,
IN UINTN Length
)
{
//
// Declare the local variables that actually move the data elements as
// volatile to prevent the optimizer from replacing this function with
// the intrinsic memcpy()
//
volatile UINT8 *Destination8;
CONST UINT8 *Source8;
if (Source > Destination) {
Destination8 = (UINT8*)Destination;
Source8 = (CONST UINT8*)Source;
while (Length-- != 0) {
*(Destination8++) = *(Source8++);
}
} else if (Source < Destination) {
Destination8 = (UINT8*)Destination + Length;
Source8 = (CONST UINT8*)Source + Length;
while (Length-- != 0) {
*(--Destination8) = *(--Source8);
}
}
return Destination;
}

View File

@@ -1,261 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
MemLibGeneric.c
Abstract:
Architecture Independent Base Memory Library Implementation.
--*/
#include "BaseMemoryLibInternal.h"
/**
Fills a target buffer with a 16-bit value, and returns the target buffer.
@param Buffer Pointer to the target buffer to fill.
@param Length Number of bytes in Buffer to fill.
@param Value Value with which to fill Length bytes of Buffer.
@return Buffer
**/
VOID *
EFIAPI
InternalMemSetMem16 (
OUT VOID *Buffer,
IN UINTN Length,
IN UINT16 Value
)
{
do {
((UINT16*)Buffer)[--Length] = Value;
} while (Length != 0);
return Buffer;
}
/**
Fills a target buffer with a 32-bit value, and returns the target buffer.
@param Buffer Pointer to the target buffer to fill.
@param Length Number of bytes in Buffer to fill.
@param Value Value with which to fill Length bytes of Buffer.
@return Buffer
**/
VOID *
EFIAPI
InternalMemSetMem32 (
OUT VOID *Buffer,
IN UINTN Length,
IN UINT32 Value
)
{
do {
((UINT32*)Buffer)[--Length] = Value;
} while (Length != 0);
return Buffer;
}
/**
Fills a target buffer with a 64-bit value, and returns the target buffer.
@param Buffer Pointer to the target buffer to fill.
@param Length Number of bytes in Buffer to fill.
@param Value Value with which to fill Length bytes of Buffer.
@return Buffer
**/
VOID *
EFIAPI
InternalMemSetMem64 (
OUT VOID *Buffer,
IN UINTN Length,
IN UINT64 Value
)
{
do {
((UINT64*)Buffer)[--Length] = Value;
} while (Length != 0);
return Buffer;
}
/**
Set Buffer to 0 for Size bytes.
@param Buffer Memory to set.
@param Size Number of bytes to set
@return Buffer
**/
VOID *
EFIAPI
InternalMemZeroMem (
OUT VOID *Buffer,
IN UINTN Length
)
{
return InternalMemSetMem (Buffer, Length, 0);
}
/**
Compares two memory buffers of a given length.
@param DestinationBuffer First memory buffer
@param SourceBuffer Second memory buffer
@param Length Length of DestinationBuffer and SourceBuffer memory
regions to compare. Must be non-zero.
@retval 0 if MemOne == MemTwo
**/
INTN
EFIAPI
InternalMemCompareMem (
IN CONST VOID *DestinationBuffer,
IN CONST VOID *SourceBuffer,
IN UINTN Length
)
{
while ((--Length != 0) &&
(*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {
DestinationBuffer = (INT8*)DestinationBuffer + 1;
SourceBuffer = (INT8*)SourceBuffer + 1;
}
return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;
}
/**
Scans a target buffer for an 8-bit value, and returns a pointer to the
matching 8-bit value in the target buffer.
@param Buffer Pointer to the target buffer to scan.
@param Length Number of bytes in Buffer to scan. Must be non-zero.
@param Value Value to search for in the target buffer.
@return Pointer to the first occurrence or NULL if not found.
**/
CONST VOID *
EFIAPI
InternalMemScanMem8 (
IN CONST VOID *Buffer,
IN UINTN Length,
IN UINT8 Value
)
{
CONST UINT8 *Pointer;
Pointer = (CONST UINT8*)Buffer;
do {
if (*(Pointer++) == Value) {
return Pointer;
}
} while (--Length != 0);
return NULL;
}
/**
Scans a target buffer for a 16-bit value, and returns a pointer to the
matching 16-bit value in the target buffer.
@param Buffer Pointer to the target buffer to scan.
@param Length Number of bytes in Buffer to scan. Must be non-zero.
@param Value Value to search for in the target buffer.
@return Pointer to the first occurrence or NULL if not found.
**/
CONST VOID *
EFIAPI
InternalMemScanMem16 (
IN CONST VOID *Buffer,
IN UINTN Length,
IN UINT16 Value
)
{
CONST UINT16 *Pointer;
Pointer = (CONST UINT16*)Buffer;
do {
if (*(Pointer++) == Value) {
return Pointer;
}
} while (--Length != 0);
return NULL;
}
/**
Scans a target buffer for a 32-bit value, and returns a pointer to the
matching 32-bit value in the target buffer.
@param Buffer Pointer to the target buffer to scan.
@param Length Number of bytes in Buffer to scan. Must be non-zero.
@param Value Value to search for in the target buffer.
@return Pointer to the first occurrence or NULL if not found.
**/
CONST VOID *
EFIAPI
InternalMemScanMem32 (
IN CONST VOID *Buffer,
IN UINTN Length,
IN UINT32 Value
)
{
CONST UINT32 *Pointer;
Pointer = (CONST UINT32*)Buffer;
do {
if (*(Pointer++) == Value) {
return Pointer;
}
} while (--Length != 0);
return NULL;
}
/**
Scans a target buffer for a 64-bit value, and returns a pointer to the
matching 64-bit value in the target buffer.
@param Buffer Pointer to the target buffer to scan.
@param Length Number of bytes in Buffer to scan. Must be non-zero.
@param Value Value to search for in the target buffer.
@return Pointer to the first occurrence or NULL if not found.
**/
CONST VOID *
EFIAPI
InternalMemScanMem64 (
IN CONST VOID *Buffer,
IN UINTN Length,
IN UINT64 Value
)
{
CONST UINT64 *Pointer;
Pointer = (CONST UINT64*)Buffer;
do {
if (*(Pointer++) == Value) {
return Pointer;
}
} while (--Length != 0);
return NULL;
}

View File

@@ -1,55 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
SetMem.c
Abstract:
Internal SetMem
--*/
#include "BaseMemoryLibInternal.h"
/**
Set Buffer to Value for Size bytes.
@param Buffer Memory to set.
@param Size Number of bytes to set
@param Value Value of the set operation.
@return Buffer
**/
VOID *
EFIAPI
InternalMemSetMem (
IN VOID *Buffer,
IN UINTN Size,
IN UINT8 Value
)
{
//
// Declare the local variables that actually move the data elements as
// volatile to prevent the optimizer from replacing this function with
// the intrinsic memset()
//
volatile UINT8 *Pointer;
Pointer = (UINT8*)Buffer;
while (Size-- != 0) {
*(Pointer++) = Value;
}
return Buffer;
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -75,9 +72,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -74,9 +71,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -72,9 +69,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -72,9 +69,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -75,9 +72,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
X64/PeCoffLoaderEx.c
[sources.ipf]
Ipf/PeCoffLoaderEx.c
[sources.ebc]
Ebc/PeCoffLoaderEx.c
@@ -74,9 +71,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,430 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PeCoffLoaderEx.c
Abstract:
IA-32 Specific relocation fixups.
--*/
#include "BasePeCoffLibInternals.h"
#define EFI_IMAGE_MACHINE_IPF EFI_IMAGE_MACHINE_IA64
#define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
#define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
*(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
#define IMM64_IMM7B_INST_WORD_X 3
#define IMM64_IMM7B_SIZE_X 7
#define IMM64_IMM7B_INST_WORD_POS_X 4
#define IMM64_IMM7B_VAL_POS_X 0
#define IMM64_IMM9D_INST_WORD_X 3
#define IMM64_IMM9D_SIZE_X 9
#define IMM64_IMM9D_INST_WORD_POS_X 18
#define IMM64_IMM9D_VAL_POS_X 7
#define IMM64_IMM5C_INST_WORD_X 3
#define IMM64_IMM5C_SIZE_X 5
#define IMM64_IMM5C_INST_WORD_POS_X 13
#define IMM64_IMM5C_VAL_POS_X 16
#define IMM64_IC_INST_WORD_X 3
#define IMM64_IC_SIZE_X 1
#define IMM64_IC_INST_WORD_POS_X 12
#define IMM64_IC_VAL_POS_X 21
#define IMM64_IMM41a_INST_WORD_X 1
#define IMM64_IMM41a_SIZE_X 10
#define IMM64_IMM41a_INST_WORD_POS_X 14
#define IMM64_IMM41a_VAL_POS_X 22
#define IMM64_IMM41b_INST_WORD_X 1
#define IMM64_IMM41b_SIZE_X 8
#define IMM64_IMM41b_INST_WORD_POS_X 24
#define IMM64_IMM41b_VAL_POS_X 32
#define IMM64_IMM41c_INST_WORD_X 2
#define IMM64_IMM41c_SIZE_X 23
#define IMM64_IMM41c_INST_WORD_POS_X 0
#define IMM64_IMM41c_VAL_POS_X 40
#define IMM64_SIGN_INST_WORD_X 3
#define IMM64_SIGN_SIZE_X 1
#define IMM64_SIGN_INST_WORD_POS_X 27
#define IMM64_SIGN_VAL_POS_X 63
/**
Performs an Itanium-based specific relocation fixup.
@param Reloc Pointer to the relocation record.
@param Fixup Pointer to the address to fix up.
@param FixupData Pointer to a buffer to log the fixups.
@param Adjust The offset to adjust the fixup.
@return Status code.
**/
RETURN_STATUS
GluePeCoffLoaderRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
UINT64 *F64;
UINT64 FixupVal;
switch ((*Reloc) >> 12) {
case EFI_IMAGE_REL_BASED_IA64_IMM64:
//
// Align it to bundle address before fixing up the
// 64-bit immediate value of the movl instruction.
//
Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
FixupVal = (UINT64)0;
//
// Extract the lower 32 bits of IMM64 from bundle
//
EXT_IMM64(FixupVal,
(UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
EXT_IMM64(FixupVal,
(UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
EXT_IMM64(FixupVal,
(UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
EXT_IMM64(FixupVal,
(UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
EXT_IMM64(FixupVal,
(UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
//
// Update 64-bit address
//
FixupVal += Adjust;
//
// Insert IMM64 into bundle
//
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),
IMM64_IMM41b_SIZE_X,
IMM64_IMM41b_INST_WORD_POS_X,
IMM64_IMM41b_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),
IMM64_IMM41c_SIZE_X,
IMM64_IMM41c_INST_WORD_POS_X,
IMM64_IMM41c_VAL_POS_X
);
INS_IMM64(FixupVal,
((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
IMM64_SIGN_SIZE_X,
IMM64_SIGN_INST_WORD_POS_X,
IMM64_SIGN_VAL_POS_X
);
F64 = (UINT64 *) Fixup;
if (*FixupData != NULL) {
*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
*(UINT64 *)(*FixupData) = *F64;
*FixupData = *FixupData + sizeof(UINT64);
}
break;
default:
return RETURN_UNSUPPORTED;
}
return RETURN_SUCCESS;
}
/**
Returns TRUE if the machine type of PE/COFF image is supported. Supported
does not mean the image can be executed it means the PE/COFF loader supports
loading and relocating of the image type. It's up to the caller to support
the entry point.
This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
& X64 images. Calling the entry point in a correct mannor is up to the
consumer of this library. This version also supports the special relocations
for Itanium.
@param Machine Machine type from the PE Header.
@return TRUE if this PE/COFF loader can load the image
**/
BOOLEAN
PeCoffLoaderImageFormatSupported (
IN UINT16 Machine
)
{
if ((Machine == EFI_IMAGE_MACHINE_IPF) || (Machine == EFI_IMAGE_MACHINE_IA32) ||
(Machine == EFI_IMAGE_MACHINE_EBC) || (Machine == EFI_IMAGE_MACHINE_X64)) {
return TRUE;
}
return FALSE;
}
/**
ImageRead function that operates on a memory buffer whos base is passed into
FileHandle.
@param Reloc Ponter to baes of the input stream
@param Fixup Offset to the start of the buffer
@param FixupData Number of bytes to copy into the buffer
@param Adjust Location to place results of read
@retval RETURN_SUCCESS Data is read from FileOffset from the Handle into
the buffer.
**/
RETURN_STATUS
GluePeHotRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
UINT64 *F64;
UINT64 FixupVal;
switch ((*Reloc) >> 12) {
case EFI_IMAGE_REL_BASED_DIR64:
F64 = (UINT64 *) Fixup;
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
if (*(UINT64 *) (*FixupData) == *F64) {
*F64 = *F64 + (UINT64) Adjust;
}
*FixupData = *FixupData + sizeof (UINT64);
break;
case EFI_IMAGE_REL_BASED_IA64_IMM64:
F64 = (UINT64 *) Fixup;
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
if (*(UINT64 *) (*FixupData) == *F64) {
//
// Align it to bundle address before fixing up the
// 64-bit immediate value of the movl instruction.
//
//
Fixup = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));
FixupVal = (UINT64) 0;
//
// Extract the lower 32 bits of IMM64 from bundle
//
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IC_INST_WORD_X,
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X,
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
//
// Update 64-bit address
//
FixupVal += Adjust;
//
// Insert IMM64 into bundle
//
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X),
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41b_INST_WORD_X),
IMM64_IMM41b_SIZE_X,
IMM64_IMM41b_INST_WORD_POS_X,
IMM64_IMM41b_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41c_INST_WORD_X),
IMM64_IMM41c_SIZE_X,
IMM64_IMM41c_INST_WORD_POS_X,
IMM64_IMM41c_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),
IMM64_SIGN_SIZE_X,
IMM64_SIGN_INST_WORD_POS_X,
IMM64_SIGN_VAL_POS_X
);
*(UINT64 *) (*FixupData) = *F64;
}
*FixupData = *FixupData + sizeof (UINT64);
break;
default:
DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));
return RETURN_UNSUPPORTED;
}
return RETURN_SUCCESS;
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,9 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -72,9 +69,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,9 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -75,9 +72,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,9 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -73,9 +70,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
X86TimerLib.c
X64/X86LocalApicTimerInitialize.asm
[sources.ipf]
Ipf/IpfTimerLib.c
[sources.ebc]
Ebc/EbcTimerLib.c
@@ -76,9 +73,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,178 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
IpfTimerLib.c
Abstract:
Timer Library functions built upon local APIC on IA32/x64.
@bug Should use PCD to retrieve all the constants including index of
the IA32_APIC_BASE MSR, the offsets of InitialCount, CorrentCount
and DivideConfiguration.
--*/
#include "EdkIIGlueBase.h"
/**
Performs a delay measured as number of ticks.
An internal function to perform a delay measured as number of ticks. It's
invoked by MicroSecondDelay() and NanoSecondDelay().
@param Delay Number of ticks to delay.
**/
STATIC
VOID
InternalIpfDelay (
IN INT64 Delay
)
{
INT64 Ticks;
//
// The target timer count is calculated here
//
Ticks = (INT64)AsmReadItc () + Delay;
//
// Wait until time out
// Delay > 2^63 could not be handled by this function
// Timer wrap-arounds are handled correctly by this function
//
while (Ticks - (INT64)AsmReadItc() >= 0);
}
/**
Stalls the CPU for at least the given number of microseconds.
Stalls the CPU for the number of microseconds specified by MicroSeconds.
@param MicroSeconds The minimum number of microseconds to delay.
@return MicroSeconds
**/
UINTN
EFIAPI
MicroSecondDelay (
IN UINTN MicroSeconds
)
{
InternalIpfDelay (
GetPerformanceCounterProperties (NULL, NULL) *
MicroSeconds /
1000000
);
return MicroSeconds;
}
/**
Stalls the CPU for at least the given number of nanoseconds.
Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
@param NanoSeconds The minimum number of nanoseconds to delay.
@return NanoSeconds
**/
UINTN
EFIAPI
NanoSecondDelay (
IN UINTN NanoSeconds
)
{
InternalIpfDelay (
GetPerformanceCounterProperties (NULL, NULL) *
NanoSeconds /
1000000000
);
return NanoSeconds;
}
/**
Retrieves the current value of a 64-bit free running performance counter.
Retrieves the current value of a 64-bit free running performance counter. The
counter can either count up by 1 or count down by 1. If the physical
performance counter counts by a larger increment, then the counter values
must be translated. The properties of the counter can be retrieved from
GetPerformanceCounterProperties().
@return The current value of the free running performance counter.
**/
UINT64
EFIAPI
GetPerformanceCounter (
VOID
)
{
return AsmReadItc ();
}
/**
Retrieves the 64-bit frequency in Hz and the range of performance counter
values.
If StartValue is not NULL, then the value that the performance counter starts
with immediately after is it rolls over is returned in StartValue. If
EndValue is not NULL, then the value that the performance counter end with
immediately before it rolls over is returned in EndValue. The 64-bit
frequency of the performance counter in Hz is always returned. If StartValue
is less than EndValue, then the performance counter counts up. If StartValue
is greater than EndValue, then the performance counter counts down. For
example, a 64-bit free running counter that counts up would have a StartValue
of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
@param StartValue The value the performance counter starts with when it
rolls over.
@param EndValue The value that the performance counter ends with before
it rolls over.
@return The frequency in Hz.
**/
UINT64
EFIAPI
GetPerformanceCounterProperties (
OUT UINT64 *StartValue, OPTIONAL
OUT UINT64 *EndValue OPTIONAL
)
{
PAL_CALL_RETURN PalRet;
UINT64 BaseFrequence;
PalRet = PalCallStatic (NULL, 13, 0, 0, 0);
ASSERT (PalRet.Status == 0);
BaseFrequence = PalRet.r9;
PalRet = PalCallStatic (NULL, 14, 0, 0, 0);
ASSERT (PalRet.Status == 0);
if (StartValue != NULL) {
*StartValue = 0;
}
if (EndValue != NULL) {
*EndValue = (UINT64)(-1);
}
return BaseFrequence * (PalRet.r11 >> 32) / (UINT32)PalRet.r11;
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -69,9 +67,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -75,9 +73,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,8 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -71,9 +69,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -72,9 +70,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,8 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -76,9 +74,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -88,9 +86,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -70,9 +68,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,8 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -73,9 +71,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -35,10 +35,6 @@ COMPONENT_TYPE = LIBRARY
Common/RuntimeLib.c
Common/RuntimeService.c
[sources.ipf]
Ipf/RuntimeLib.c
Ipf/RuntimeService.c
[sources.ebc]
Common/RuntimeLib.c
Common/RuntimeService.c
@@ -74,9 +70,6 @@ COMPONENT_TYPE = LIBRARY
[libraries.x64]
[libraries.ipf]
EdkIIGlueEdkDxeSalLib
[nmake.common]
C_FLAGS = $(C_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
LIB_STD_FLAGS = $(LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
@@ -87,9 +80,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,243 +0,0 @@
/*++
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
RuntimeLib.c
Abstract:
Runtime lib
--*/
#include "../RuntimeLibInternal.h"
//
// Driver Lib Module Globals
//
static EFI_EVENT mEfiVirtualNotifyEvent;
EFI_RUNTIME_SERVICES *mRTEdkDxeRuntimeDriverLib;
VOID
EFIAPI
RuntimeDriverExitBootServices (
IN EFI_EVENT Event,
IN VOID *Context
)
/*++
Routine Description:
Set AtRuntime flag as TRUE after ExitBootServices
Arguments:
Event - The Event that is being processed
Context - Event Context
Returns:
None
--*/
{
if (EfiAtRuntime()) {
return;
}
}
STATIC
VOID
EFIAPI
RuntimeLibVirtualNotifyEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
/*++
Routine Description:
Fixup internal data so that EFI can be call in virtual mode.
Call the passed in Child Notify event and convert any pointers in
lib to virtual mode.
Arguments:
Event - The Event that is being processed
Context - Event Context
Returns:
None
--*/
{
UINTN Index;
EFI_EVENT_NOTIFY ChildNotifyEventHandler;
for (Index = 0; _gDriverSetVirtualAddressMapEvent[Index] != NULL; Index++) {
ChildNotifyEventHandler = _gDriverSetVirtualAddressMapEvent[Index];
ChildNotifyEventHandler (Event, NULL);
}
//
// Update global for Runtime Services Table
//
EfiConvertPointer (0, (VOID **) &mRTEdkDxeRuntimeDriverLib);
}
EFI_STATUS
EFIAPI
RuntimeDriverLibConstruct (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
/*++
Routine Description:
Intialize runtime Driver Lib if it has not yet been initialized.
Arguments:
ImageHandle - The firmware allocated handle for the EFI image.
SystemTable - A pointer to the EFI System Table.
GoVirtualChildEvent - Caller can register a virtual notification event.
Returns:
EFI_STATUS always returns EFI_SUCCESS except EFI_ALREADY_STARTED if already started.
--*/
{
EFI_STATUS Status;
mRTEdkDxeRuntimeDriverLib = SystemTable->RuntimeServices;
//
// Register SetVirtualAddressMap () notify function
//
if (_gDriverSetVirtualAddressMapEvent[0] != NULL) {
Status = gBS->CreateEvent (
EFI_EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE,
EFI_TPL_NOTIFY,
RuntimeLibVirtualNotifyEvent,
NULL,
&mEfiVirtualNotifyEvent
);
ASSERT_EFI_ERROR (Status);
}
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
RuntimeDriverLibDeconstruct (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
/*++
Routine Description:
This routine will free some resources which have been allocated in
EfiInitializeRuntimeDriverLib(). If a runtime driver exits with an error,
it must call this routine to free the allocated resource before the exiting.
Arguments:
None
Returns:
EFI_SUCCESS - Shotdown the Runtime Driver Lib successfully
EFI_UNSUPPORTED - Runtime Driver lib was not initialized at all
--*/
{
EFI_STATUS Status;
//
// Close SetVirtualAddressMap () notify function
//
if (_gDriverSetVirtualAddressMapEvent[0] != NULL) {
Status = gBS->CloseEvent (mEfiVirtualNotifyEvent);
ASSERT_EFI_ERROR (Status);
}
return EFI_SUCCESS;
}
BOOLEAN
EFIAPI
EfiAtRuntime (
VOID
)
/*++
Routine Description:
Return TRUE if ExitBootService () has been called
Arguments:
NONE
Returns:
TRUE - If ExitBootService () has been called
--*/
{
EFI_GUID Guid;
SAL_RETURN_REGS ReturnReg;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, IsEfiRuntime, 0, 0, 0, 0, 0, 0, 0);
return (BOOLEAN) (ReturnReg.r9 == 1);
}
BOOLEAN
EFIAPI
EfiGoneVirtual (
VOID
)
/*++
Routine Description:
Return TRUE if SetVirtualAddressMap () has been called
Arguments:
NONE
Returns:
TRUE - If SetVirtualAddressMap () has been called
--*/
{
EFI_GUID Guid;
SAL_RETURN_REGS ReturnReg;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, IsVirtual, 0, 0, 0, 0, 0, 0, 0);
return (BOOLEAN) (ReturnReg.r9 == 1);
}

View File

@@ -1,557 +0,0 @@
/*++
Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
RuntimeService.c
Abstract:
Runtime Lib
--*/
#include "../RuntimeLibInternal.h"
VOID
EFIAPI
EfiResetSystem (
IN EFI_RESET_TYPE ResetType,
IN EFI_STATUS ResetStatus,
IN UINTN DataSize,
IN CHAR16 *ResetData
)
/*++
Routine Description:
Resets the entire platform.
Arguments:
ResetType - The type of reset to perform.
ResetStatus - The status code for the reset.
DataSize - The size, in bytes, of ResetData.
ResetData - A data buffer that includes a Null-terminated Unicode string, optionally
followed by additional binary data.
Returns:
None
--*/
{
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_RESET_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_RESET_SERVICES_PROTOCOL_GUID_HI;
EfiCallEsalService (
&Guid,
ResetSystem,
(UINT64) ResetType,
(UINT64) ResetStatus,
(UINT64) DataSize,
(UINT64) ResetData,
0,
0,
0
);
}
//
// The following functions hide the mRTEdkDxeRuntimeDriverLib local global from the call to
// runtime service in the EFI system table.
//
EFI_STATUS
EFIAPI
EfiGetTime (
OUT EFI_TIME *Time,
OUT EFI_TIME_CAPABILITIES *Capabilities
)
/*++
Routine Description:
Returns the current time and date information, and the time-keeping
capabilities of the hardware platform.
Arguments:
Time - A pointer to storage to receive a snapshot of the current time.
Capabilities - An optional pointer to a buffer to receive the real time clock device's
capabilities.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, GetTime, (UINT64) Time, (UINT64) Capabilities, 0, 0, 0, 0, 0);
return ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiSetTime (
IN EFI_TIME *Time
)
/*++
Routine Description:
Sets the current local time and date information.
Arguments:
Time - A pointer to the current time.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, SetTime, (UINT64) Time, 0, 0, 0, 0, 0, 0);
return ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiGetWakeupTime (
OUT BOOLEAN *Enabled,
OUT BOOLEAN *Pending,
OUT EFI_TIME *Time
)
/*++
Routine Description:
Returns the current wakeup alarm clock setting.
Arguments:
Enabled - Indicates if the alarm is currently enabled or disabled.
Pending - Indicates if the alarm signal is pending and requires acknowledgement.
Time - The current alarm setting.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, GetWakeupTime, (UINT64) Enabled, (UINT64) Pending, (UINT64) Time, 0, 0, 0, 0);
return ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiSetWakeupTime (
IN BOOLEAN Enable,
IN EFI_TIME *Time
)
/*++
Routine Description:
Sets the system wakeup alarm clock time.
Arguments:
Enable - Enable or disable the wakeup alarm.
Time - If Enable is TRUE, the time to set the wakeup alarm for.
If Enable is FALSE, then this parameter is optional, and may be NULL.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_RTC_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, SetWakeupTime, (UINT64) Enable, (UINT64) Time, 0, 0, 0, 0, 0);
return ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiGetVariable (
IN CHAR16 *VariableName,
IN EFI_GUID * VendorGuid,
OUT UINT32 *Attributes OPTIONAL,
IN OUT UINTN *DataSize,
OUT VOID *Data
)
/*++
Routine Description:
Returns the value of a variable.
Arguments:
VariableName - A Null-terminated Unicode string that is the name of the
vendor's variable.
VendorGuid - A unique identifier for the vendor.
Attributes - If not NULL, a pointer to the memory location to return the
attributes bitmask for the variable.
DataSize - On input, the size in bytes of the return Data buffer.
On output the size of data returned in Data.
Data - The buffer to return the contents of the variable.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (
&Guid,
EsalGetVariable,
(UINT64) VariableName,
(UINT64) VendorGuid,
(UINT64) Attributes,
(UINT64) DataSize,
(UINT64) Data,
0,
0
);
return (EFI_STATUS) ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiGetNextVariableName (
IN OUT UINTN *VariableNameSize,
IN OUT CHAR16 *VariableName,
IN OUT EFI_GUID *VendorGuid
)
/*++
Routine Description:
Enumerates the current variable names.
Arguments:
VariableNameSize - The size of the VariableName buffer.
VariableName - On input, supplies the last VariableName that was returned
by GetNextVariableName().
On output, returns the Nullterminated Unicode string of the
current variable.
VendorGuid - On input, supplies the last VendorGuid that was returned by
GetNextVariableName().
On output, returns the VendorGuid of the current variable.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (
&Guid,
EsalGetNextVariableName,
(UINT64) VariableNameSize,
(UINT64) VariableName,
(UINT64) VendorGuid,
0,
0,
0,
0
);
return (EFI_STATUS) ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiSetVariable (
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
IN UINT32 Attributes,
IN UINTN DataSize,
IN VOID *Data
)
/*++
Routine Description:
Sets the value of a variable.
Arguments:
VariableName - A Null-terminated Unicode string that is the name of the
vendor's variable.
VendorGuid - A unique identifier for the vendor.
Attributes - Attributes bitmask to set for the variable.
DataSize - The size in bytes of the Data buffer.
Data - The contents for the variable.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VARIABLE_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (
&Guid,
EsalSetVariable,
(UINT64) VariableName,
(UINT64) VendorGuid,
(UINT64) Attributes,
(UINT64) DataSize,
(UINT64) Data,
0,
0
);
return (EFI_STATUS) ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiGetNextHighMonotonicCount (
OUT UINT32 *HighCount
)
/*++
Routine Description:
Returns the next high 32 bits of the platform's monotonic counter.
Arguments:
HighCount - Pointer to returned value.
Returns:
Status code
--*/
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_MTC_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_MTC_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (&Guid, GetNextHighMonotonicCount, (UINT64) HighCount, 0, 0, 0, 0, 0, 0);
return (EFI_STATUS) ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiConvertPointer (
IN UINTN DebugDisposition,
IN OUT VOID **Address
)
/*++
Routine Description:
Determines the new virtual address that is to be used on subsequent memory accesses.
Arguments:
DebugDisposition - Supplies type information for the pointer being converted.
Address - A pointer to a pointer that is to be fixed to be the value needed
for the new virtual address mappings being applied.
Returns:
Status code
--*/
{
return mRTEdkDxeRuntimeDriverLib->ConvertPointer (DebugDisposition, Address);
}
EFI_STATUS
EFIAPI
EfiConvertList (
IN UINTN DebugDisposition,
IN OUT LIST_ENTRY *ListHead
)
/*++
Routine Description:
Conver the standard Lib double linked list to a virtual mapping.
Arguments:
DebugDisposition - Argument to EfiConvertPointer (EFI 1.0 API)
ListHead - Head of linked list to convert
Returns:
EFI_SUCCESS
--*/
{
LIST_ENTRY *Link;
LIST_ENTRY *NextLink;
//
// Convert all the ForwardLink & BackLink pointers in the list
//
Link = ListHead;
do {
NextLink = Link->ForwardLink;
EfiConvertPointer (
Link->ForwardLink == ListHead ? DebugDisposition : 0,
(VOID **) &Link->ForwardLink
);
EfiConvertPointer (
Link->BackLink == ListHead ? DebugDisposition : 0,
(VOID **) &Link->BackLink
);
Link = NextLink;
} while (Link != ListHead);
return EFI_SUCCESS;
}
/**
Change the runtime addressing mode of EFI firmware from physical to virtual.
@param MemoryMapSize The size in bytes of VirtualMap.
@param DescriptorSize The size in bytes of an entry in the VirtualMap.
@param DescriptorVersion The version of the structure entries in VirtualMap.
@param VirtualMap An array of memory descriptors which contain new virtual
address mapping information for all runtime ranges. Type
EFI_MEMORY_DESCRIPTOR is defined in the
GetMemoryMap() function description.
@retval EFI_SUCCESS The virtual address map has been applied.
@retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in
virtual address mapped mode.
@retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is
invalid.
@retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory
map that requires a mapping.
@retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found
in the memory map.
**/
EFI_STATUS
EFIAPI
EfiSetVirtualAddressMap (
IN UINTN MemoryMapSize,
IN UINTN DescriptorSize,
IN UINT32 DescriptorVersion,
IN CONST EFI_MEMORY_DESCRIPTOR *VirtualMap
)
{
SAL_RETURN_REGS ReturnReg;
EFI_GUID Guid;
*((UINT64 *) &Guid) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_LO;
*(((UINT64 *)&Guid) + 1) = EFI_EXTENDED_SAL_VIRTUAL_SERVICES_PROTOCOL_GUID_HI;
ReturnReg = EfiCallEsalService (
&Guid,
SetVirtualAddress,
(UINT64) MemoryMapSize,
(UINT64) DescriptorSize,
(UINT64) DescriptorVersion,
(UINT64) VirtualMap,
0,
0,
0
);
return ReturnReg.Status;
}
EFI_STATUS
EFIAPI
EfiUpdateCapsule (
IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
IN UINTN CapsuleCount,
IN EFI_PHYSICAL_ADDRESS ScatterGatherList OPTIONAL
)
{
return EFI_UNSUPPORTED;
}
EFI_STATUS
EFIAPI
EfiQueryCapsuleCapabilities (
IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
IN UINTN CapsuleCount,
OUT UINT64 *MaximumCapsuleSize,
OUT EFI_RESET_TYPE *ResetType
)
{
return EFI_UNSUPPORTED;
}
EFI_STATUS
EFIAPI
EfiQueryVariableInfo (
IN UINT32 Attributes,
OUT UINT64 *MaximumVariableStorageSize,
OUT UINT64 *RemainingVariableStorageSize,
OUT UINT64 *MaximumVariableSize
)
{
return EFI_UNSUPPORTED;
}

View File

@@ -1,83 +0,0 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EdkDxeSalLib.inf
#
# Abstract:
#
# SAL library for BS/RT drivers
#
#--*/
[defines]
BASE_NAME = EdkIIGlueEdkDxeSalLib
COMPONENT_TYPE = LIBRARY
[sources.common]
[sources.ia32]
[sources.x64]
[sources.ipf]
Ipf/EsalServiceLib.c
Ipf/AsmEsalServiceLib.s
[sources.ebc]
[includes.common]
.
../../Include
../../include/Library
$(EDK_SOURCE)/Foundation
$(EDK_SOURCE)/Foundation/Framework
$(EDK_SOURCE)/Foundation/Efi
$(EDK_SOURCE)/Foundation/Include
$(EDK_SOURCE)/Foundation/Efi/Include
$(EDK_SOURCE)/Foundation/Framework/Include
$(EDK_SOURCE)/Foundation/Include/IndustryStandard
$(EDK_SOURCE)/Foundation/Core/Dxe
$(EDK_SOURCE)/Foundation/Library/Dxe/Include
$(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
$(EDK_SOURCE)/Foundation/Framework/Guid/DataHubRecords
$(EDK_SOURCE)/Foundation/Framework/Guid/StatusCodeDataTypeId
[libraries.common]
[libraries.ia32]
[libraries.x64]
[libraries.ipf]
EdkIIGlueBaseLib
EdkIIGlueUefiBootServicesTableLib
EdkProtocolLib
[nmake.common]
C_FLAGS = $(C_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
LIB_STD_FLAGS = $(LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
[nmake.ia32]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IA32
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D MDE_CPU_EBC

View File

@@ -1,149 +0,0 @@
//++
// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// EsalLib.s
//
// Abstract:
//
//
// Revision History:
//
//--
.file "EsalLib.s"
#include "IpfMacro.i"
//
// Exports
//
.globl GetEsalEntryPoint
//-----------------------------------------------------------------------------
//++
// GetEsalEntryPoint
//
// Return Esal global and PSR register.
//
// On Entry :
//
//
// Return Value:
// r8 = EFI_SAL_SUCCESS
// r9 = Physical Plabel
// r10 = Virtual Plabel
// r11 = psr
//
// As per static calling conventions.
//
//--
//---------------------------------------------------------------------------
PROCEDURE_ENTRY (GetEsalEntryPoint)
NESTED_SETUP (0,8,0,0)
EsalCalcStart:
mov r8 = ip;;
add r8 = (EsalEntryPoint - EsalCalcStart), r8;;
mov r9 = r8;;
add r10 = 0x10, r8;;
mov r11 = psr;;
mov r8 = r0;;
NESTED_RETURN
PROCEDURE_EXIT (GetEsalEntryPoint)
//-----------------------------------------------------------------------------
//++
// SetEsalPhysicalEntryPoint
//
// Set the dispatcher entry point
//
// On Entry:
// in0 = Physical address of Esal Dispatcher
// in1 = Physical GP
//
// Return Value:
// r8 = EFI_SAL_SUCCESS
//
// As per static calling conventions.
//
//--
//---------------------------------------------------------------------------
PROCEDURE_ENTRY (SetEsalPhysicalEntryPoint)
NESTED_SETUP (2,8,0,0)
EsalCalcStart1:
mov r8 = ip;;
add r8 = (EsalEntryPoint - EsalCalcStart1), r8;;
st8 [r8] = in0;;
add r8 = 0x08, r8;;
st8 [r8] = in1;;
mov r8 = r0;;
NESTED_RETURN
PROCEDURE_EXIT (SetEsalPhysicalEntryPoint)
//-----------------------------------------------------------------------------
//++
// SetEsalVirtualEntryPoint
//
// Register physical address of Esal globals.
//
// On Entry :
// in0 = Virtual address of Esal Dispatcher
// in1 = Virtual GP
//
// Return Value:
// r8 = EFI_SAL_ERROR
//
// As per static calling conventions.
//
//--
//---------------------------------------------------------------------------
PROCEDURE_ENTRY (SetEsalVirtualEntryPoint)
NESTED_SETUP (2,8,0,0)
EsalCalcStart2:
mov r8 = ip;;
add r8 = (EsalEntryPoint - EsalCalcStart2), r8;;
add r8 = 0x10, r8;;
st8 [r8] = in0;;
add r8 = 0x08, r8;;
st8 [r8] = in1;;
mov r8 = r0;;
NESTED_RETURN
PROCEDURE_EXIT (SetEsalVirtualEntryPoint)
.align 32
EsalEntryPoint:
data8 0 // Physical Entry
data8 0 // GP
data8 0 // Virtual Entry
data8 0 // GP

View File

@@ -1,251 +0,0 @@
/*++
Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EsalServiceLib.c
Abstract:
--*/
#include <Ipf/IpfDefines.h>
#include "EdkIIGlueDxe.h"
EXTENDED_SAL_BOOT_SERVICE_PROTOCOL *mEsalBootService = NULL;
EFI_PLABEL mPlabel;
STATIC
EFI_STATUS
EFIAPI
DxeSalLibInitialize (
VOID
)
{
EFI_PLABEL *Plabel;
EFI_STATUS Status;
if (mEsalBootService != NULL) {
return EFI_SUCCESS;
}
//
// The protocol contains a function pointer, which is an indirect procedure call.
// An indirect procedure call goes through a plabel, and pointer to a function is
// a pointer to a plabel. To implement indirect procedure calls that can work in
// both physical and virtual mode, two plabels are required (one physical and one
// virtual). So lets grap the physical PLABEL for the EsalEntryPoint and store it
// away. We cache it in a module global, so we can register the vitrual version.
//
Status = gBS->LocateProtocol (&gEfiExtendedSalBootServiceProtocolGuid, NULL, (VOID **) &mEsalBootService);
if (EFI_ERROR (Status)) {
mEsalBootService = NULL;
return EFI_SUCCESS;
}
Plabel = (EFI_PLABEL *) (UINTN) mEsalBootService->ExtendedSalProc;
mPlabel.EntryPoint = Plabel->EntryPoint;
mPlabel.GP = Plabel->GP;
SetEsalPhysicalEntryPoint (mPlabel.EntryPoint, mPlabel.GP);
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
RegisterEsalFunction (
IN UINT64 FunctionId,
IN EFI_GUID *ClassGuid,
IN SAL_INTERNAL_EXTENDED_SAL_PROC Function,
IN VOID *ModuleGlobal
)
/*++
Routine Description:
Register ESAL Class Function and it's asociated global.
This function is boot service only!
Arguments:
FunctionId - ID of function to register
ClassGuid - GUID of function class
Function - Function to register under ClassGuid/FunctionId pair
ModuleGlobal - Module global for Function.
Returns:
EFI_SUCCESS - If ClassGuid/FunctionId Function was registered.
--*/
{
DxeSalLibInitialize ();
return mEsalBootService->AddExtendedSalProc (
mEsalBootService,
ClassGuid,
FunctionId,
Function,
ModuleGlobal
);
}
EFI_STATUS
EFIAPI
RegisterEsalClass (
IN EFI_GUID *ClassGuid,
IN VOID *ModuleGlobal,
...
)
/*++
Routine Description:
Register ESAL Class and it's asociated global.
This function is boot service only!
Arguments:
ClassGuid - GUID of function class
ModuleGlobal - Module global for Function.
... - SAL_INTERNAL_EXTENDED_SAL_PROC and FunctionId pairs. NULL
indicates the end of the list.
Returns:
EFI_SUCCESS - All members of ClassGuid registered
--*/
{
VA_LIST Args;
EFI_STATUS Status;
SAL_INTERNAL_EXTENDED_SAL_PROC Function;
UINT64 FunctionId;
EFI_HANDLE NewHandle;
VA_START (Args, ModuleGlobal);
Status = EFI_SUCCESS;
while (!EFI_ERROR (Status)) {
Function = (SAL_INTERNAL_EXTENDED_SAL_PROC) VA_ARG (Args, SAL_INTERNAL_EXTENDED_SAL_PROC);
if (Function == NULL) {
break;
}
FunctionId = VA_ARG (Args, UINT64);
Status = RegisterEsalFunction (FunctionId, ClassGuid, Function, ModuleGlobal);
}
VA_END (Args);
if (EFI_ERROR (Status)) {
return Status;
}
NewHandle = NULL;
return gBS->InstallProtocolInterface (
&NewHandle,
ClassGuid,
EFI_NATIVE_INTERFACE,
NULL
);
}
SAL_RETURN_REGS
EFIAPI
EfiCallEsalService (
IN EFI_GUID *ClassGuid,
IN UINT64 FunctionId,
IN UINT64 Arg2,
IN UINT64 Arg3,
IN UINT64 Arg4,
IN UINT64 Arg5,
IN UINT64 Arg6,
IN UINT64 Arg7,
IN UINT64 Arg8
)
/*++
Routine Description:
Call module that is not linked direclty to this module. This code is IP
relative and hides the binding issues of virtual or physical calling. The
function that gets dispatched has extra arguments that include the registered
module global and a boolean flag to indicate if the system is in virutal mode.
Arguments:
ClassGuid - GUID of function
FunctionId - Function in ClassGuid to call
Arg2 - Argument 2 ClassGuid/FunctionId defined
Arg3 - Argument 3 ClassGuid/FunctionId defined
Arg4 - Argument 4 ClassGuid/FunctionId defined
Arg5 - Argument 5 ClassGuid/FunctionId defined
Arg6 - Argument 6 ClassGuid/FunctionId defined
Arg7 - Argument 7 ClassGuid/FunctionId defined
Arg8 - Argument 8 ClassGuid/FunctionId defined
Returns:
Status of ClassGuid/FuncitonId
--*/
{
SAL_RETURN_REGS ReturnReg;
SAL_EXTENDED_SAL_PROC EsalProc;
ReturnReg = GetEsalEntryPoint ();
if (ReturnReg.Status != EFI_SAL_SUCCESS) {
return ReturnReg;
}
//
// Look at the physical mode ESAL entry point to determine of the ESAL entry point has been initialized
//
if (*(UINT64 *)ReturnReg.r9 == 0 && *(UINT64 *)(ReturnReg.r9 + 8) == 0) {
//
// Both the function ponter and the GP value are zero, so attempt to initialize the ESAL Entry Point
//
DxeSalLibInitialize ();
ReturnReg = GetEsalEntryPoint ();
if (ReturnReg.Status != EFI_SAL_SUCCESS) {
return ReturnReg;
}
if (*(UINT64 *)ReturnReg.r9 == 0 && *(UINT64 *)(ReturnReg.r9 + 8) == 0) {
//
// The ESAL Entry Point could not be initialized
//
ReturnReg.Status = EFI_SAL_ERROR;
return ReturnReg;
}
}
if (ReturnReg.r11 & PSR_IT_MASK) {
//
// Virtual mode plabel to entry point
//
EsalProc = (SAL_EXTENDED_SAL_PROC) ReturnReg.r10;
} else {
//
// Physical mode plabel to entry point
//
EsalProc = (SAL_EXTENDED_SAL_PROC) ReturnReg.r9;
}
return EsalProc (
ClassGuid,
FunctionId,
Arg2,
Arg3,
Arg4,
Arg5,
Arg6,
Arg7,
Arg8
);
}

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -70,9 +68,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -80,9 +78,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -74,9 +72,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -74,9 +72,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -78,9 +75,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -68,9 +65,6 @@ COMPONENT_TYPE = LIBRARY
[libraries.x64]
[libraries.ipf]
[libraries.ebc]
@@ -84,9 +78,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,9 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -79,13 +76,6 @@ COMPONENT_TYPE = LIBRARY
# to replace EdkIIGluePeiServicesTablePointerLibMm7
#
[libraries.ipf]
EdkIIGluePeiServicesTablePointerLibKr1
#
# If necessary, EdkIIGluePeiServicesTablePointerLib can be used
# to replace EdkIIGluePeiServicesTablePointerLibKr1
#
[libraries.ebc]
@@ -99,9 +89,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -72,9 +70,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -65,9 +63,6 @@ COMPONENT_TYPE = LIBRARY
[libraries.x64]
EdkIIGluePeiServicesTablePointerLibMm7
[libraries.ipf]
EdkIIGluePeiServicesTablePointerLibKr1
[nmake.common]
C_FLAGS = $(C_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
LIB_STD_FLAGS = $(LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
@@ -78,9 +73,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -70,9 +68,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,44 +0,0 @@
// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// ReadKr1.s
//
// Abstract:
//
// Contains assembly code for read Kr1.
//
//--
.file "ReadKr1.s"
#include "IpfMacro.i"
//---------------------------------------------------------------------------------
//++
// AsmReadKr1
//
// This routine is used to get KR1. KR1 is used to store Pei Service Table
// Pointer in archeture.
//
// Arguments :
//
// On Entry : None.
//
// Return Value: Pei Services Table.
//
//--
//----------------------------------------------------------------------------------
PROCEDURE_ENTRY (AsmReadKr1)
mov r8 = ar.k1;; // Pei Services Table Pointer
br.ret.dpnt b0;;
PROCEDURE_EXIT (AsmReadKr1)

View File

@@ -1,45 +0,0 @@
// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// WriteKr1.s
//
// Abstract:
//
// Contains assembly code for write Kr1.
//
//--
.file "WriteKr1.s"
#include "IpfMacro.i"
//---------------------------------------------------------------------------------
//++
// AsmWriteKr1
//
// This routine is used to Write KR1. KR1 is used to store Pei Service Table
// Pointer in archeture.
//
// Arguments : r32 Pei Services Table Pointer
//
// On Entry : None.
//
// Return Value: None.
//
//--
//----------------------------------------------------------------------------------
PROCEDURE_ENTRY (AsmWriteKr1)
mov ar.k1 = r32;; // Pei Services Table Pointer
br.ret.dpnt b0;;
PROCEDURE_EXIT (AsmWriteKr1)

View File

@@ -1,74 +0,0 @@
/*++
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PeiServicesTablePointer.c
Abstract:
PEI Services Table Pointer Library.
--*/
#include "PeiServicesTablePointerLibInternals.h"
/**
The function returns the pointer to PeiServices.
The function returns the pointer to PeiServices.
It will ASSERT() if the pointer to PeiServices is NULL.
@retval The pointer to PeiServices.
**/
EFI_PEI_SERVICES **
EFIAPI
GetPeiServicesTablePointer (
VOID
)
{
EFI_PEI_SERVICES **PeiServices;
#if (PI_SPECIFICATION_VERSION < 0x00010000)
PeiServices = (EFI_PEI_SERVICES **)(UINTN)AsmReadKr1 ();
#else
PeiServices = (EFI_PEI_SERVICES **)(UINTN)AsmReadKr7 ();
#endif
ASSERT (PeiServices != NULL);
return PeiServices;
}
/**
The constructor function caches the pointer to PEI services.
The constructor function caches the pointer to PEI services.
It will always return EFI_SUCCESS.
@param FfsHeader Pointer to FFS header the loaded driver.
@param PeiServices Pointer to the PEI services.
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
**/
EFI_STATUS
EFIAPI
PeiServicesTablePointerLibConstructor (
IN EFI_FFS_FILE_HEADER *FfsHeader,
IN EFI_PEI_SERVICES **PeiServices
)
{
#if (PI_SPECIFICATION_VERSION < 0x00010000)
AsmWriteKr1 ((UINT64)(UINTN)PeiServices);
#endif
return EFI_SUCCESS;
}

View File

@@ -1,74 +0,0 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# PeiServiceTablePointerLibKr1.inf
#
# Abstract:
#
# Component description file for PeiServicesTablePointerLibKr1.
#
#--*/
[defines]
BASE_NAME = EdkIIGluePeiServicesTablePointerLibKr1
COMPONENT_TYPE = LIBRARY
[sources.common]
[sources.ipf]
PeiServicesTablePointer.c
Ipf/ReadKr1.s
Ipf/WriteKr1.s
[includes.common]
.
../../Include
../../include/Library
$(EDK_SOURCE)/Foundation
$(EDK_SOURCE)/Foundation/Framework
$(EDK_SOURCE)/Foundation/Include/Pei
$(EDK_SOURCE)/Foundation/Efi
$(EDK_SOURCE)/Foundation/Include
$(EDK_SOURCE)/Foundation/Efi/Include
$(EDK_SOURCE)/Foundation/Framework/Include
$(EDK_SOURCE)/Foundation/Include/IndustryStandard
$(EDK_SOURCE)/Foundation/Core/Dxe
$(EDK_SOURCE)/Foundation/Library/Dxe/Include
$(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
[libraries.common]
EdkIIGlueBaseLib
[libraries.ia32]
[libraries.x64]
[nmake.common]
C_FLAGS = $(C_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
LIB_STD_FLAGS = $(LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
[nmake.ia32]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IA32
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D MDE_CPU_EBC

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
PeiServicesTablePointer.c
[sources.ipf]
[sources.ebc]
[includes.common]
@@ -69,9 +67,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,8 +31,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -77,9 +75,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -32,8 +32,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -87,9 +85,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -68,9 +66,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

View File

@@ -1,6 +1,6 @@
#/*++
#
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,8 +30,6 @@ COMPONENT_TYPE = LIBRARY
[sources.x64]
[sources.ipf]
[sources.ebc]
@@ -76,9 +74,6 @@ COMPONENT_TYPE = LIBRARY
[nmake.x64]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64
[nmake.ipf]
C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF
[nmake.ebc]
EBC_C_STD_FLAGS = $(EBC_C_STD_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION
EBC_LIB_STD_FLAGS = $(EBC_LIB_STD_FLAGS) /IGNORE:4006 /IGNORE:4221

Some files were not shown because too many files have changed in this diff Show More