UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on AMD
AMD does not support MSR_IA32_MISC_ENABLE. Accessing that register causes and exception on AMD processors. If Execution Disable is supported, but if the processor is an AMD processor, skip manipulating MSR_IA32_MISC_ENABLE[34] XD Disable bit. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com> Message-Id: <20200622131825.1352-5-Garrett.Kirkendall@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
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@@ -2,7 +2,7 @@
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Enable SMM profile.
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Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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Copyright (c) 2017 - 2020, AMD Incorporated. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@@ -1015,6 +1015,13 @@ CheckFeatureSupported (
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mXdSupported = FALSE;
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PatchInstructionX86 (gPatchXdSupported, mXdSupported, 1);
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}
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if (StandardSignatureIsAuthenticAMD ()) {
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//
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// AMD processors do not support MSR_IA32_MISC_ENABLE
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//
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PatchInstructionX86 (gPatchMsrIa32MiscEnableSupported, FALSE, 1);
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}
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}
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if (mBtsSupported) {
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