ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()

Checking if a core if the primary/boot core used to be done with the macro
IS_PRIMARY_CORE().
Some platforms exposes configuration registers to change the primary core.
Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows
some flexibility in the way to check the primary core.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c

@@ -55,7 +55,7 @@ ArmCpuSetupSmpNonSecure (
   )
 {
   /*// Make the SCU accessible in Non Secure world
-  if (IS_PRIMARY_CORE(MpId)) {
+  if (ArmPlatformIsPrimaryCore (MpId)) {
     ScuBase = ArmGetScuBaseAddress();
 
     // Allow NS access to SCU register

ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf

@@ -31,10 +31,5 @@
 [Sources.common]
   ArmCortexA15Lib.c
 
-[FeaturePcd]
-
 [FixedPcd]
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore
-
   gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz

ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c

@@ -15,6 +15,7 @@
 #include <Base.h>
 #include <Library/ArmLib.h>
 #include <Library/ArmCpuLib.h>
+#include <Library/ArmPlatformLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 
@@ -64,7 +65,7 @@ ArmCpuSetupSmpNonSecure (
   INTN          ScuBase;
 
   // Make the SCU accessible in Non Secure world
-  if (IS_PRIMARY_CORE(MpId)) {
+  if (ArmPlatformIsPrimaryCore (MpId)) {
     ScuBase = ArmGetScuBaseAddress();
 
     // Allow NS access to SCU register

ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf

@@ -1,5 +1,5 @@
 #/* @file
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
 #  
 #  This program and the accompanying materials                          
 #  are licensed and made available under the terms and conditions of the BSD License         
@@ -22,9 +22,11 @@
 [Packages]
   MdePkg/MdePkg.dec
   ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
 
 [LibraryClasses]
   ArmLib
+  ArmPlatformLib
   IoLib
   PcdLib
 
@@ -33,8 +35,3 @@
   ArmCortexA9Helper.asm     | RVCT
   ArmCortexA9Helper.S       | GCC
 
-[FeaturePcd]
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore

ArmPkg/Drivers/PL390Gic/PL390GicSec.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
 *  
 *  This program and the accompanying materials                          
 *  are licensed and made available under the terms and conditions of the BSD License         
@@ -14,6 +14,7 @@
 
 #include <Base.h>
 #include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/ArmGicLib.h>
@@ -51,7 +52,7 @@ ArmGicSetupNonSecure (
   }
 
   // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
-  if (IS_PRIMARY_CORE(MpId)) {
+  if (ArmPlatformIsPrimaryCore (MpId)) {
     // Ensure all GIC interrupts are Non-Secure
     for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) {
       MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);

ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf

@@ -25,14 +25,14 @@
 
 [Packages]
   ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
   MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
 
 [LibraryClasses]
   ArmLib
+  ArmPlatformLib
   DebugLib
   IoLib
   PcdLib
 
-[FixedPcd.common]
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore