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ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()

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Checking if a core if the primary/boot core used to be done with the macro
IS_PRIMARY_CORE().
Some platforms exposes configuration registers to change the primary core.
Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows
some flexibility in the way to check the primary core.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2013-05-10 12:41:27 +00:00
parent bc7b889a03
commit bebda7ceec
59 changed files with 554 additions and 267 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
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@@ -51,6 +51,3 @@
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c
View File

@@ -140,7 +140,7 @@ ArmPlatformInitialize (
IN UINTN MpId
)
{
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}

36
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
View File

@@ -1,5 +1,5 @@
//
// Copyright (c) 2012, ARM Limited. All rights reserved.
// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -11,12 +11,16 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <ArmPlatform.h>
.text
.align 3
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
//UINTN
//ArmPlatformGetCorePosition (
@@ -28,3 +32,33 @@ ASM_PFX(ArmPlatformGetCorePosition):
add r0, r1, r0, LSR #7
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
ldr r1, [r1]
lsr r1, #24
// Shift the SCC value to get the cluster ID at the offset #8
lsl r2, r1, #4
and r2, r2, #0xF00
// Keep only the cpu ID from the original SCC
and r1, r1, #0x0F
// Add the Cluster ID to the Cpu ID
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr

37
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm
View File

@@ -1,5 +1,5 @@
//
// Copyright (c) 2012, ARM Limited. All rights reserved.
// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -11,11 +11,15 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <ArmPlatform.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformGetCorePosition
EXPORT ArmPlatformIsPrimaryCore
PRESERVE8
AREA CTA15A7Helper, CODE, READONLY
@@ -31,4 +35,35 @@ ArmPlatformGetCorePosition FUNCTION
bx lr
ENDFUNC
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
ldr r1, [r1]
lsr r1, #24
// Shift the SCC value to get the cluster ID at the offset #8
lsl r2, r1, #4
and r2, r2, #0xF00
// Keep only the cpu ID from the original SCC
and r1, r1, #0x0F
// Add the Cluster ID to the Cpu ID
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ENDFUNC
END

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
View File

@@ -39,6 +39,8 @@
[Sources.common]
CTA9x4.c
CTA9x4Mem.c
CTA9x4Helper.S | GCC
CTA9x4Helper.asm | RVCT
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf
View File

@@ -36,6 +36,8 @@
[Sources.common]
CTA9x4.c
CTA9x4Helper.S | GCC
CTA9x4Helper.asm | RVCT
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
View File

@@ -136,7 +136,7 @@ ArmPlatformInitialize (
IN UINTN MpId
)
{
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}

39
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S Normal file
View File

@@ -0,0 +1,39 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

43
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm Normal file
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@@ -0,0 +1,43 @@
//
// Copyright (c) 2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
#include <AsmMacroIoLib.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformIsPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
AREA CTA9x4Helper, CODE, READONLY
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ENDFUNC
END

24
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
View File

@@ -1,10 +1,10 @@
#
# Copyright (c) 2011, ARM Limited. All rights reserved.
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http:#opensource.org/licenses/bsd-license.php
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@@ -15,7 +15,6 @@
#include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
#.include AsmMacroIoLib.inc
#include <Chipset/ArmCortexA9.h>
@@ -23,6 +22,10 @@
.align 2
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
# IN None
# OUT r0 = SCU Base Address
@@ -68,4 +71,19 @@ _Return:
ldmfd SP!, {r1-r2}
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

30
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
View File

@@ -1,5 +1,5 @@
//
// Copyright (c) 2011, ARM Limited. All rights reserved.
// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -22,21 +22,26 @@
INCLUDE AsmMacroIoLib.inc
EXPORT ArmGetCpuCountPerCluster
EXPORT ArmPlatformIsPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
AREA RTSMHelper, CODE, READONLY
// IN None
// OUT r0 = SCU Base Address
ArmGetScuBaseAddress
ArmGetScuBaseAddress FUNCTION
// Read Configuration Base Address Register. ArmCBar cannot be called to get
// the Configuration BAR as a stack is not necessary setup. The SCU is at the
// offset 0x0000 from the Private Memory Region.
mrc p15, 4, r0, c15, c0, 0
bx lr
ENDFUNC
// IN None
// OUT r0 = number of cores present in the system
ArmGetCpuCountPerCluster
ArmGetCpuCountPerCluster FUNCTION
stmfd SP!, {r1-r2}
// Read CP15 MIDR
@@ -69,5 +74,22 @@ _Return
add r0, r0, #1
ldmfd SP!, {r1-r2}
bx lr
ENDFUNC
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ENDFUNC
END

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
View File

@@ -97,7 +97,7 @@ ArmPlatformInitialize (
IN UINTN MpId
)
{
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}

4
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
View File

@@ -36,7 +36,7 @@ ArmPlatformSecTrustzoneInit (
)
{
// Nothing to do
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return;
}
@@ -120,7 +120,7 @@ ArmPlatformSecInitialize (
)
{
// If it is not the primary core then there is nothing to do
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}

71
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.S
View File

@@ -1,71 +0,0 @@
#
# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http:#opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
#.include AsmMacroIoLib.inc
#include <Chipset/ArmCortexA9.h>
.text
.align 2
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
# IN None
# OUT r0 = SCU Base Address
ASM_PFX(ArmGetScuBaseAddress):
# Read Configuration Base Address Register. ArmCBar cannot be called to get
# the Configuration BAR as a stack is not necessary setup. The SCU is at the
# offset 0x0000 from the Private Memory Region.
mrc p15, 4, r0, c15, c0, 0
bx lr
# IN None
# OUT r0 = number of cores present in the system
ASM_PFX(ArmGetCpuCountPerCluster):
stmfd SP!, {r1-r2}
# Read CP15 MIDR
mrc p15, 0, r1, c0, c0, 0
# Check if the CPU is A15
mov r1, r1, LSR #4
LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
and r1, r1, r0
LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
cmp r1, r0
beq _Read_cp15_reg
_CPU_is_not_A15:
mov r2, lr @ Save link register
bl ArmGetScuBaseAddress @ Read SCU Base Address
mov lr, r2 @ Restore link register val
ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count
b _Return
_Read_cp15_reg:
mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
lsr r0, #24
_Return:
and r0, r0, #3
# Add '1' to the number of CPU on the Cluster
add r0, r0, #1
ldmfd SP!, {r1-r2}
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

73
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.asm
View File

@@ -1,73 +0,0 @@
//
// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/PcdLib.h>
#include <Chipset/ArmCortexA9.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmGetCpuCountPerCluster
AREA RTSMHelper, CODE, READONLY
// IN None
// OUT r0 = SCU Base Address
ArmGetScuBaseAddress
// Read Configuration Base Address Register. ArmCBar cannot be called to get
// the Configuration BAR as a stack is not necessary setup. The SCU is at the
// offset 0x0000 from the Private Memory Region.
mrc p15, 4, r0, c15, c0, 0
bx lr
// IN None
// OUT r0 = number of cores present in the system
ArmGetCpuCountPerCluster
stmfd SP!, {r1-r2}
// Read CP15 MIDR
mrc p15, 0, r1, c0, c0, 0
// Check if the CPU is A15
mov r1, r1, LSR #4
mov r0, #ARM_CPU_TYPE_MASK
and r1, r1, r0
mov r0, #ARM_CPU_TYPE_A15
cmp r1, r0
beq _Read_cp15_reg
_CPU_is_not_A15
mov r2, lr ; Save link register
bl ArmGetScuBaseAddress ; Read SCU Base Address
mov lr, r2 ; Restore link register val
ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count
b _Return
_Read_cp15_reg
mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
lsr r0, #24
_Return
and r0, r0, #3
// Add '1' to the number of CPU on the Cluster
add r0, r0, #1
ldmfd SP!, {r1-r2}
bx lr
END

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
View File

@@ -37,8 +37,6 @@
[Sources.ARM]
Arm/RTSMBoot.asm | RVCT
Arm/RTSMBoot.S | GCC
Arm/RTSMHelper.asm | RVCT
Arm/RTSMHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable

2
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
View File

@@ -50,7 +50,7 @@ ArmPlatformSecInitialize (
)
{
// If it is not the primary core then there is nothing to do
if (!IS_PRIMARY_CORE(MpId)) {
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}