ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()
Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -22,6 +22,7 @@
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.align 3
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_IMPORT(ArmPlatformStackSet)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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@@ -32,8 +33,8 @@ StartupAddr: .word CEntryPoint
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ASM_PFX(_ModuleEntryPoint):
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// Get ID of this CPU in Multicore system
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bl ASM_PFX(ArmReadMpidr)
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r6, r0, r1
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// Keep a copy of the MpId register value
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mov r6, r0
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_SetSVCMode:
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// Enter SVC mode, Disable FIQ and IRQ
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@@ -118,8 +119,9 @@ _GetStackBase:
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bl ASM_PFX(ArmPlatformStackSet)
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
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cmp r6, r4
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mov r0, r6
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bl ASM_PFX(ArmPlatformIsPrimaryCore)
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cmp r0, #1
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bne _PrepareArguments
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_ReserveGlobalVariable:
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@@ -21,6 +21,7 @@
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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IMPORT ArmPlatformIsPrimaryCore
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IMPORT ArmReadMpidr
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IMPORT ArmPlatformStackSet
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@@ -34,8 +35,8 @@ StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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// Get ID of this CPU in Multicore system
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bl ArmReadMpidr
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r6, r0, r1
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// Keep a copy of the MpId register value
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mov r6, r0
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_SetSVCMode
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// Enter SVC mode, Disable FIQ and IRQ
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@@ -120,8 +121,9 @@ _GetStackBase
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bl ArmPlatformStackSet
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
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cmp r6, r4
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mov r0, r6
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bl ArmPlatformIsPrimaryCore
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cmp r0, #1
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bne _PrepareArguments
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_ReserveGlobalVariable
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@@ -95,7 +95,6 @@
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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gArmPlatformTokenSpaceGuid.PcdClusterCount
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmTokenSpaceGuid.PcdGicPrimaryCoreId
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@@ -90,8 +90,6 @@
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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gArmPlatformTokenSpaceGuid.PcdClusterCount
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
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gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
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@@ -217,7 +217,7 @@ CEntryPoint (
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// Initialize the platform specific controllers
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ArmPlatformInitialize (MpId);
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if (IS_PRIMARY_CORE(MpId) && PerformanceMeasurementEnabled ()) {
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if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {
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// Initialize the Timer Library to setup the Timer HW controller
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TimerConstructor ();
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// We cannot call yet the PerformanceLib because the HOB List has not been initialized
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@@ -240,7 +240,7 @@ CEntryPoint (
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// Define the Global Variable region when we are not running in XIP
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if (!IS_XIP()) {
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if (IS_PRIMARY_CORE(MpId)) {
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if (ArmPlatformIsPrimaryCore (MpId)) {
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mGlobalVariableBase = GlobalVariableBase;
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if (ArmIsMpCore()) {
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// Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
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@@ -253,7 +253,7 @@ CEntryPoint (
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}
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// If not primary Jump to Secondary Main
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if (IS_PRIMARY_CORE(MpId)) {
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if (ArmPlatformIsPrimaryCore (MpId)) {
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// Goto primary Main.
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PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
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} else {
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