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ArmPkg: Update GenericWatchdogDxe to allow setting full 48-bit offset

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The generic watchdog offset register is 48 bits wide, and can be set by
performing two 32-bit writes.

Add support for writing the high 16 bits of the offset register and
update the signature of the WatchdogWriteOffsetRegister function to take
a UINT64 value.

Signed-off-by: Rebecca Cran <rebecca@os.amperecomputing.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Rebecca Cran
2024-01-29 11:25:11 -07:00
committed by mergify[bot]
parent 98c7cb3be7
commit beefa753f3
2 changed files with 52 additions and 7 deletions
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11
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
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@@ -1,9 +1,13 @@
/** @file
*
* Copyright (c) 2023, Ampere Computing LLC. All rights reserved.<BR>
* Copyright (c) 2013-2017, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
* @par Reference(s):
* - Generic Watchdog specification in Arm Base System Architecture 1.0C:
* https://developer.arm.com/documentation/den0094/c/
**/
#ifndef GENERIC_WATCHDOG_H_
@@ -14,12 +18,17 @@
// Control Frame:
#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
#define GENERIC_WDOG_OFFSET_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
#define GENERIC_WDOG_OFFSET_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x00C)
#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
#define GENERIC_WDOG_IID_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0xFCC)
// Values of bit 0 of the Control/Status Register
#define GENERIC_WDOG_ENABLED 1
#define GENERIC_WDOG_DISABLED 0
#define GENERIC_WDOG_IID_ARCH_REV_SHIFT 16
#define GENERIC_WDOG_IID_ARCH_REV_MASK 0xF
#endif // GENERIC_WATCHDOG_H_