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MdePkg/Include/IndustryStandard: CXL 1.1 Registers

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BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611

Register definitions from chapter 7 of Compute Express Link
Specification Revision 1.1 are ported into the new Cxl11.h.
The CXL Flex Bus registers are based on the PCIe Extended Capability
DVSEC structure header, led to the inclusion of upgraded Pci.h.

Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
This commit is contained in:
Javeed, Ashraf
2020-07-25 02:26:12 +08:00
committed by mergify[bot]
parent 8c30327deb
commit c25f146d8d
2 changed files with 571 additions and 4 deletions
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6
MdePkg/Include/IndustryStandard/Pci.h
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@@ -1,7 +1,7 @@
/** @file
Support for the latest PCI standard.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -9,9 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PCI_H_
#define _PCI_H_
#include <IndustryStandard/Pci30.h>
#include <IndustryStandard/PciExpress21.h>
#include <IndustryStandard/PciExpress30.h>
#include <IndustryStandard/PciExpress50.h>
#include <IndustryStandard/PciCodeId.h>
#endif