Update to make end-of-line consistent for all source files in MdePkg. There are no other updates besides that change.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9155 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8
@@ -1,359 +1,359 @@
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# TITLE CpuAsm.S:
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#------------------------------------------------------------------------------
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#*
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#* Copyright 2008 - 2009, Intel Corporation
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#* All rights reserved. This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* CpuAsm.S
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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#text SEGMENT
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#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
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#
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# point to the external interrupt vector table
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#
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ExternalVectorTablePtr:
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.byte 0, 0, 0, 0, 0, 0, 0, 0
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ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
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ASM_PFX(InitializeExternalVectorTablePtr):
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lea ExternalVectorTablePtr(%rip), %rax # save vector number
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mov %rcx, (%rax)
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ret
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#------------------------------------------------------------------------------
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# VOID
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# SetCodeSelector (
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(SetCodeSelector)
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ASM_PFX(SetCodeSelector):
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subq $0x10, %rsp
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leaq setCodeSelectorLongJump(%rip), %rax
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movq %rax, (%rsp)
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movw %cx, 4(%rsp)
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.byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp
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setCodeSelectorLongJump:
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addq $0x10, %rsp
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ret
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#------------------------------------------------------------------------------
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# VOID
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# SetDataSelectors (
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(SetDataSelectors)
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ASM_PFX(SetDataSelectors):
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movw %cx, %ss
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movw %cx, %ds
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movw %cx, %es
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movw %cx, %fs
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movw %cx, %gs
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ret
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#---------------------------------------;
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# CommonInterruptEntry ;
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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#
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# All interrupt handlers are invoked through interrupt gates, so
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# IF flag automatically cleared at the entry point
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#
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#
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# Calculate vector number
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#
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xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
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movzwl (%rcx), %ecx
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cmp $32, %ecx # Intel reserved vector for exceptions?
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jae NoErrorCode
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pushq %rax
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leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax
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bt %ecx, (%rax)
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popq %rax
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jc CommonInterruptEntry_al_0000
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NoErrorCode:
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#
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# Push a dummy error code on the stack
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# to maintain coherent stack map
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#
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pushq (%rsp)
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movq $0, 8(%rsp)
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CommonInterruptEntry_al_0000:
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pushq %rbp
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movq %rsp, %rbp
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#
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# Stack:
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# +---------------------+ <-- 16-byte aligned ensured by processor
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# + Old SS +
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# +---------------------+
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# + Old RSP +
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# +---------------------+
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# + RFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + RIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + RCX / Vector Number +
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# +---------------------+
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# + RBP +
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# +---------------------+ <-- RBP, 16-byte aligned
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#
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#
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# Since here the stack pointer is 16-byte aligned, so
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# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
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# is 16-byte aligned
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#
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#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rax
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pushq 8(%rbp) # RCX
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pushq %rdx
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pushq %rbx
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pushq 48(%rbp) # RSP
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pushq (%rbp) # RBP
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pushq %rsi
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pushq %rdi
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#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
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movzwq 56(%rbp), %rax
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pushq %rax # for ss
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movzwq 32(%rbp), %rax
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pushq %rax # for cs
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movq %ds, %rax
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pushq %rax
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movq %es, %rax
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pushq %rax
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movq %fs, %rax
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pushq %rax
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movq %gs, %rax
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pushq %rax
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movq %rcx, 8(%rbp) # save vector number
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#; UINT64 Rip;
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pushq 24(%rbp)
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#; UINT64 Gdtr[2], Idtr[2];
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xorq %rax, %rax
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pushq %rax
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pushq %rax
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sidt (%rsp)
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xchgq 2(%rsp), %rax
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xchgq (%rsp), %rax
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xchgq 8(%rsp), %rax
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xorq %rax, %rax
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pushq %rax
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pushq %rax
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sgdt (%rsp)
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xchgq 2(%rsp), %rax
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xchgq (%rsp), %rax
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xchgq 8(%rsp), %rax
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#; UINT64 Ldtr, Tr;
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xorq %rax, %rax
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str %ax
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pushq %rax
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sldt %ax
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pushq %rax
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#; UINT64 RFlags;
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pushq 40(%rbp)
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#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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movq %cr8, %rax
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pushq %rax
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movq %cr4, %rax
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orq $0x208, %rax
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movq %rax, %cr4
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pushq %rax
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mov %cr3, %rax
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pushq %rax
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mov %cr2, %rax
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pushq %rax
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xorq %rax, %rax
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pushq %rax
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mov %cr0, %rax
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pushq %rax
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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movq %dr7, %rax
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pushq %rax
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#; clear Dr7 while executing debugger itself
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xorq %rax, %rax
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movq %rax, %dr7
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movq %dr6, %rax
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pushq %rax
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#; insure all status bits in dr6 are clear...
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xorq %rax, %rax
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movq %rax, %dr6
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movq %dr3, %rax
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pushq %rax
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movq %dr2, %rax
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pushq %rax
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movq %dr1, %rax
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pushq %rax
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movq %dr0, %rax
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pushq %rax
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#; FX_SAVE_STATE_X64 FxSaveState;
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subq $512, %rsp
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movq %rsp, %rdi
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.byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
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#; UINT32 ExceptionData;
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pushq 16(%rbp)
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#; call into exception handler
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movq 8(%rbp), %rcx
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leaq ExternalVectorTablePtr(%rip), %rax
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movl (%eax), %eax
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movq (%rax,%rcx,8), %rax
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orq %rax, %rax # NULL?
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je nonNullValue#
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#; Prepare parameter and call
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# mov rcx, [rbp + 8]
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mov %rsp, %rdx
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#
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# Per X64 calling convention, allocate maximum parameter stack space
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# and make sure RSP is 16-byte aligned
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#
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subq $40, %rsp
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call *%rax
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addq $40, %rsp
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nonNullValue:
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cli
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#; UINT64 ExceptionData;
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addq $8, %rsp
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#; FX_SAVE_STATE_X64 FxSaveState;
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movq %rsp, %rsi
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.byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
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addq $512, %rsp
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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popq %rax
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movq %rax, %dr0
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popq %rax
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movq %rax, %dr1
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popq %rax
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movq %rax, %dr2
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popq %rax
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movq %rax, %dr3
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#; skip restore of dr6. We cleared dr6 during the context save.
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addq $8, %rsp
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popq %rax
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movq %rax, %dr7
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#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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popq %rax
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movq %rax, %cr0
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addq $8, %rsp # not for Cr1
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popq %rax
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movq %rax, %cr2
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popq %rax
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movq %rax, %cr3
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popq %rax
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movq %rax, %cr4
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popq %rax
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movq %rax, %cr8
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#; UINT64 RFlags;
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popq 40(%rbp)
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#; UINT64 Ldtr, Tr;
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#; UINT64 Gdtr[2], Idtr[2];
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#; Best not let anyone mess with these particular registers...
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addq $48, %rsp
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#; UINT64 Rip;
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popq 24(%rbp)
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#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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popq %rax
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# mov %rax, %gs ; not for gs
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popq %rax
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# mov %rax, %fs ; not for fs
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# (X64 will not use fs and gs, so we do not restore it)
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popq %rax
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movq %rax, %es
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popq %rax
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movq %rax, %ds
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popq 32(%rbp) # for cs
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popq 56(%rbp) # for ss
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#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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popq %rdi
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popq %rsi
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addq $8, %rsp # not for rbp
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popq 48(%rbp) # for rsp
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popq %rbx
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popq %rdx
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popq %rcx
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popq %rax
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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movq %rbp, %rsp
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popq %rbp
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addq $16, %rsp
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iretq
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#text ENDS
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#END
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# TITLE CpuAsm.S:
|
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|
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#------------------------------------------------------------------------------
|
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#*
|
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#* Copyright 2008 - 2009, Intel Corporation
|
||||
#* All rights reserved. This program and the accompanying materials
|
||||
#* are licensed and made available under the terms and conditions of the BSD License
|
||||
#* which accompanies this distribution. The full text of the license may be found at
|
||||
#* http://opensource.org/licenses/bsd-license.php
|
||||
#*
|
||||
#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#*
|
||||
#* CpuAsm.S
|
||||
#*
|
||||
#* Abstract:
|
||||
#*
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#text SEGMENT
|
||||
|
||||
|
||||
#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
|
||||
|
||||
|
||||
#
|
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# point to the external interrupt vector table
|
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#
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ExternalVectorTablePtr:
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.byte 0, 0, 0, 0, 0, 0, 0, 0
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|
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ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
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ASM_PFX(InitializeExternalVectorTablePtr):
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lea ExternalVectorTablePtr(%rip), %rax # save vector number
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mov %rcx, (%rax)
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ret
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#------------------------------------------------------------------------------
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# VOID
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# SetCodeSelector (
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# UINT16 Selector
|
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# );
|
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(SetCodeSelector)
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ASM_PFX(SetCodeSelector):
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subq $0x10, %rsp
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leaq setCodeSelectorLongJump(%rip), %rax
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movq %rax, (%rsp)
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movw %cx, 4(%rsp)
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.byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp
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setCodeSelectorLongJump:
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addq $0x10, %rsp
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ret
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||||
|
||||
#------------------------------------------------------------------------------
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# VOID
|
||||
# SetDataSelectors (
|
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# UINT16 Selector
|
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# );
|
||||
#------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(SetDataSelectors)
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ASM_PFX(SetDataSelectors):
|
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movw %cx, %ss
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movw %cx, %ds
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||||
movw %cx, %es
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||||
movw %cx, %fs
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movw %cx, %gs
|
||||
ret
|
||||
|
||||
#---------------------------------------;
|
||||
# CommonInterruptEntry ;
|
||||
#---------------------------------------;
|
||||
# The follow algorithm is used for the common interrupt routine.
|
||||
|
||||
ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
|
||||
ASM_PFX(CommonInterruptEntry):
|
||||
cli
|
||||
#
|
||||
# All interrupt handlers are invoked through interrupt gates, so
|
||||
# IF flag automatically cleared at the entry point
|
||||
#
|
||||
#
|
||||
# Calculate vector number
|
||||
#
|
||||
xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
|
||||
movzwl (%rcx), %ecx
|
||||
cmp $32, %ecx # Intel reserved vector for exceptions?
|
||||
jae NoErrorCode
|
||||
pushq %rax
|
||||
leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax
|
||||
bt %ecx, (%rax)
|
||||
popq %rax
|
||||
jc CommonInterruptEntry_al_0000
|
||||
|
||||
NoErrorCode:
|
||||
|
||||
#
|
||||
# Push a dummy error code on the stack
|
||||
# to maintain coherent stack map
|
||||
#
|
||||
pushq (%rsp)
|
||||
movq $0, 8(%rsp)
|
||||
CommonInterruptEntry_al_0000:
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
|
||||
#
|
||||
# Stack:
|
||||
# +---------------------+ <-- 16-byte aligned ensured by processor
|
||||
# + Old SS +
|
||||
# +---------------------+
|
||||
# + Old RSP +
|
||||
# +---------------------+
|
||||
# + RFlags +
|
||||
# +---------------------+
|
||||
# + CS +
|
||||
# +---------------------+
|
||||
# + RIP +
|
||||
# +---------------------+
|
||||
# + Error Code +
|
||||
# +---------------------+
|
||||
# + RCX / Vector Number +
|
||||
# +---------------------+
|
||||
# + RBP +
|
||||
# +---------------------+ <-- RBP, 16-byte aligned
|
||||
#
|
||||
|
||||
|
||||
#
|
||||
# Since here the stack pointer is 16-byte aligned, so
|
||||
# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
|
||||
# is 16-byte aligned
|
||||
#
|
||||
|
||||
#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||||
#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||||
pushq %r15
|
||||
pushq %r14
|
||||
pushq %r13
|
||||
pushq %r12
|
||||
pushq %r11
|
||||
pushq %r10
|
||||
pushq %r9
|
||||
pushq %r8
|
||||
pushq %rax
|
||||
pushq 8(%rbp) # RCX
|
||||
pushq %rdx
|
||||
pushq %rbx
|
||||
pushq 48(%rbp) # RSP
|
||||
pushq (%rbp) # RBP
|
||||
pushq %rsi
|
||||
pushq %rdi
|
||||
|
||||
#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
|
||||
movzwq 56(%rbp), %rax
|
||||
pushq %rax # for ss
|
||||
movzwq 32(%rbp), %rax
|
||||
pushq %rax # for cs
|
||||
movq %ds, %rax
|
||||
pushq %rax
|
||||
movq %es, %rax
|
||||
pushq %rax
|
||||
movq %fs, %rax
|
||||
pushq %rax
|
||||
movq %gs, %rax
|
||||
pushq %rax
|
||||
|
||||
movq %rcx, 8(%rbp) # save vector number
|
||||
|
||||
#; UINT64 Rip;
|
||||
pushq 24(%rbp)
|
||||
|
||||
#; UINT64 Gdtr[2], Idtr[2];
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
pushq %rax
|
||||
sidt (%rsp)
|
||||
xchgq 2(%rsp), %rax
|
||||
xchgq (%rsp), %rax
|
||||
xchgq 8(%rsp), %rax
|
||||
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
pushq %rax
|
||||
sgdt (%rsp)
|
||||
xchgq 2(%rsp), %rax
|
||||
xchgq (%rsp), %rax
|
||||
xchgq 8(%rsp), %rax
|
||||
|
||||
#; UINT64 Ldtr, Tr;
|
||||
xorq %rax, %rax
|
||||
str %ax
|
||||
pushq %rax
|
||||
sldt %ax
|
||||
pushq %rax
|
||||
|
||||
#; UINT64 RFlags;
|
||||
pushq 40(%rbp)
|
||||
|
||||
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||||
movq %cr8, %rax
|
||||
pushq %rax
|
||||
movq %cr4, %rax
|
||||
orq $0x208, %rax
|
||||
movq %rax, %cr4
|
||||
pushq %rax
|
||||
mov %cr3, %rax
|
||||
pushq %rax
|
||||
mov %cr2, %rax
|
||||
pushq %rax
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
mov %cr0, %rax
|
||||
pushq %rax
|
||||
|
||||
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
movq %dr7, %rax
|
||||
pushq %rax
|
||||
#; clear Dr7 while executing debugger itself
|
||||
xorq %rax, %rax
|
||||
movq %rax, %dr7
|
||||
|
||||
movq %dr6, %rax
|
||||
pushq %rax
|
||||
#; insure all status bits in dr6 are clear...
|
||||
xorq %rax, %rax
|
||||
movq %rax, %dr6
|
||||
|
||||
movq %dr3, %rax
|
||||
pushq %rax
|
||||
movq %dr2, %rax
|
||||
pushq %rax
|
||||
movq %dr1, %rax
|
||||
pushq %rax
|
||||
movq %dr0, %rax
|
||||
pushq %rax
|
||||
|
||||
#; FX_SAVE_STATE_X64 FxSaveState;
|
||||
subq $512, %rsp
|
||||
movq %rsp, %rdi
|
||||
.byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
|
||||
|
||||
#; UINT32 ExceptionData;
|
||||
pushq 16(%rbp)
|
||||
|
||||
#; call into exception handler
|
||||
movq 8(%rbp), %rcx
|
||||
leaq ExternalVectorTablePtr(%rip), %rax
|
||||
movl (%eax), %eax
|
||||
movq (%rax,%rcx,8), %rax
|
||||
orq %rax, %rax # NULL?
|
||||
|
||||
je nonNullValue#
|
||||
|
||||
#; Prepare parameter and call
|
||||
# mov rcx, [rbp + 8]
|
||||
mov %rsp, %rdx
|
||||
#
|
||||
# Per X64 calling convention, allocate maximum parameter stack space
|
||||
# and make sure RSP is 16-byte aligned
|
||||
#
|
||||
subq $40, %rsp
|
||||
call *%rax
|
||||
addq $40, %rsp
|
||||
|
||||
nonNullValue:
|
||||
cli
|
||||
#; UINT64 ExceptionData;
|
||||
addq $8, %rsp
|
||||
|
||||
#; FX_SAVE_STATE_X64 FxSaveState;
|
||||
|
||||
movq %rsp, %rsi
|
||||
.byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
|
||||
addq $512, %rsp
|
||||
|
||||
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
popq %rax
|
||||
movq %rax, %dr0
|
||||
popq %rax
|
||||
movq %rax, %dr1
|
||||
popq %rax
|
||||
movq %rax, %dr2
|
||||
popq %rax
|
||||
movq %rax, %dr3
|
||||
#; skip restore of dr6. We cleared dr6 during the context save.
|
||||
addq $8, %rsp
|
||||
popq %rax
|
||||
movq %rax, %dr7
|
||||
|
||||
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||||
popq %rax
|
||||
movq %rax, %cr0
|
||||
addq $8, %rsp # not for Cr1
|
||||
popq %rax
|
||||
movq %rax, %cr2
|
||||
popq %rax
|
||||
movq %rax, %cr3
|
||||
popq %rax
|
||||
movq %rax, %cr4
|
||||
popq %rax
|
||||
movq %rax, %cr8
|
||||
|
||||
#; UINT64 RFlags;
|
||||
popq 40(%rbp)
|
||||
|
||||
#; UINT64 Ldtr, Tr;
|
||||
#; UINT64 Gdtr[2], Idtr[2];
|
||||
#; Best not let anyone mess with these particular registers...
|
||||
addq $48, %rsp
|
||||
|
||||
#; UINT64 Rip;
|
||||
popq 24(%rbp)
|
||||
|
||||
#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
popq %rax
|
||||
# mov %rax, %gs ; not for gs
|
||||
popq %rax
|
||||
# mov %rax, %fs ; not for fs
|
||||
# (X64 will not use fs and gs, so we do not restore it)
|
||||
popq %rax
|
||||
movq %rax, %es
|
||||
popq %rax
|
||||
movq %rax, %ds
|
||||
popq 32(%rbp) # for cs
|
||||
popq 56(%rbp) # for ss
|
||||
|
||||
#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||||
#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||||
popq %rdi
|
||||
popq %rsi
|
||||
addq $8, %rsp # not for rbp
|
||||
popq 48(%rbp) # for rsp
|
||||
popq %rbx
|
||||
popq %rdx
|
||||
popq %rcx
|
||||
popq %rax
|
||||
popq %r8
|
||||
popq %r9
|
||||
popq %r10
|
||||
popq %r11
|
||||
popq %r12
|
||||
popq %r13
|
||||
popq %r14
|
||||
popq %r15
|
||||
|
||||
movq %rbp, %rsp
|
||||
popq %rbp
|
||||
addq $16, %rsp
|
||||
iretq
|
||||
|
||||
|
||||
#text ENDS
|
||||
|
||||
#END
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user