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ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64

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The System Memory region might be out of the 32-bit memory space.

This change has been validated on the FVP AArch64 model using 4GB
of DRAM at 0x8_0000_0000:

-  # System Memory (2GB)
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+  # System Memory (4GB)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000

EFI Shell and Linux kernel boot successfully.

Note: This change has not been validated on AArch32. I expect some
early assembly code to not work.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>




git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin
2014-01-10 11:27:31 +00:00
committed by oliviermartin
parent 18b24f924f
commit c357fd6a1f
16 changed files with 49 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
ArmPkg/ArmPkg.dec
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@ -114,8 +114,8 @@
# System Memory (DRAM): These PCDs define the region of in-built system memory # System Memory (DRAM): These PCDs define the region of in-built system memory
# Some platforms can get DRAM extensions, these additional regions will be declared # Some platforms can get DRAM extensions, these additional regions will be declared
# to UEFI by ArmPLatformPlib # to UEFI by ArmPLatformPlib
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT32|0x00000029 gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT32|0x0000002A gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
# Use ClusterId + CoreId to identify the PrimaryCore # Use ClusterId + CoreId to identify the PrimaryCore
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031 gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031

2
ArmPkg/Include/Library/ArmLib.h
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@ -76,7 +76,7 @@ typedef enum {
typedef struct { typedef struct {
EFI_PHYSICAL_ADDRESS PhysicalBase; EFI_PHYSICAL_ADDRESS PhysicalBase;
EFI_VIRTUAL_ADDRESS VirtualBase; EFI_VIRTUAL_ADDRESS VirtualBase;
UINTN Length; UINT64 Length;
ARM_MEMORY_REGION_ATTRIBUTES Attributes; ARM_MEMORY_REGION_ATTRIBUTES Attributes;
} ARM_MEMORY_REGION_DESCRIPTOR; } ARM_MEMORY_REGION_DESCRIPTOR;

2
ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoader.c
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@ -223,7 +223,7 @@ BdsBootLinuxFdt (
// Try to put the kernel at the start of RAM so as to give it access to all memory. // Try to put the kernel at the start of RAM so as to give it access to all memory.
// If that fails fall back to try loading it within LINUX_KERNEL_MAX_OFFSET of memory start. // If that fails fall back to try loading it within LINUX_KERNEL_MAX_OFFSET of memory start.
LinuxImage = PcdGet32(PcdSystemMemoryBase) + 0x80000; LinuxImage = PcdGet64 (PcdSystemMemoryBase) + 0x80000;
Status = BdsLoadImage (LinuxKernelDevicePath, AllocateAddress, &LinuxImage, &LinuxImageSize); Status = BdsLoadImage (LinuxKernelDevicePath, AllocateAddress, &LinuxImage, &LinuxImageSize);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
// Try again but give the loader more freedom of where to put the image. // Try again but give the loader more freedom of where to put the image.

8
ArmPkg/Library/BdsLib/BdsLinuxLoader.h
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@ -1,6 +1,6 @@
/** @file /** @file
* *
* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* *
* This program and the accompanying materials * This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License * are licensed and made available under the terms and conditions of the BSD License
@ -16,9 +16,9 @@
#define __BDSLINUXLOADER_H #define __BDSLINUXLOADER_H
#define LINUX_UIMAGE_SIGNATURE 0x56190527 #define LINUX_UIMAGE_SIGNATURE 0x56190527
#define LINUX_KERNEL_MAX_OFFSET (PcdGet32(PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxKernelMaxOffset)) #define LINUX_KERNEL_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxKernelMaxOffset))
#define LINUX_ATAG_MAX_OFFSET (PcdGet32(PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxAtagMaxOffset)) #define LINUX_ATAG_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxAtagMaxOffset))
#define LINUX_FDT_MAX_OFFSET (PcdGet32(PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset)) #define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset))
// Additional size that could be used for FDT entries added by the UEFI OS Loader // Additional size that could be used for FDT entries added by the UEFI OS Loader
// Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes) // Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes)

6
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c
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@ -65,9 +65,9 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
// DDR // DDR
VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdSystemMemoryBase); VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdSystemMemoryBase); VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].Length = PcdGet32 (PcdSystemMemorySize); VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
// SMC CS7 // SMC CS7

4
ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h
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@ -52,8 +52,8 @@
#define ARM_VE_SMB_PERIPH_SZ SIZE_64MB #define ARM_VE_SMB_PERIPH_SZ SIZE_64MB
// DRAM // DRAM
#define ARM_VE_DRAM_BASE PcdGet32 (PcdSystemMemoryBase) #define ARM_VE_DRAM_BASE PcdGet64 (PcdSystemMemoryBase)
#define ARM_VE_DRAM_SZ PcdGet32 (PcdSystemMemorySize) #define ARM_VE_DRAM_SZ PcdGet64 (PcdSystemMemorySize)
// Inside the DRAM we allocate a section for the VRAM (Video RAM) // Inside the DRAM we allocate a section for the VRAM (Video RAM)
#define LCD_VRAM_CORE_TILE_BASE 0x64000000 #define LCD_VRAM_CORE_TILE_BASE 0x64000000

4
ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
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@ -45,8 +45,8 @@
#define ARM_VE_SMB_PERIPH_SZ SIZE_64MB #define ARM_VE_SMB_PERIPH_SZ SIZE_64MB
// DRAM // DRAM
#define ARM_VE_DRAM_BASE PcdGet32 (PcdSystemMemoryBase) #define ARM_VE_DRAM_BASE PcdGet64 (PcdSystemMemoryBase)
#define ARM_VE_DRAM_SZ PcdGet32 (PcdSystemMemorySize) #define ARM_VE_DRAM_SZ PcdGet64 (PcdSystemMemorySize)
// This can be any value since we only support motherboard PL111 // This can be any value since we only support motherboard PL111
#define LCD_VRAM_CORE_TILE_BASE 0x00000000 #define LCD_VRAM_CORE_TILE_BASE 0x00000000

16
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
View File

@ -136,18 +136,18 @@ ArmPlatformGetVirtualMemoryMap (
#ifndef ARM_BIGLITTLE_TC2 #ifndef ARM_BIGLITTLE_TC2
// Workaround for SRAM bug in RTSM // Workaround for SRAM bug in RTSM
if (PcdGet32 (PcdSystemMemoryBase) != 0x80000000) { if (PcdGet64 (PcdSystemMemoryBase) != 0x80000000) {
VirtualMemoryTable[++Index].PhysicalBase = 0x80000000; VirtualMemoryTable[++Index].PhysicalBase = 0x80000000;
VirtualMemoryTable[Index].VirtualBase = 0x80000000; VirtualMemoryTable[Index].VirtualBase = 0x80000000;
VirtualMemoryTable[Index].Length = PcdGet32 (PcdSystemMemoryBase) - 0x80000000; VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemoryBase) - 0x80000000;
VirtualMemoryTable[Index].Attributes = CacheAttributes; VirtualMemoryTable[Index].Attributes = CacheAttributes;
} }
#endif #endif
// DDR // DDR
VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdSystemMemoryBase); VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdSystemMemoryBase); VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].Length = PcdGet32 (PcdSystemMemorySize); VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[Index].Attributes = CacheAttributes; VirtualMemoryTable[Index].Attributes = CacheAttributes;
// Detect if it is a 1GB or 2GB Test Chip // Detect if it is a 1GB or 2GB Test Chip
@ -159,13 +159,13 @@ ArmPlatformGetVirtualMemoryMap (
EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED, EFI_RESOURCE_ATTRIBUTE_TESTED,
PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize), PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize),
SIZE_1GB SIZE_1GB
); );
// Map the additional 1GB into the MMU // Map the additional 1GB into the MMU
VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize); VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize); VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[Index].Length = SIZE_1GB; VirtualMemoryTable[Index].Length = SIZE_1GB;
VirtualMemoryTable[Index].Attributes = CacheAttributes; VirtualMemoryTable[Index].Attributes = CacheAttributes;
} }

10
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
View File

@ -19,8 +19,8 @@
#include <Library/PcdLib.h> #include <Library/PcdLib.h>
#include <Library/DebugLib.h> #include <Library/DebugLib.h>
#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \ #define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet32 (PcdSystemMemoryBase))) ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet64 (PcdSystemMemoryBase)))
// Declared by ArmPlatformPkg/PrePi Module // Declared by ArmPlatformPkg/PrePi Module
extern UINTN mGlobalVariableBase; extern UINTN mGlobalVariableBase;
@ -40,7 +40,7 @@ ArmPlatformGetGlobalVariable (
if (IS_XIP()) { if (IS_XIP()) {
// In Case of XIP, we expect the Primary Stack at the top of the System Memory // In Case of XIP, we expect the Primary Stack at the top of the System Memory
// The size must be 64bit aligned to allow 64bit variable to be aligned // The size must be 64bit aligned to allow 64bit variable to be aligned
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8); GlobalVariableBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
} else { } else {
GlobalVariableBase = mGlobalVariableBase; GlobalVariableBase = mGlobalVariableBase;
} }
@ -69,7 +69,7 @@ ArmPlatformSetGlobalVariable (
if (IS_XIP()) { if (IS_XIP()) {
// In Case of XIP, we expect the Primary Stack at the top of the System Memory // In Case of XIP, we expect the Primary Stack at the top of the System Memory
// The size must be 64bit aligned to allow 64bit variable to be aligned // The size must be 64bit aligned to allow 64bit variable to be aligned
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8); GlobalVariableBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
} else { } else {
GlobalVariableBase = mGlobalVariableBase; GlobalVariableBase = mGlobalVariableBase;
} }
@ -96,7 +96,7 @@ ArmPlatformGetGlobalVariableAddress (
if (IS_XIP()) { if (IS_XIP()) {
// In Case of XIP, we expect the Primary Stack at the top of the System Memory // In Case of XIP, we expect the Primary Stack at the top of the System Memory
// The size must be 64bit aligned to allow 64bit variable to be aligned // The size must be 64bit aligned to allow 64bit variable to be aligned
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8); GlobalVariableBase = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
} else { } else {
GlobalVariableBase = mGlobalVariableBase; GlobalVariableBase = mGlobalVariableBase;
} }

10
ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
View File

@ -78,7 +78,7 @@ MemoryPeim (
BOOLEAN Found; BOOLEAN Found;
// Ensure PcdSystemMemorySize has been set // Ensure PcdSystemMemorySize has been set
ASSERT (PcdGet32 (PcdSystemMemorySize) != 0); ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
// //
// Now, the permanent memory has been installed, we can call AllocatePages() // Now, the permanent memory has been installed, we can call AllocatePages()
@ -97,16 +97,16 @@ MemoryPeim (
BuildResourceDescriptorHob ( BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY, EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes, ResourceAttributes,
PcdGet32 (PcdSystemMemoryBase), PcdGet64 (PcdSystemMemoryBase),
PcdGet32 (PcdSystemMemorySize) PcdGet64 (PcdSystemMemorySize)
); );
SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdSystemMemoryBase) + (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdSystemMemorySize); SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemoryBase) + (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemorySize);
FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize); FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize);
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE // EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE
// core to overwrite this area we must mark the region with the attribute non-present // core to overwrite this area we must mark the region with the attribute non-present
if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet32 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) { if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {
Found = FALSE; Found = FALSE;
// Search for System Memory Hob that contains the firmware // Search for System Memory Hob that contains the firmware

6
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
View File

@ -104,10 +104,10 @@ InitializeMemory (
DEBUG ((EFI_D_ERROR, "Memory Init PEIM Loaded\n")); DEBUG ((EFI_D_ERROR, "Memory Init PEIM Loaded\n"));
// Ensure PcdSystemMemorySize has been set // Ensure PcdSystemMemorySize has been set
ASSERT (FixedPcdGet32 (PcdSystemMemorySize) != 0); ASSERT (FixedPcdGet64 (PcdSystemMemorySize) != 0);
SystemMemoryBase = (UINTN)FixedPcdGet32 (PcdSystemMemoryBase); SystemMemoryBase = (UINTN)FixedPcdGet64 (PcdSystemMemoryBase);
SystemMemoryTop = SystemMemoryBase + (UINTN)FixedPcdGet32 (PcdSystemMemorySize); SystemMemoryTop = SystemMemoryBase + (UINTN)FixedPcdGet64 (PcdSystemMemorySize);
FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress); FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize); FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);

4
ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
View File

@ -42,8 +42,8 @@ _SetSVCMode:
// at the top of the DRAM) // at the top of the DRAM)
_SetupStackPosition: _SetupStackPosition:
// Compute Top of System Memory // Compute Top of System Memory
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), x1) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemoryBase), x1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), x2) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemorySize), x2)
sub x2, x2, #1 sub x2, x2, #1
add x1, x1, x2 // x1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize add x1, x1, x2 // x1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize

4
ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
View File

@ -50,8 +50,8 @@ _SetSVCMode:
// at the top of the DRAM) // at the top of the DRAM)
_SetupStackPosition: _SetupStackPosition:
// Compute Top of System Memory // Compute Top of System Memory
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemoryBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemorySize), r2)
sub r2, r2, #1 sub r2, r2, #1
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize

4
ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
View File

@ -52,8 +52,8 @@ _SetSVCMode
// at the top of the DRAM) // at the top of the DRAM)
_SetupStackPosition _SetupStackPosition
// Compute Top of System Memory // Compute Top of System Memory
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemoryBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2) LoadConstantToReg (FixedPcdGet64 (PcdSystemMemorySize), r2)
sub r2, r2, #1 sub r2, r2, #1
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize

8
ArmPlatformPkg/PrePi/PrePi.c
View File

@ -30,8 +30,8 @@
#include "PrePi.h" #include "PrePi.h"
#include "LzmaDecompress.h" #include "LzmaDecompress.h"
#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \ #define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \
((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet32 (PcdSystemMemoryBase))) ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))
// Not used when PrePi in run in XIP mode // Not used when PrePi in run in XIP mode
UINTN mGlobalVariableBase = 0; UINTN mGlobalVariableBase = 0;
@ -108,8 +108,8 @@ PrePiMain (
// If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP) // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
ASSERT (IS_XIP() || ASSERT (IS_XIP() ||
((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet32 (PcdSystemMemoryBase)) && ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))))); ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet64 (PcdSystemMemorySize)))));
// Initialize the architecture specific bits // Initialize the architecture specific bits
ArchInitialize (); ArchInitialize ();

6
BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardMem.c
View File

@ -55,9 +55,9 @@ ArmPlatformGetVirtualMemoryMap (
} }
// ReMap (Either NOR Flash or DRAM) // ReMap (Either NOR Flash or DRAM)
VirtualMemoryTable[Index].PhysicalBase = PcdGet32(PcdSystemMemoryBase); VirtualMemoryTable[Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].VirtualBase = PcdGet32(PcdSystemMemoryBase); VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[Index].Length = PcdGet32(PcdSystemMemorySize); VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[Index].Attributes = CacheAttributes; VirtualMemoryTable[Index].Attributes = CacheAttributes;
// SOC Registers. L3 interconnects // SOC Registers. L3 interconnects