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UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiCr3" with PatchInstructionX86()

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Rename the variable to "gPatchSmiCr3" so that its association with
PatchInstructionX86() is clear from the declaration, change its type to
X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This
lets us remove the binary (DB) encoding of some instructions in
"SmiEntry.nasm".

Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Laszlo Ersek
2018-02-01 23:40:29 +01:00
parent fc504fdea7
commit c455687fd0
3 changed files with 8 additions and 8 deletions
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6
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
View File

@@ -56,7 +56,7 @@ extern ASM_PFX(CpuSmmDebugExit)
global ASM_PFX(gPatchSmbase)
global ASM_PFX(mXdSupported)
global ASM_PFX(gPatchSmiStack)
global ASM_PFX(gSmiCr3)
global ASM_PFX(gPatchSmiCr3)
global ASM_PFX(gcSmiHandlerTemplate)
global ASM_PFX(gcSmiHandlerSize)
@@ -102,8 +102,8 @@ ASM_PFX(gPatchSmiStack):
BITS 64
ProtFlatMode:
DB 0xb8 ; mov eax, offset gSmiCr3
ASM_PFX(gSmiCr3): DD 0
mov eax, strict dword 0 ; source operand will be patched
ASM_PFX(gPatchSmiCr3):
mov cr3, rax
mov eax, 0x668 ; as cr4.PGE is not set here, refresh cr3
mov cr4, rax ; in PreModifyMtrrs() to flush TLB.