ArmPlatformPkg/PL35xSmc: Clean SMC driver to replace hardcoded Chip Select into the driver itself by passing SMC configuration to the driver
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11959 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
@@ -31,7 +31,6 @@
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ArmLib
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ArmTrustZoneLib
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MemoryAllocationLib
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PL354SmcLib
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PL341DmcLib
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PL301AxiLib
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L2X0CacheLib
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@@ -40,6 +39,8 @@
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[Sources.common]
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CTA9x4.c
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CTA9x4Mem.c
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CTA9x4Helper.asm | RVCT
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CTA9x4Helper.S | GCC
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[Protocols]
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@@ -34,7 +34,7 @@
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L2X0CacheLib
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PL301AxiLib
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PL341DmcLib
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PL354SmcLib
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PL35xSmcLib
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SerialPortLib
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[Sources.common]
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@@ -42,6 +42,8 @@
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CTA9x4.c
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CTA9x4Helper.asm | RVCT
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CTA9x4Helper.S | GCC
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CTA9x4Boot.asm | RVCT
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CTA9x4Boot.S | GCC
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[Protocols]
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110
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S
Executable file
110
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S
Executable file
@@ -0,0 +1,110 @@
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <Drivers/PL35xSmc.h>
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#include <ArmPlatform.h>
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#include <AutoGen.h>
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.text
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.align 3
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_IMPORT(PL35xSmcInitialize)
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//
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// For each Chip Select: ChipSelect / SetCycle / SetOpMode
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//
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VersatileExpressSmcConfiguration:
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// NOR Flash 0
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(0)
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.word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// NOR Flash 1
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(4)
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.word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// SRAM
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(2)
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.word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// Usb/Eth/VRAM
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(3)
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.word PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// Memory Mapped Peripherals
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(7)
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.word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// VRAM
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.word PL350_SMC_DIRECT_CMD_ADDR_CS(1)
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.word 0x00049249
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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VersatileExpressSmcConfigurationEnd:
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/**
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Initialize the memory where the initial stacks will reside
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This memory can contain the initial stacks (Secure and Secure Monitor stacks).
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In some platform, this region is already initialized and the implementation of this function can
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do nothing. This memory can also represent the Secure RAM.
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This function is called before the satck has been set up. Its implementation must ensure the stack
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pointer is not used (probably required to use assembly language)
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**/
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ASM_PFX(ArmPlatformInitializeBootMemory):
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mov r5, lr
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//
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// Initialize PL354 SMC
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//
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LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
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ldr r2, =VersatileExpressSmcConfiguration
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ldr r3, =VersatileExpressSmcConfigurationEnd
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blx ASM_PFX(PL35xSmcInitialize)
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//
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// Page mode setup for VRAM
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//
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LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
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// Read current state
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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// Enable page mode
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, = 0x00900090
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str r0, [r2, #0]
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// Confirm page mode enabled
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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bx r5
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112
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm
Executable file
112
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm
Executable file
@@ -0,0 +1,112 @@
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <Drivers/PL35xSmc.h>
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#include <ArmPlatform.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformInitializeBootMemory
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IMPORT PL35xSmcInitialize
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PRESERVE8
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AREA CTA9x4BootMode, CODE, READONLY
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//
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// For each Chip Select: ChipSelect / SetCycle / SetOpMode
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//
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VersatileExpressSmcConfiguration
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// NOR Flash 0
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(0)
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DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// NOR Flash 1
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(4)
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DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// SRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(2)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// Usb/Eth/VRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(3)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// Memory Mapped Peripherals
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(7)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// VRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(1)
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DCD 0x00049249
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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VersatileExpressSmcConfigurationEnd
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/**
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Initialize the memory where the initial stacks will reside
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This memory can contain the initial stacks (Secure and Secure Monitor stacks).
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In some platform, this region is already initialized and the implementation of this function can
|
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do nothing. This memory can also represent the Secure RAM.
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This function is called before the satck has been set up. Its implementation must ensure the stack
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pointer is not used (probably required to use assembly language)
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**/
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ArmPlatformInitializeBootMemory
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mov r5, lr
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//
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// Initialize PL354 SMC
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//
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LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
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ldr r2, =VersatileExpressSmcConfiguration
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ldr r3, =VersatileExpressSmcConfigurationEnd
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blx PL35xSmcInitialize
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//
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// Page mode setup for VRAM
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//
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LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
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// Read current state
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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// Enable page mode
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, = 0x00900090
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str r0, [r2, #0]
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// Confirm page mode enabled
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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bx r5
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@@ -15,18 +15,13 @@
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Drivers/PL354Smc.h>
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#include <ArmPlatform.h>
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#include <AutoGen.h>
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.text
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.align 3
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GCC_ASM_EXPORT(ArmPlatformIsMemoryInitialized)
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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.extern ASM_PFX(SMCInitializeNOR)
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.extern ASM_PFX(SMCInitializeSRAM)
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.extern ASM_PFX(SMCInitializePeripherals)
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.extern ASM_PFX(SMCInitializeVRAM)
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/**
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Called at the early stage of the Boot phase to know if the memory has already been initialized
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@@ -49,44 +44,3 @@ ASM_PFX(ArmPlatformIsMemoryInitialized):
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tst r0, #0x40000000
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bx lr
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/**
|
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Initialize the memory where the initial stacks will reside
|
||||
|
||||
This memory can contain the initial stacks (Secure and Secure Monitor stacks).
|
||||
In some platform, this region is already initialized and the implementation of this function can
|
||||
do nothing. This memory can also represent the Secure RAM.
|
||||
This function is called before the satck has been set up. Its implementation must ensure the stack
|
||||
pointer is not used (probably required to use assembly language)
|
||||
|
||||
**/
|
||||
ASM_PFX(ArmPlatformInitializeBootMemory):
|
||||
mov r5, lr
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||||
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||||
//
|
||||
// Initialize PL354 SMC
|
||||
//
|
||||
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
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// NOR Flash 0
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LoadConstantToReg (PL354_SMC_DIRECT_CMD_ADDR_CS(0,0), r2)
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blx ASM_PFX(SMCInitializeNOR)
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// NOR Flash 1
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LoadConstantToReg (PL354_SMC_DIRECT_CMD_ADDR_CS(1,0), r2)
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blx ASM_PFX(SMCInitializeNOR)
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// Setup SRAM
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blx ASM_PFX(SMCInitializeSRAM)
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// Memory Mapped Peripherals
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blx ASM_PFX(SMCInitializePeripherals)
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// Initialize VRAM
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||||
//TODO: Check if we really must inititialize Video SRAM in UEFI. Does Linux can do it ? Does the Video driver can do it ?
|
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// It will be faster (only initialize if required) and easier (remove assembly code because of a stack available) to move this initialization.
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LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
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blx ASM_PFX(SMCInitializeVRAM)
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||||
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bx r5
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.end
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||||
@@ -1,32 +1,27 @@
|
||||
//
|
||||
// Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <Base.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <ArmPlatform.h>
|
||||
#include <Drivers/PL354Smc.h>
|
||||
#include <AutoGen.h>
|
||||
|
||||
INCLUDE AsmMacroIoLib.inc
|
||||
|
||||
EXPORT ArmPlatformIsMemoryInitialized
|
||||
|
||||
EXPORT ArmPlatformInitializeBootMemory
|
||||
IMPORT SMCInitializeNOR
|
||||
IMPORT SMCInitializeSRAM
|
||||
IMPORT SMCInitializePeripherals
|
||||
IMPORT SMCInitializeVRAM
|
||||
|
||||
|
||||
PRESERVE8
|
||||
AREA CTA9x4Helper, CODE, READONLY
|
||||
|
||||
@@ -51,44 +46,3 @@ ArmPlatformIsMemoryInitialized
|
||||
tst r0, #0x40000000
|
||||
bx lr
|
||||
|
||||
/**
|
||||
Initialize the memory where the initial stacks will reside
|
||||
|
||||
This memory can contain the initial stacks (Secure and Secure Monitor stacks).
|
||||
In some platform, this region is already initialized and the implementation of this function can
|
||||
do nothing. This memory can also represent the Secure RAM.
|
||||
This function is called before the satck has been set up. Its implementation must ensure the stack
|
||||
pointer is not used (probably required to use assembly language)
|
||||
|
||||
**/
|
||||
ArmPlatformInitializeBootMemory
|
||||
mov r5, lr
|
||||
|
||||
//
|
||||
// Initialize PL354 SMC
|
||||
//
|
||||
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
|
||||
|
||||
// NOR Flash 0
|
||||
mov r2, PL354_SMC_DIRECT_CMD_ADDR_CS(0,0)
|
||||
blx SMCInitializeNOR
|
||||
|
||||
// NOR Flash 1
|
||||
mov r2, PL354_SMC_DIRECT_CMD_ADDR_CS(1,0)
|
||||
blx SMCInitializeNOR
|
||||
|
||||
// Setup SRAM
|
||||
blx SMCInitializeSRAM
|
||||
|
||||
// Memory Mapped Peripherals
|
||||
blx SMCInitializePeripherals
|
||||
|
||||
// Initialize VRAM
|
||||
//TODO: Check if we really must inititialize Video SRAM in UEFI. Does Linux can do it ? Does the Video driver can do it ?
|
||||
// It will be faster (only initialize if required) and easier (remove assembly code because of a stack available) to move this initialization.
|
||||
LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
|
||||
blx SMCInitializeVRAM
|
||||
|
||||
bx r5
|
||||
|
||||
END
|
||||
|
||||
Reference in New Issue
Block a user