1. Fixed tools_def.template to meet ICC build for IA32
2. Modified some source files to meet ICC build for IA32 and IPF. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3271 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@@ -351,7 +351,7 @@ EhcGetRootHubPortStatus (
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for (Index = 0; Index < MapSize; Index++) {
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if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
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PortStatus->PortStatus |= mUsbPortStateMap[Index].UefiState;
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PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
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}
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}
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@@ -359,7 +359,7 @@ EhcGetRootHubPortStatus (
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for (Index = 0; Index < MapSize; Index++) {
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if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
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PortStatus->PortChangeStatus |= mUsbPortChangeMap[Index].UefiState;
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PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
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}
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}
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@@ -707,7 +707,7 @@ EhcControlTransfer (
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// endpoint is bidirectional. EhcCreateUrb expects this
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// combination of Ep addr and its direction.
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//
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Endpoint = 0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0);
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Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
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Urb = EhcCreateUrb (
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Ehc,
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DeviceAddress,
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@@ -1340,7 +1340,7 @@ EhcDriverBindingSupported (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiPciIoProtocolGuid,
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&PciIo,
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(VOID **) &PciIo,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_BY_DRIVER
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@@ -1491,7 +1491,7 @@ EhcDriverBindingStart (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiPciIoProtocolGuid,
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&PciIo,
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(VOID **) &PciIo,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_BY_DRIVER
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@@ -1636,7 +1636,7 @@ EhcDriverBindingStop (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiUsb2HcProtocolGuid,
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&Usb2Hc,
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(VOID **) &Usb2Hc,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_GET_PROTOCOL
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@@ -66,7 +66,7 @@ enum {
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EHC_SYNC_POLL_TIME = 20 * EHC_STALL_1_MICROSECOND,
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EHC_ASYNC_POLL_TIME = 50 * 10000UL, // The unit of time is 100us
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EHC_TPL = TPL_NOTIFY,
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EHC_TPL = TPL_NOTIFY
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};
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//
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@@ -95,7 +95,7 @@ enum {
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#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
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typedef struct _USB2_HC_DEV {
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struct _USB2_HC_DEV {
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UINTN Signature;
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EFI_USB2_HC_PROTOCOL Usb2Hc;
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@@ -143,7 +143,7 @@ typedef struct _USB2_HC_DEV {
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// Misc
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//
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EFI_UNICODE_STRING_TABLE *ControllerNameTable;
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} USB2_HC_DEV;
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};
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extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
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@@ -30,7 +30,7 @@ enum {
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EHC_DEBUG_QH = (UINTN)(1 << 8),
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EHC_DEBUG_QTD = (UINTN)(1 << 9),
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EHC_DEBUG_BUF = (UINTN)(1 << 10),
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EHC_DEBUG_BUF = (UINTN)(1 << 10)
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};
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@@ -93,7 +93,7 @@ enum {
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//
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EHC_PCI_CLASSC = 0x09,
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EHC_PCI_CLASSC_PI = 0x20,
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EHC_BAR_INDEX = 0, /* how many bytes away from USB_BASE to 0x10 */
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EHC_BAR_INDEX = 0 /* how many bytes away from USB_BASE to 0x10 */
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};
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#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
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@@ -486,7 +486,7 @@ EhcCreateQtds (
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// Switch the Toggle bit if odd number of packets are included in the QTD.
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//
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if (((Qtd->DataLen + Ep->MaxPacket - 1) / Ep->MaxPacket) % 2) {
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Toggle = 1 - Toggle;
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Toggle = (UINT8) (1 - Toggle);
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}
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Len += Qtd->DataLen;
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@@ -588,7 +588,7 @@ EhcCreateUrb (
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Ep = &Urb->Ep;
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Ep->DevAddr = DevAddr;
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Ep->EpAddr = EpAddr & 0x0F;
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Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
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Ep->Direction = ((EpAddr & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
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Ep->DevSpeed = DevSpeed;
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Ep->MaxPacket = MaxPacket;
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@@ -83,7 +83,7 @@ enum {
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QH_MICROFRAME_6 = 0x40,
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QH_MICROFRAME_7 = 0x80,
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USB_ERR_SHORT_PACKET = 0x200,
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USB_ERR_SHORT_PACKET = 0x200
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};
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//
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@@ -180,13 +180,13 @@ typedef struct _USB_ENDPOINT {
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// Software QTD strcture, this is used to manage all the
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// QTD generated from a URB. Don't add fields before QtdHw.
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//
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typedef struct _EHC_QTD {
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struct _EHC_QTD {
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QTD_HW QtdHw;
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UINT32 Signature;
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LIST_ENTRY QtdList; // The list of QTDs to one end point
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UINT8 *Data; // Buffer of the original data
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UINTN DataLen; // Original amount of data in this QTD
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} EHC_QTD;
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};
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//
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// Software QH structure. All three different transaction types
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@@ -203,19 +203,19 @@ typedef struct _EHC_QTD {
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// transfer is supported. A dummy QH is linked to EHCI AsyncListAddr
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// as the reclamation header. New transfer is inserted after this QH.
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//
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typedef struct _EHC_QH {
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struct _EHC_QH {
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QH_HW QhHw;
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UINT32 Signature;
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EHC_QH *NextQh; // The queue head pointed to by horizontal link
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LIST_ENTRY Qtds; // The list of QTDs to this queue head
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UINTN Interval;
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} EHC_QH;
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};
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//
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// URB (Usb Request Block) contains information for all kinds of
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// usb requests.
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//
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typedef struct _URB {
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struct _URB {
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UINT32 Signature;
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LIST_ENTRY UrbList;
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@@ -244,7 +244,7 @@ typedef struct _URB {
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UINT32 Result;
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UINTN Completed; // completed data length
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UINT8 DataToggle;
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} URB;
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};
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@@ -520,7 +520,7 @@ UsbHcFreeMem (
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for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
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ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
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Block->Bits[Byte] ^= (UINT8) USB_HC_BIT (Bit);
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Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
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NEXT_BIT (Byte, Bit);
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}
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@@ -37,7 +37,7 @@ Revision History
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typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
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typedef struct _USBHC_MEM_BLOCK {
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struct _USBHC_MEM_BLOCK {
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UINT8 *Bits; // Bit array to record which unit is allocated
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UINTN BitsLen;
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UINT8 *Buf;
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@@ -45,7 +45,7 @@ typedef struct _USBHC_MEM_BLOCK {
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UINTN BufLen; // Memory size in bytes
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VOID *Mapping;
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USBHC_MEM_BLOCK *Next;
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} USBHC_MEM_BLOCK;
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};
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//
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// USBHC_MEM_POOL is used to manage the memory used by USB
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@@ -63,7 +63,7 @@ enum {
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USBHC_MEM_UNIT = 64, // Memory allocation unit, must be 2^n, n>4
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USBHC_MEM_UNIT_MASK = USBHC_MEM_UNIT - 1,
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USBHC_MEM_DEFAULT_PAGES = 16,
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USBHC_MEM_DEFAULT_PAGES = 16
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};
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#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
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@@ -1538,7 +1538,7 @@ Uhci2ControlTransfer (
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BOOLEAN IsSlow;
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Uhc = UHC_FROM_USB2_HC_PROTO (This);
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IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
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IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
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return UhciControlTransfer (
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&Uhc->UsbHc,
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@@ -1668,7 +1668,7 @@ Uhci2AsyncInterruptTransfer (
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BOOLEAN IsSlow;
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Uhc = UHC_FROM_USB2_HC_PROTO (This);
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IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
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IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
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return UhciAsyncInterruptTransfer (
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&Uhc->UsbHc,
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@@ -1736,7 +1736,7 @@ Uhci2SyncInterruptTransfer (
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}
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Uhc = UHC_FROM_USB2_HC_PROTO (This);
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IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
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IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
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return UhciSyncInterruptTransfer (
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&Uhc->UsbHc,
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@@ -1897,7 +1897,7 @@ UhciDriverBindingSupported (
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OpenStatus = gBS->OpenProtocol (
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Controller,
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&gEfiPciIoProtocolGuid,
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&PciIo,
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(VOID **) &PciIo,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_BY_DRIVER
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@@ -2148,7 +2148,7 @@ UhciDriverBindingStart (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiPciIoProtocolGuid,
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&PciIo,
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(VOID **) &PciIo,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_BY_DRIVER
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@@ -2277,7 +2277,7 @@ UhciDriverBindingStop (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiUsbHcProtocolGuid,
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&UsbHc,
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(VOID **) &UsbHc,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_GET_PROTOCOL
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@@ -2294,7 +2294,7 @@ UhciDriverBindingStop (
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiUsb2HcProtocolGuid,
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&Usb2Hc,
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(VOID **) &Usb2Hc,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_GET_PROTOCOL
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@@ -75,7 +75,7 @@ enum {
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//
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UHCI_TPL = TPL_NOTIFY,
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USB_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('u', 'h', 'c', 'i'),
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USB_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')
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};
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#pragma pack(1)
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@@ -100,7 +100,7 @@ typedef struct {
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// or bulk transfer can reclaim the unused bandwidth. Some USB
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// device requires this bandwidth reclamation capability.
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//
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typedef struct _USB_HC_DEV {
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struct _USB_HC_DEV {
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UINT32 Signature;
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EFI_USB_HC_PROTOCOL UsbHc;
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EFI_USB2_HC_PROTOCOL Usb2Hc;
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@@ -132,7 +132,7 @@ typedef struct _USB_HC_DEV {
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USBHC_MEM_POOL *MemPool;
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EFI_UNICODE_STRING_TABLE *CtrlNameTable;
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VOID *FrameMapping;
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} USB_HC_DEV;
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};
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extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;
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extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;
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@@ -88,19 +88,19 @@ typedef struct {
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typedef struct _UHCI_TD_SW UHCI_TD_SW;
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typedef struct _UHCI_QH_SW UHCI_QH_SW;
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typedef struct _UHCI_QH_SW {
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struct _UHCI_QH_SW {
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UHCI_QH_HW QhHw;
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UHCI_QH_SW *NextQh;
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UHCI_TD_SW *TDs;
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UINTN Interval;
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} UHCI_QH_SW;
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};
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typedef struct _UHCI_TD_SW {
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struct _UHCI_TD_SW {
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UHCI_TD_HW TdHw;
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UHCI_TD_SW *NextTd;
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UINT8 *Data;
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UINT16 DataLen;
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} UHCI_TD_SW;
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};
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/**
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@@ -116,7 +116,7 @@ UhciSetRegBit (
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UINT16 Data;
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Data = UhciReadReg (PciIo, Offset);
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Data |= Bit;
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Data = (UINT16) (Data |Bit);
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UhciWriteReg (PciIo, Offset, Data);
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}
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@@ -141,7 +141,7 @@ UhciClearRegBit (
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UINT16 Data;
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Data = UhciReadReg (PciIo, Offset);
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Data &= ~Bit;
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Data = (UINT16) (Data & ~Bit);
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UhciWriteReg (PciIo, Offset, Data);
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}
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@@ -98,7 +98,7 @@ enum {
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USBTD_BABBLE = BIT(4), // Babble condition
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USBTD_NAK = BIT(3), // NAK is received
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USBTD_CRC = BIT(2), // CRC/Time out error
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USBTD_BITSTUFF = BIT(1), // Bit stuff error
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USBTD_BITSTUFF = BIT(1) // Bit stuff error
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};
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@@ -498,7 +498,7 @@ UhciCheckTdStatus (
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// next to the last known-good TD's data toggle if
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// any TD is executed OK
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//
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QhResult->NextToggle = 1 - (UINT8)TdHw->DataToggle;
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QhResult->NextToggle = (UINT8) (1 - (UINT8)TdHw->DataToggle);
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//
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// This TD is finished OK or met short packet read. Update the
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@@ -38,7 +38,7 @@ enum {
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USB_ERR_FAIL_MASK = EFI_USB_ERR_STALL | EFI_USB_ERR_BUFFER |
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EFI_USB_ERR_BABBLE | EFI_USB_ERR_CRC |
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EFI_USB_ERR_TIMEOUT | EFI_USB_ERR_BITSTUFF |
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EFI_USB_ERR_SYSTEM,
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EFI_USB_ERR_SYSTEM
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};
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@@ -59,7 +59,7 @@ typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;
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//
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// Structure used to manager the asynchronous interrupt transfers.
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//
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typedef struct _UHCI_ASYNC_REQUEST{
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struct _UHCI_ASYNC_REQUEST{
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UINTN Signature;
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LIST_ENTRY Link;
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UHCI_ASYNC_REQUEST *Recycle;
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@@ -86,7 +86,7 @@ typedef struct _UHCI_ASYNC_REQUEST{
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//
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EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
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VOID *Context;
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} UHCI_ASYNC_REQUEST;
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};
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#define UHCI_ASYNC_INT_FROM_LINK(a) \
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CR (a, UHCI_ASYNC_REQUEST, Link, UHCI_ASYNC_INT_SIGNATURE)
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@@ -519,7 +519,7 @@ UsbHcFreeMem (
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for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
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ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
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Block->Bits[Byte] ^= (UINT8) USB_HC_BIT (Bit);
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Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
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NEXT_BIT (Byte, Bit);
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}
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@@ -36,7 +36,7 @@ Revision History
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typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
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typedef struct _USBHC_MEM_BLOCK {
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struct _USBHC_MEM_BLOCK {
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UINT8 *Bits; // Bit array to record which unit is allocated
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UINTN BitsLen;
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UINT8 *Buf;
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@@ -44,7 +44,7 @@ typedef struct _USBHC_MEM_BLOCK {
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UINTN BufLen; // Memory size in bytes
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VOID *Mapping;
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USBHC_MEM_BLOCK *Next;
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} USBHC_MEM_BLOCK;
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};
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//
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// USBHC_MEM_POOL is used to manage the memory used by USB
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@@ -62,7 +62,7 @@ enum {
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USBHC_MEM_UNIT = 64, // Memory allocation unit, must be 2^n, n>4
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USBHC_MEM_UNIT_MASK = USBHC_MEM_UNIT - 1,
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USBHC_MEM_DEFAULT_PAGES = 16,
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USBHC_MEM_DEFAULT_PAGES = 16
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};
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#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
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Block a user