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1. Fixed tools_def.template to meet ICC build for IA32

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2. Modified some source files to meet ICC build for IA32 and IPF.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3271 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
2007-07-17 01:48:09 +00:00
parent 0c1f1ad1e9
commit c52fa98ca9
40 changed files with 230 additions and 244 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
View File

@@ -351,7 +351,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
PortStatus->PortStatus |= mUsbPortStateMap[Index].UefiState;
PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
@@ -359,7 +359,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
PortStatus->PortChangeStatus |= mUsbPortChangeMap[Index].UefiState;
PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -707,7 +707,7 @@ EhcControlTransfer (
// endpoint is bidirectional. EhcCreateUrb expects this
// combination of Ep addr and its direction.
//
Endpoint = 0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0);
Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
Urb = EhcCreateUrb (
Ehc,
DeviceAddress,
@@ -1340,7 +1340,7 @@ EhcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
&PciIo,
(VOID **) &PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1491,7 +1491,7 @@ EhcDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
&PciIo,
(VOID **) &PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1636,7 +1636,7 @@ EhcDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
&Usb2Hc,
(VOID **) &Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL

6
MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h
View File

@@ -66,7 +66,7 @@ enum {
EHC_SYNC_POLL_TIME = 20 * EHC_STALL_1_MICROSECOND,
EHC_ASYNC_POLL_TIME = 50 * 10000UL, // The unit of time is 100us
EHC_TPL = TPL_NOTIFY,
EHC_TPL = TPL_NOTIFY
};
//
@@ -95,7 +95,7 @@ enum {
#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
typedef struct _USB2_HC_DEV {
struct _USB2_HC_DEV {
UINTN Signature;
EFI_USB2_HC_PROTOCOL Usb2Hc;
@@ -143,7 +143,7 @@ typedef struct _USB2_HC_DEV {
// Misc
//
EFI_UNICODE_STRING_TABLE *ControllerNameTable;
} USB2_HC_DEV;
};
extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;

2
MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h
View File

@@ -30,7 +30,7 @@ enum {
EHC_DEBUG_QH = (UINTN)(1 << 8),
EHC_DEBUG_QTD = (UINTN)(1 << 9),
EHC_DEBUG_BUF = (UINTN)(1 << 10),
EHC_DEBUG_BUF = (UINTN)(1 << 10)
};

2
MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
View File

@@ -93,7 +93,7 @@ enum {
//
EHC_PCI_CLASSC = 0x09,
EHC_PCI_CLASSC_PI = 0x20,
EHC_BAR_INDEX = 0, /* how many bytes away from USB_BASE to 0x10 */
EHC_BAR_INDEX = 0 /* how many bytes away from USB_BASE to 0x10 */
};
#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)

4
MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
View File

@@ -486,7 +486,7 @@ EhcCreateQtds (
// Switch the Toggle bit if odd number of packets are included in the QTD.
//
if (((Qtd->DataLen + Ep->MaxPacket - 1) / Ep->MaxPacket) % 2) {
Toggle = 1 - Toggle;
Toggle = (UINT8) (1 - Toggle);
}
Len += Qtd->DataLen;
@@ -588,7 +588,7 @@ EhcCreateUrb (
Ep = &Urb->Ep;
Ep->DevAddr = DevAddr;
Ep->EpAddr = EpAddr & 0x0F;
Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
Ep->Direction = ((EpAddr & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
Ep->DevSpeed = DevSpeed;
Ep->MaxPacket = MaxPacket;

14
MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
View File

@@ -83,7 +83,7 @@ enum {
QH_MICROFRAME_6 = 0x40,
QH_MICROFRAME_7 = 0x80,
USB_ERR_SHORT_PACKET = 0x200,
USB_ERR_SHORT_PACKET = 0x200
};
//
@@ -180,13 +180,13 @@ typedef struct _USB_ENDPOINT {
// Software QTD strcture, this is used to manage all the
// QTD generated from a URB. Don't add fields before QtdHw.
//
typedef struct _EHC_QTD {
struct _EHC_QTD {
QTD_HW QtdHw;
UINT32 Signature;
LIST_ENTRY QtdList; // The list of QTDs to one end point
UINT8 *Data; // Buffer of the original data
UINTN DataLen; // Original amount of data in this QTD
} EHC_QTD;
};
//
// Software QH structure. All three different transaction types
@@ -203,19 +203,19 @@ typedef struct _EHC_QTD {
// transfer is supported. A dummy QH is linked to EHCI AsyncListAddr
// as the reclamation header. New transfer is inserted after this QH.
//
typedef struct _EHC_QH {
struct _EHC_QH {
QH_HW QhHw;
UINT32 Signature;
EHC_QH *NextQh; // The queue head pointed to by horizontal link
LIST_ENTRY Qtds; // The list of QTDs to this queue head
UINTN Interval;
} EHC_QH;
};
//
// URB (Usb Request Block) contains information for all kinds of
// usb requests.
//
typedef struct _URB {
struct _URB {
UINT32 Signature;
LIST_ENTRY UrbList;
@@ -244,7 +244,7 @@ typedef struct _URB {
UINT32 Result;
UINTN Completed; // completed data length
UINT8 DataToggle;
} URB;
};

2
MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c
View File

@@ -520,7 +520,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
Block->Bits[Byte] ^= (UINT8) USB_HC_BIT (Bit);
Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}

6
MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h
View File

@@ -37,7 +37,7 @@ Revision History
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
typedef struct _USBHC_MEM_BLOCK {
struct _USBHC_MEM_BLOCK {
UINT8 *Bits; // Bit array to record which unit is allocated
UINTN BitsLen;
UINT8 *Buf;
@@ -45,7 +45,7 @@ typedef struct _USBHC_MEM_BLOCK {
UINTN BufLen; // Memory size in bytes
VOID *Mapping;
USBHC_MEM_BLOCK *Next;
} USBHC_MEM_BLOCK;
};
//
// USBHC_MEM_POOL is used to manage the memory used by USB
@@ -63,7 +63,7 @@ enum {
USBHC_MEM_UNIT = 64, // Memory allocation unit, must be 2^n, n>4
USBHC_MEM_UNIT_MASK = USBHC_MEM_UNIT - 1,
USBHC_MEM_DEFAULT_PAGES = 16,
USBHC_MEM_DEFAULT_PAGES = 16
};
#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))

14
MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
View File

@@ -1538,7 +1538,7 @@ Uhci2ControlTransfer (
BOOLEAN IsSlow;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
return UhciControlTransfer (
&Uhc->UsbHc,
@@ -1668,7 +1668,7 @@ Uhci2AsyncInterruptTransfer (
BOOLEAN IsSlow;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
return UhciAsyncInterruptTransfer (
&Uhc->UsbHc,
@@ -1736,7 +1736,7 @@ Uhci2SyncInterruptTransfer (
}
Uhc = UHC_FROM_USB2_HC_PROTO (This);
IsSlow = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
IsSlow = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
return UhciSyncInterruptTransfer (
&Uhc->UsbHc,
@@ -1897,7 +1897,7 @@ UhciDriverBindingSupported (
OpenStatus = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
&PciIo,
(VOID **) &PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -2148,7 +2148,7 @@ UhciDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
&PciIo,
(VOID **) &PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -2277,7 +2277,7 @@ UhciDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbHcProtocolGuid,
&UsbHc,
(VOID **) &UsbHc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -2294,7 +2294,7 @@ UhciDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
&Usb2Hc,
(VOID **) &Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL

6
MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
View File

@@ -75,7 +75,7 @@ enum {
//
UHCI_TPL = TPL_NOTIFY,
USB_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('u', 'h', 'c', 'i'),
USB_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')
};
#pragma pack(1)
@@ -100,7 +100,7 @@ typedef struct {
// or bulk transfer can reclaim the unused bandwidth. Some USB
// device requires this bandwidth reclamation capability.
//
typedef struct _USB_HC_DEV {
struct _USB_HC_DEV {
UINT32 Signature;
EFI_USB_HC_PROTOCOL UsbHc;
EFI_USB2_HC_PROTOCOL Usb2Hc;
@@ -132,7 +132,7 @@ typedef struct _USB_HC_DEV {
USBHC_MEM_POOL *MemPool;
EFI_UNICODE_STRING_TABLE *CtrlNameTable;
VOID *FrameMapping;
} USB_HC_DEV;
};
extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;

8
MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h
View File

@@ -88,19 +88,19 @@ typedef struct {
typedef struct _UHCI_TD_SW UHCI_TD_SW;
typedef struct _UHCI_QH_SW UHCI_QH_SW;
typedef struct _UHCI_QH_SW {
struct _UHCI_QH_SW {
UHCI_QH_HW QhHw;
UHCI_QH_SW *NextQh;
UHCI_TD_SW *TDs;
UINTN Interval;
} UHCI_QH_SW;
};
typedef struct _UHCI_TD_SW {
struct _UHCI_TD_SW {
UHCI_TD_HW TdHw;
UHCI_TD_SW *NextTd;
UINT8 *Data;
UINT16 DataLen;
} UHCI_TD_SW;
};
/**

4
MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c
View File

@@ -116,7 +116,7 @@ UhciSetRegBit (
UINT16 Data;
Data = UhciReadReg (PciIo, Offset);
Data |= Bit;
Data = (UINT16) (Data |Bit);
UhciWriteReg (PciIo, Offset, Data);
}
@@ -141,7 +141,7 @@ UhciClearRegBit (
UINT16 Data;
Data = UhciReadReg (PciIo, Offset);
Data &= ~Bit;
Data = (UINT16) (Data & ~Bit);
UhciWriteReg (PciIo, Offset, Data);
}

2
MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
View File

@@ -98,7 +98,7 @@ enum {
USBTD_BABBLE = BIT(4), // Babble condition
USBTD_NAK = BIT(3), // NAK is received
USBTD_CRC = BIT(2), // CRC/Time out error
USBTD_BITSTUFF = BIT(1), // Bit stuff error
USBTD_BITSTUFF = BIT(1) // Bit stuff error
};

2
MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
View File

@@ -498,7 +498,7 @@ UhciCheckTdStatus (
// next to the last known-good TD's data toggle if
// any TD is executed OK
//
QhResult->NextToggle = 1 - (UINT8)TdHw->DataToggle;
QhResult->NextToggle = (UINT8) (1 - (UINT8)TdHw->DataToggle);
//
// This TD is finished OK or met short packet read. Update the

6
MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h
View File

@@ -38,7 +38,7 @@ enum {
USB_ERR_FAIL_MASK = EFI_USB_ERR_STALL | EFI_USB_ERR_BUFFER |
EFI_USB_ERR_BABBLE | EFI_USB_ERR_CRC |
EFI_USB_ERR_TIMEOUT | EFI_USB_ERR_BITSTUFF |
EFI_USB_ERR_SYSTEM,
EFI_USB_ERR_SYSTEM
};
@@ -59,7 +59,7 @@ typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;
//
// Structure used to manager the asynchronous interrupt transfers.
//
typedef struct _UHCI_ASYNC_REQUEST{
struct _UHCI_ASYNC_REQUEST{
UINTN Signature;
LIST_ENTRY Link;
UHCI_ASYNC_REQUEST *Recycle;
@@ -86,7 +86,7 @@ typedef struct _UHCI_ASYNC_REQUEST{
//
EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
VOID *Context;
} UHCI_ASYNC_REQUEST;
};
#define UHCI_ASYNC_INT_FROM_LINK(a) \
CR (a, UHCI_ASYNC_REQUEST, Link, UHCI_ASYNC_INT_SIGNATURE)

2
MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c
View File

@@ -519,7 +519,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
Block->Bits[Byte] ^= (UINT8) USB_HC_BIT (Bit);
Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}

6
MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h
View File

@@ -36,7 +36,7 @@ Revision History
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
typedef struct _USBHC_MEM_BLOCK {
struct _USBHC_MEM_BLOCK {
UINT8 *Bits; // Bit array to record which unit is allocated
UINTN BitsLen;
UINT8 *Buf;
@@ -44,7 +44,7 @@ typedef struct _USBHC_MEM_BLOCK {
UINTN BufLen; // Memory size in bytes
VOID *Mapping;
USBHC_MEM_BLOCK *Next;
} USBHC_MEM_BLOCK;
};
//
// USBHC_MEM_POOL is used to manage the memory used by USB
@@ -62,7 +62,7 @@ enum {
USBHC_MEM_UNIT = 64, // Memory allocation unit, must be 2^n, n>4
USBHC_MEM_UNIT_MASK = USBHC_MEM_UNIT - 1,
USBHC_MEM_DEFAULT_PAGES = 16,
USBHC_MEM_DEFAULT_PAGES = 16
};
#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))