ArmPkg: Fix ARM ProcessorSubClassDxe build

The ARM ProcessorSubClassDxe build was broken due to changes in the
SmbiosProcessor API and an unused variable.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
This commit is contained in:
Rebecca Cran
2021-02-10 08:04:57 -07:00
committed by mergify[bot]
parent 124f1dd1ee
commit c615265b36

View File

@ -22,7 +22,7 @@
@return The cache size. @return The cache size.
**/ **/
UINT64 UINT64
ArmGetCacheSize ( SmbiosProcessorGetCacheSize (
IN UINT8 CacheLevel, IN UINT8 CacheLevel,
IN BOOLEAN DataCache, IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache IN BOOLEAN UnifiedCache
@ -66,14 +66,13 @@ ArmGetCacheSize (
@return The cache associativity. @return The cache associativity.
**/ **/
UINT32 UINT32
ArmGetCacheAssociativity ( SmbiosProcessorGetCacheAssociativity (
IN UINT8 CacheLevel, IN UINT8 CacheLevel,
IN BOOLEAN DataCache, IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache IN BOOLEAN UnifiedCache
) )
{ {
CCSIDR_DATA Ccsidr; CCSIDR_DATA Ccsidr;
CCSIDR2_DATA Ccsidr2;
CSSELR_DATA Csselr; CSSELR_DATA Csselr;
BOOLEAN CcidxSupported; BOOLEAN CcidxSupported;
UINT32 Associativity; UINT32 Associativity;
@ -88,7 +87,6 @@ ArmGetCacheAssociativity (
CcidxSupported = ArmHasCcidx (); CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) { if (CcidxSupported) {
Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
Associativity = Ccsidr.BitsCcidxAA32.Associativity + 1; Associativity = Ccsidr.BitsCcidxAA32.Associativity + 1;
} else { } else {
Associativity = Ccsidr.BitsNonCcidx.Associativity + 1; Associativity = Ccsidr.BitsNonCcidx.Associativity + 1;