UefiCpuPkg: Remove FIT based microcode shadow logic from MpInitLib.
Commitc7c964b
anddd01704
add header file for FIT table and update MpInitLib to support FIT based microcode shadow operation. There are comments that FIT is Intel specific specification instead of industry standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg. So this patch adds a platform PPI for the microcode shadow logic, and remove the FIT related code from EDK2. The FIT based microcode shadow support will be implemented as a new platform PEIM in IntelSiliconPkg in edk2-platforms. This patch doesn't provide a DXE version shadow microcode protocol, a platform which only uses DxeMpInitLib instance only supports PCD based microcode shadowing. A detailed design doc can be found here: https://edk2.groups.io/g/devel/files/Designs/2020/0214/Support%20 the%202nd%20Microcode%20FV%20Flash%20Region.pdf TEST: Tested on FIT enabled platform. BZ: https://tianocore.acgmultimedia.com/show_bug.cgi?id=2449 Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
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@@ -9,6 +9,7 @@
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#include "MpLib.h"
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#include <Library/PeiServicesLib.h>
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#include <Guid/S3SmmInitDone.h>
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#include <Ppi/ShadowMicrocode.h>
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/**
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S3 SMM Init Done notification function.
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@@ -639,4 +640,71 @@ MpInitLibEnableDisableAP (
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return EnableDisableApWorker (ProcessorNumber, EnableAP, HealthFlag);
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}
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/**
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This funtion will try to invoke platform specific microcode shadow logic to
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relocate microcode update patches into memory.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@retval EFI_SUCCESS Shadow microcode success.
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@retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.
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@retval EFI_UNSUPPORTED Can't find platform specific microcode shadow
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PPI/Protocol.
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**/
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EFI_STATUS
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PlatformShadowMicrocode (
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IN OUT CPU_MP_DATA *CpuMpData
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)
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{
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EFI_STATUS Status;
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EDKII_PEI_SHADOW_MICROCODE_PPI *ShadowMicrocodePpi;
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UINTN CpuCount;
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EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId;
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UINTN Index;
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UINTN BufferSize;
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VOID *Buffer;
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Status = PeiServicesLocatePpi (
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&gEdkiiPeiShadowMicrocodePpiGuid,
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0,
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NULL,
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(VOID **) &ShadowMicrocodePpi
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);
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if (EFI_ERROR (Status)) {
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return EFI_UNSUPPORTED;
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}
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CpuCount = CpuMpData->CpuCount;
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MicrocodeCpuId = (EDKII_PEI_MICROCODE_CPU_ID *) AllocateZeroPool (sizeof (EDKII_PEI_MICROCODE_CPU_ID) * CpuCount);
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if (MicrocodeCpuId == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
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MicrocodeCpuId[Index].ProcessorSignature = CpuMpData->CpuData[Index].ProcessorSignature;
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MicrocodeCpuId[Index].PlatformId = CpuMpData->CpuData[Index].PlatformId;
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}
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Status = ShadowMicrocodePpi->ShadowMicrocode (
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ShadowMicrocodePpi,
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CpuCount,
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MicrocodeCpuId,
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&BufferSize,
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&Buffer
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);
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FreePool (MicrocodeCpuId);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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CpuMpData->MicrocodePatchAddress = (UINTN) Buffer;
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CpuMpData->MicrocodePatchRegionSize = BufferSize;
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DEBUG ((
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DEBUG_INFO,
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"%a: Required microcode patches have been loaded at 0x%lx, with size 0x%lx.\n",
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__FUNCTION__, CpuMpData->MicrocodePatchAddress, CpuMpData->MicrocodePatchRegionSize
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));
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return EFI_SUCCESS;
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}
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