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Roll back the previous change in MdePkg BaseLib Ia32 Thunk16.S and EcpPkg GlueLib BaseLib Ia32 Thunk16.S, and still use the hard code offset in them to avoid GCC compiler create the unexpected instruction.

Browse Source 
Signed-off-by: lgao4
Reviewed-by: rsun3



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12898 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4 2011-12-28 09:48:15 +00:00
parent 855790a56f
commit c8641de387
2 changed files with 40 additions and 86 deletions
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63
EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/Thunk16.S
View File

@ -24,27 +24,6 @@
.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition) .globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
.globl ASM_PFX(InternalAsmThunk16) .globl ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
ASM_PFX(m16Start): ASM_PFX(m16Start):
SavedGdt: .space 6 SavedGdt: .space 6
@ -78,17 +57,15 @@ ASM_PFX(ThunkAttr): .space 4
2: 2:
xorw %ax, %ax # xor eax, eax xorw %ax, %ax # xor eax, eax
movl %ss, %eax # mov ax, ss movl %ss, %eax # mov ax, ss
.byte 0x67 .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
lea IA32_REGS_SIZE(%esp), %bp mov %ebp, 0xffffffd8(%esi)
.byte 0x66 mov 0xfffffff8(%esi), %ebx
mov %ebp, (_ESP - IA32_REGS_SIZE)(%esi)
mov (_EIP - IA32_REGS_SIZE)(%esi), %ebx
shlw $4, %ax # shl eax, 4 shlw $4, %ax # shl eax, 4
addw %ax, %bp # add ebp, eax addw %ax, %bp # add ebp, eax
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4 SavedCr4: .space 4
movl %eax, %cr4 movl %eax, %cr4
lgdtw %cs:(SavedGdt - L_Base1)(%edi) lgdtw %cs:0xfffffff2(%edi)
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4 SavedCr0: .space 4
movl %eax, %cr0 movl %eax, %cr0
@ -123,15 +100,15 @@ ASM_PFX(ToUserCode):
L_Base: L_Base:
popw %bp # ebp <- offset L_Base popw %bp # ebp <- offset L_Base
.byte 0x67; # address size override .byte 0x67; # address size override
push (IA32_REGS_SIZE + 2)(%esp) push 54(%esp)
lea (L_RealMode - L_Base)(%esi), %eax lea 0xc(%esi), %eax
push %eax push %eax
lret lret
L_RealMode: L_RealMode:
mov %edx, %cs:(SavedSs - L_Base)(%esi) mov %edx, %cs:0xffffffc5(%esi)
mov %bx, %cs:(SavedEsp - L_Base)(%esi) mov %bx, %cs:0xffffffcb(%esi)
lidtw %cs:(_16Idtr - L_Base)(%esi) lidtw %cs:0xffffffd7(%esi)
popaw # popad actually popaw # popad actually
pop %ds pop %ds
pop %es pop %es
@ -172,41 +149,41 @@ ASM_PFX(InternalAsmThunk16):
push %fs push %fs
push %gs push %gs
movl 36(%esp), %esi # esi <- RegSet movl 36(%esp), %esi # esi <- RegSet
movzwl _SS(%esi), %edx movzwl 0x32(%esi), %edx
mov _ESP(%esi), %edi mov 0xc(%esi), %edi
add $(-(IA32_REGS_SIZE + 4)), %edi add $0xffffffc8, %edi
movl %edi, %ebx # ebx <- stack offset movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax imul $0x10, %edx, %eax
push $(IA32_REGS_SIZE / 4) push $0xd
addl %eax, %edi # edi <- linear address of 16-bit stack addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx pop %ecx
rep rep
movsl # copy RegSet movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment movl %edx, %esi # esi <- 16-bit stack segment
lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx lea 0x61(%eax), %edx
movl %eax, %ecx movl %eax, %ecx
andl $0xf, %ecx andl $0xf, %ecx
shll $12, %eax shll $12, %eax
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx lea 0x6(%ecx), %ecx
movw %cx, %ax movw %cx, %ax
stosl # [edi] <- return address of user code stosl # [edi] <- return address of user code
sgdtl (SavedGdt - SavedCr0)(%edx) sgdtl 0xffffff9f(%edx)
sidtl 0x24(%esp) sidtl 0x24(%esp)
movl %cr0, %eax movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0 movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp movl %cr4, %ebp
mov %ebp, (SavedCr4 - SavedCr0)(%edx) mov %ebp, 0xfffffff1(%edx)
andl $0x300, %ebp # clear all but PCE and OSFXSR bits andl $0x300, %ebp # clear all but PCE and OSFXSR bits
pushl $0x10 pushl $0x10
pop %ecx # ecx <- selector for data segments pop %ecx # ecx <- selector for data segments
lgdtl (_16Gdtr - SavedCr0)(%edx) lgdtl 0x20(%edx)
pushfl pushfl
lcall *(_EntryPoint - SavedCr0)(%edx) lcall *0x14(%edx)
popfl popfl
lidtl 0x24(%esp) lidtl 0x24(%esp)
lea -IA32_REGS_SIZE(%ebp), %eax lea 0xffffffcc(%ebp), %eax
pop %gs pop %gs
pop %fs pop %fs
pop %es pop %es

63
MdePkg/Library/BaseLib/Ia32/Thunk16.S
View File

@ -24,27 +24,6 @@
ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition) ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
ASM_GLOBAL ASM_PFX(InternalAsmThunk16) ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
ASM_PFX(m16Start): ASM_PFX(m16Start):
SavedGdt: .space 6 SavedGdt: .space 6
@ -78,17 +57,15 @@ ASM_PFX(ThunkAttr): .space 4
2: 2:
xorw %ax, %ax # xor eax, eax xorw %ax, %ax # xor eax, eax
movl %ss, %eax # mov ax, ss movl %ss, %eax # mov ax, ss
.byte 0x67 .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
lea IA32_REGS_SIZE(%esp), %bp mov %ebp, 0xffffffd8(%esi)
.byte 0x66 mov 0xfffffff8(%esi), %ebx
mov %ebp, (_ESP - IA32_REGS_SIZE)(%esi)
mov (_EIP - IA32_REGS_SIZE)(%esi), %ebx
shlw $4, %ax # shl eax, 4 shlw $4, %ax # shl eax, 4
addw %ax, %bp # add ebp, eax addw %ax, %bp # add ebp, eax
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4 SavedCr4: .space 4
movl %eax, %cr4 movl %eax, %cr4
lgdtw %cs:(SavedGdt - L_Base1)(%edi) lgdtw %cs:0xfffffff2(%edi)
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4 SavedCr0: .space 4
movl %eax, %cr0 movl %eax, %cr0
@ -123,15 +100,15 @@ ASM_PFX(ToUserCode):
L_Base: L_Base:
popw %bp # ebp <- offset L_Base popw %bp # ebp <- offset L_Base
.byte 0x67; # address size override .byte 0x67; # address size override
push (IA32_REGS_SIZE + 2)(%esp) push 54(%esp)
lea (L_RealMode - L_Base)(%esi), %eax lea 0xc(%esi), %eax
push %eax push %eax
lret lret
L_RealMode: L_RealMode:
mov %edx, %cs:(SavedSs - L_Base)(%esi) mov %edx, %cs:0xffffffc5(%esi)
mov %bx, %cs:(SavedEsp - L_Base)(%esi) mov %bx, %cs:0xffffffcb(%esi)
lidtw %cs:(_16Idtr - L_Base)(%esi) lidtw %cs:0xffffffd7(%esi)
popaw # popad actually popaw # popad actually
pop %ds pop %ds
pop %es pop %es
@ -172,41 +149,41 @@ ASM_PFX(InternalAsmThunk16):
push %fs push %fs
push %gs push %gs
movl 36(%esp), %esi # esi <- RegSet movl 36(%esp), %esi # esi <- RegSet
movzwl _SS(%esi), %edx movzwl 0x32(%esi), %edx
mov _ESP(%esi), %edi mov 0xc(%esi), %edi
add $(-(IA32_REGS_SIZE + 4)), %edi add $0xffffffc8, %edi
movl %edi, %ebx # ebx <- stack offset movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax imul $0x10, %edx, %eax
push $(IA32_REGS_SIZE / 4) push $0xd
addl %eax, %edi # edi <- linear address of 16-bit stack addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx pop %ecx
rep rep
movsl # copy RegSet movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment movl %edx, %esi # esi <- 16-bit stack segment
lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx lea 0x61(%eax), %edx
movl %eax, %ecx movl %eax, %ecx
andl $0xf, %ecx andl $0xf, %ecx
shll $12, %eax shll $12, %eax
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx lea 0x6(%ecx), %ecx
movw %cx, %ax movw %cx, %ax
stosl # [edi] <- return address of user code stosl # [edi] <- return address of user code
sgdtl (SavedGdt - SavedCr0)(%edx) sgdtl 0xffffff9f(%edx)
sidtl 0x24(%esp) sidtl 0x24(%esp)
movl %cr0, %eax movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0 movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp movl %cr4, %ebp
mov %ebp, (SavedCr4 - SavedCr0)(%edx) mov %ebp, 0xfffffff1(%edx)
andl $0x300, %ebp # clear all but PCE and OSFXSR bits andl $0x300, %ebp # clear all but PCE and OSFXSR bits
pushl $0x10 pushl $0x10
pop %ecx # ecx <- selector for data segments pop %ecx # ecx <- selector for data segments
lgdtl (_16Gdtr - SavedCr0)(%edx) lgdtl 0x20(%edx)
pushfl pushfl
lcall *(_EntryPoint - SavedCr0)(%edx) lcall *0x14(%edx)
popfl popfl
lidtl 0x24(%esp) lidtl 0x24(%esp)
lea -IA32_REGS_SIZE(%ebp), %eax lea 0xffffffcc(%ebp), %eax
pop %gs pop %gs
pop %fs pop %fs
pop %es pop %es