ScsiBus/ScsiDisk enhancement for no_media state.
Ahci enumeration logic tuning for boot performance. Signed-off-by:erictian Reviewed-by:qianouyang, hhuan13 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11820 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -17,6 +17,8 @@
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#define EFI_AHCI_BAR_INDEX 0x05
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#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
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#define EFI_AHCI_CAP_SSS BIT27
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#define EFI_AHCI_CAP_S64A BIT31
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#define EFI_AHCI_GHC_OFFSET 0x0004
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#define EFI_AHCI_GHC_RESET BIT0
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#define EFI_AHCI_GHC_IE BIT1
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@@ -34,6 +36,19 @@ typedef union {
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UINT64 Uint64;
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} DATA_64;
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//
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// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
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//
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#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10
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//
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// Refer SATA1.0a spec, the FIS enable time should be less than 500ms.
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//
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#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)
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//
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// Refer SATA1.0a spec, the bus reset time should be less than 1s.
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//
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#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)
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#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000
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#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000
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#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000
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@@ -103,7 +118,7 @@ typedef union {
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#define EFI_AHCI_PORT_CMD_ST BIT0
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#define EFI_AHCI_PORT_CMD_SUD BIT1
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#define EFI_AHCI_PORT_CMD_POD BIT2
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#define EFI_AHCI_PORT_CMD_COL BIT3
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#define EFI_AHCI_PORT_CMD_CLO BIT3
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#define EFI_AHCI_PORT_CMD_CR BIT15
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#define EFI_AHCI_PORT_CMD_FRE BIT4
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#define EFI_AHCI_PORT_CMD_FR BIT14
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