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MdePkg/PCI: Add missing PCI/PCIE definitions

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The definitions are required by certain platform initialization
code.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Amy Chan <amy.chan@intel.com>
This commit is contained in:
Ruiyu Ni
2016-05-27 21:43:45 +08:00
parent dd85dd0731
commit cbedba8698
4 changed files with 503 additions and 21 deletions
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46
MdePkg/Include/IndustryStandard/Pci22.h
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@@ -645,18 +645,6 @@ typedef struct {
UINT8 NextItemPtr;
} EFI_PCI_CAPABILITY_HDR;
///
/// Power Management Register Block Definition
/// Section 3.2, PCI Power Management Interface Specifiction, Revision 1.2
///
typedef struct {
EFI_PCI_CAPABILITY_HDR Hdr;
UINT16 PMC;
UINT16 PMCSR;
UINT8 BridgeExtention;
UINT8 Data;
} EFI_PCI_CAPABILITY_PMI;
///
/// PMC - Power Management Capabilities
/// Section 3.2.3, PCI Power Management Interface Specifiction, Revision 1.2
@@ -684,7 +672,9 @@ typedef union {
typedef union {
struct {
UINT16 PowerState : 2;
UINT16 Reserved : 6;
UINT16 ReservedForPciExpress : 1;
UINT16 NoSoftReset : 1;
UINT16 Reserved : 4;
UINT16 PmeEnable : 1;
UINT16 DataSelect : 4;
UINT16 DataScale : 2;
@@ -693,6 +683,36 @@ typedef union {
UINT16 Data;
} EFI_PCI_PMCSR;
#define PCI_POWER_STATE_D0 0
#define PCI_POWER_STATE_D1 1
#define PCI_POWER_STATE_D2 2
#define PCI_POWER_STATE_D3_HOT 3
///
/// PMCSR_BSE - PMCSR PCI-to-PCI Bridge Support Extensions
/// Section 3.2.5, PCI Power Management Interface Specifiction, Revision 1.2
///
typedef union {
struct {
UINT8 Reserved : 6;
UINT8 B2B3 : 1;
UINT8 BusPowerClockControl : 1;
} Bits;
UINT8 Uint8;
} EFI_PCI_PMCSR_BSE;
///
/// Power Management Register Block Definition
/// Section 3.2, PCI Power Management Interface Specifiction, Revision 1.2
///
typedef struct {
EFI_PCI_CAPABILITY_HDR Hdr;
EFI_PCI_PMC PMC;
EFI_PCI_PMCSR PMCSR;
EFI_PCI_PMCSR_BSE BridgeExtention;
UINT8 Data;
} EFI_PCI_CAPABILITY_PMI;
///
/// A.G.P Capability
/// Section 6.1.4, Accelerated Graphics Port Interface Specification, Revision 1.0