OvmfPkg: reserve CPUID page
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 Platform features and capabilities are traditionally discovered via the CPUID instruction. Hypervisors typically trap and emulate the CPUID instruction for a variety of reasons. There are some cases where incorrect CPUID information can potentially lead to a security issue. The SEV-SNP firmware provides a feature to filter the CPUID results through the PSP. The filtered CPUID values are saved on a special page for the guest to consume. Reserve a page in MEMFD that will contain the results of filtered CPUID values. Cc: Michael Roth <michael.roth@amd.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
This commit is contained in:
committed by
mergify[bot]
parent
707c71a01b
commit
cca9cd3dd6
@@ -55,6 +55,8 @@
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize
|
||||
|
||||
[FixedPcd]
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase
|
||||
|
@@ -105,6 +105,8 @@
|
||||
%define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
|
||||
%define SEV_SNP_SECRETS_BASE (FixedPcdGet32 (PcdOvmfSnpSecretsBase))
|
||||
%define SEV_SNP_SECRETS_SIZE (FixedPcdGet32 (PcdOvmfSnpSecretsSize))
|
||||
%define CPUID_BASE (FixedPcdGet32 (PcdOvmfCpuidBase))
|
||||
%define CPUID_SIZE (FixedPcdGet32 (PcdOvmfCpuidSize))
|
||||
|
||||
%include "X64/IntelTdxMetadata.asm"
|
||||
%include "Ia32/Flat32ToFlat64.asm"
|
||||
|
@@ -17,6 +17,16 @@ BITS 64
|
||||
; AMD SEV-SNP specific sections
|
||||
%define OVMF_SECTION_TYPE_SNP_SECRETS 0x2
|
||||
|
||||
;
|
||||
; The section contains the hypervisor pre-populated CPUID values.
|
||||
; In the case of SEV-SNP, the CPUID values are filtered and measured by
|
||||
; the SEV-SNP firmware.
|
||||
; The CPUID format is documented in SEV-SNP firmware spec 0.9 section 7.1
|
||||
; (CPUID function structure).
|
||||
;
|
||||
%define OVMF_SECTION_TYPE_CPUID 0x3
|
||||
|
||||
|
||||
ALIGN 16
|
||||
|
||||
TIMES (15 - ((OvmfSevGuidedStructureEnd - OvmfSevGuidedStructureStart + 15) % 16)) DB 0
|
||||
@@ -39,5 +49,11 @@ SevSnpSecrets:
|
||||
DD SEV_SNP_SECRETS_SIZE
|
||||
DD OVMF_SECTION_TYPE_SNP_SECRETS
|
||||
|
||||
; CPUID values
|
||||
CpuidSec:
|
||||
DD CPUID_BASE
|
||||
DD CPUID_SIZE
|
||||
DD OVMF_SECTION_TYPE_CPUID
|
||||
|
||||
OvmfSevGuidedStructureEnd:
|
||||
ALIGN 16
|
||||
|
Reference in New Issue
Block a user