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UefiCpuPkg: Update PiSmmCpuDxeSmm pass XCODE5 tool chain

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https://bugzilla.tianocore.org/show_bug.cgi?id=849

In V2, use "mov rax, strict qword 0" to replace the hard code db.

1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.
3. On MpFuncs.nasm, use ExchangeInfo to record InitializeFloatingPointUnits.
This way is same to MpInitLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit e21e355e2c)

# Conflicts:
#	UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
This commit is contained in:
Liming Gao
2018-01-11 17:05:15 +08:00
parent bcda835b36
commit ccf8184ac3
9 changed files with 79 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
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@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -60,7 +60,7 @@ ASM_PFX(gSmmCr4): DD 0
ASM_PFX(gSmmCr0): DD 0
mov cr0, rax ; enable protected mode & paging
DB 0x66, 0xea ; far jmp to long mode
ASM_PFX(gSmmJmpAddr): DQ @LongMode
ASM_PFX(gSmmJmpAddr): DQ 0;@LongMode
@LongMode: ; long-mode starts here
DB 0x48, 0xbc ; mov rsp, imm64
ASM_PFX(gSmmInitStack): DQ 0
@@ -99,7 +99,7 @@ ASM_PFX(gcSmmInitTemplate):
sub ebp, 0x30000
jmp ebp
@L1:
DQ ASM_PFX(SmmStartup)
DQ 0; ASM_PFX(SmmStartup)
ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
@@ -128,3 +128,14 @@ ASM_PFX(mRebasedFlagAddr32): dd 0
;
db 0xff, 0x25
ASM_PFX(mSmmRelocationOriginalAddressPtr32): dd 0
global ASM_PFX(PiSmmCpuSmmInitFixupAddress)
ASM_PFX(PiSmmCpuSmmInitFixupAddress):
lea rax, [@LongMode]
lea rcx, [ASM_PFX(gSmmJmpAddr)]
mov qword [rcx], rax
lea rax, [ASM_PFX(SmmStartup)]
lea rcx, [@L1]
mov qword [rcx], rax
ret