ArmPkg/ArmCortexA5xLib: Fixed setting of SMP bit

On CortexA5x the SMP bit is BIT6 of CPUECTLR_EL1 register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15398 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-03-26 19:33:51 +00:00 committed by oliviermartin
parent 47d183db53
commit cf02da5203

View File

@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2011-2013, ARM Limited. All rights reserved. Copyright (c) 2011-2014, ARM Limited. All rights reserved.
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -37,7 +37,7 @@ ArmCpuSetup (
if (ArmIsMpCore ()) { if (ArmIsMpCore ()) {
// Turn on SMP coherency // Turn on SMP coherency
ArmSetAuxCrBit (A5X_FEATURE_SMP); ArmSetCpuExCrBit (A5X_FEATURE_SMP);
} }
} }