ArmPkg/ArmCortexA5xLib: Fixed setting of SMP bit
On CortexA5x the SMP bit is BIT6 of CPUECTLR_EL1 register. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15398 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,6 +1,6 @@
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/** @file
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/** @file
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Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -37,7 +37,7 @@ ArmCpuSetup (
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if (ArmIsMpCore ()) {
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if (ArmIsMpCore ()) {
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// Turn on SMP coherency
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// Turn on SMP coherency
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ArmSetAuxCrBit (A5X_FEATURE_SMP);
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ArmSetCpuExCrBit (A5X_FEATURE_SMP);
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}
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}
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}
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}
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