Add IntelFsp2Pkg and IntelFsp2WrapperPkg.
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
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202
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
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202
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;;
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SECTION .text
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;
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; Following are fixed PCDs
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;
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extern ASM_PFX(PcdGet32(PcdTemporaryRamBase))
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extern ASM_PFX(PcdGet32(PcdTemporaryRamSize))
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extern ASM_PFX(PcdGet32(PcdFspTemporaryRamSize))
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struc FSPM_UPD_COMMON
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; FSP_UPD_HEADER {
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.FspUpdHeader: resd 8
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; }
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; FSPM_ARCH_UPD {
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.Revision: resb 1
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.Reserved: resb 3
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.NvsBufferPtr: resd 1
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.StackBase: resd 1
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.StackSize: resd 1
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.BootLoaderTolumSize: resd 1
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.BootMode: resd 1
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.Reserved1: resb 8
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; }
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.size:
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endstruc
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;
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; Following functions will be provided in C
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;
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extern ASM_PFX(SecStartup)
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extern ASM_PFX(FspApiCommon)
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;
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; Following functions will be provided in PlatformSecLib
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;
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extern ASM_PFX(AsmGetFspBaseAddress)
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extern ASM_PFX(AsmGetFspInfoHeader)
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API_PARAM1_OFFSET EQU 34h ; ApiParam1 [ sub esp,8 + pushad + pushfd + push eax + call]
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FSP_HEADER_IMGBASE_OFFSET EQU 1Ch
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FSP_HEADER_CFGREG_OFFSET EQU 24h
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;----------------------------------------------------------------------------
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; FspMemoryInit API
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;
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; This FSP API is called after TempRamInit and initializes the memory.
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspMemoryInitApi)
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ASM_PFX(FspMemoryInitApi):
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mov eax, 3 ; FSP_API_INDEX.FspMemoryInitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; TempRamExitApi API
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;
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; This API tears down temporary RAM
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(TempRamExitApi)
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ASM_PFX(TempRamExitApi):
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mov eax, 4 ; FSP_API_INDEX.TempRamExitApiIndex
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jmp ASM_PFX(FspApiCommon)
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;----------------------------------------------------------------------------
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; FspApiCommonContinue API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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global ASM_PFX(FspApiCommonContinue)
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ASM_PFX(FspApiCommonContinue):
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;
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; EAX holds the API index
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;
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;
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; FspMemoryInit API setup the initial stack frame
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;
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;
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; Place holder to store the FspInfoHeader pointer
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;
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push eax
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;
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; Update the FspInfoHeader pointer
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;
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push eax
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call ASM_PFX(AsmGetFspInfoHeader)
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mov [esp + 4], eax
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pop eax
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;
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; Create a Task Frame in the stack for the Boot Loader
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;
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pushfd ; 2 pushf for 4 byte alignment
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cli
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pushad
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; Reserve 8 bytes for IDT save/restore
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sub esp, 8
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sidt [esp]
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; Get Stackbase and StackSize from FSPM_UPD Param
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mov edx, [esp + API_PARAM1_OFFSET]
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cmp edx, 0
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jnz FspStackSetup
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; Get UPD default values if FspmUpdDataPtr (ApiParam1) is null
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push eax
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call ASM_PFX(AsmGetFspInfoHeader)
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mov edx, [eax + FSP_HEADER_IMGBASE_OFFSET]
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add edx, [eax + FSP_HEADER_CFGREG_OFFSET]
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pop eax
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FspStackSetup:
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mov edi, [edx + FSPM_UPD_COMMON.StackBase]
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mov ecx, [edx + FSPM_UPD_COMMON.StackSize]
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add edi, ecx
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;
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; Setup new FSP stack
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;
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xchg edi, esp ; Exchange edi and esp, edi will be assigned to the current esp pointer and esp will be Stack base + Stack size
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mov ebx, esp ; Put Stack base + Stack size in ebx
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;
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; Pass the API Idx to SecStartup
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;
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push eax
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;
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; Pass the BootLoader stack to SecStartup
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;
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push edi
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;
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; Pass entry point of the PEI core
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;
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call ASM_PFX(AsmGetFspBaseAddress)
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mov edi, eax
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call ASM_PFX(AsmGetPeiCoreOffset)
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add edi, eax
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push edi
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;
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; Pass BFV into the PEI Core
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; It uses relative address to calucate the actual boot FV base
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; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
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; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
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; they are different. The code below can handle both cases.
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;
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call ASM_PFX(AsmGetFspBaseAddress)
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push eax
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;
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; Pass stack base and size into the PEI Core
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;
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sub ebx, ecx ; Stack base + Stack size - Stack size
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push ebx
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push ecx
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;
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; Pass Control into the PEI Core
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;
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call ASM_PFX(SecStartup)
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add esp, 4
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exit:
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ret
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global ASM_PFX(FspPeiCoreEntryOff)
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ASM_PFX(FspPeiCoreEntryOff):
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;
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; This value will be pached by the build script
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;
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DD 0x12345678
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global ASM_PFX(AsmGetPeiCoreOffset)
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ASM_PFX(AsmGetPeiCoreOffset):
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mov eax, dword [ASM_PFX(FspPeiCoreEntryOff)]
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ret
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;----------------------------------------------------------------------------
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; Module Entrypoint API
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;----------------------------------------------------------------------------
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global ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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jmp $
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