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Add IntelFsp2Pkg and IntelFsp2WrapperPkg.

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Add FSP2.0 support.
This series of patch is to support FSP2.0 specification at
https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf

Some major updates include:
1) One FSP binary is separated to multiple components:
FSP-T, FSP-M, FSP-S, and optional FSP-O.
Each component has its own configuration data region.
2) All FSP-APIs use same UPD format - FSP_UPD_HEADER.
3) Add EnumInitPhaseEndOfFirmware notifyphase.
4) FSP1.1/FSP1.0 compatibility is NOT maintained.
5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg,
to indicate that it is for FspWrapper only.

IntelFspPkg and IntelFspWrapperPkg will be deprecated.
The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg
and IntelFsp2WrapperPkg.
The old platform can still use IntelFspPkg and IntelFspWrapperPkg
for compatibility consideration.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
This commit is contained in:
Jiewen Yao
2016-05-13 13:00:53 +08:00
parent c9802c4564
commit cf1d454983
118 changed files with 15633 additions and 0 deletions
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218
IntelFsp2WrapperPkg/Contributions.txt Normal file
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======================
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IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c Normal file
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/** @file
This driver will register two callbacks to call fsp's notifies.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Protocol/PciEnumerationComplete.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiLib.h>
#include <Library/FspWrapperApiLib.h>
#include <Library/PerformanceLib.h>
#include <Library/HobLib.h>
typedef
EFI_STATUS
(EFIAPI * ADD_PERFORMANCE_RECORDS)(
IN CONST VOID *HobStart
);
struct _ADD_PERFORMANCE_RECORD_PROTOCOL {
ADD_PERFORMANCE_RECORDS AddPerformanceRecords;
};
typedef struct _ADD_PERFORMANCE_RECORD_PROTOCOL ADD_PERFORMANCE_RECORD_PROTOCOL;
extern EFI_GUID gAddPerfRecordProtocolGuid;
extern EFI_GUID gFspHobGuid;
extern EFI_GUID gFspApiPerformanceGuid;
EFI_EVENT mExitBootServicesEvent = NULL;
/**
Relocate this image under 4G memory.
@param ImageHandle Handle of driver image.
@param SystemTable Pointer to system table.
@retval EFI_SUCCESS Image successfully relocated.
@retval EFI_ABORTED Failed to relocate image.
**/
EFI_STATUS
RelocateImageUnder4GIfNeeded (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
/**
PciEnumerationComplete Protocol notification event handler.
@param[in] Event Event whose notification function is being invoked.
@param[in] Context Pointer to the notification function's context.
**/
VOID
EFIAPI
OnPciEnumerationComplete (
IN EFI_EVENT Event,
IN VOID *Context
)
{
NOTIFY_PHASE_PARAMS NotifyPhaseParams;
EFI_STATUS Status;
VOID *Interface;
//
// Try to locate it because gEfiPciEnumerationCompleteProtocolGuid will trigger it once when registration.
// Just return if it is not found.
//
Status = gBS->LocateProtocol (
&gEfiPciEnumerationCompleteProtocolGuid,
NULL,
&Interface
);
if (EFI_ERROR (Status)) {
return ;
}
NotifyPhaseParams.Phase = EnumInitPhaseAfterPciEnumeration;
PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x6000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x607F);
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", Status));
} else {
DEBUG((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration Success.\n"));
}
}
/**
Notification function of EVT_GROUP_READY_TO_BOOT event group.
This is a notification function registered on EVT_GROUP_READY_TO_BOOT event group.
When the Boot Manager is about to load and execute a boot option, it reclaims variable
storage if free size is below the threshold.
@param[in] Event Event whose notification function is being invoked.
@param[in] Context Pointer to the notification function's context.
**/
VOID
EFIAPI
OnReadyToBoot (
IN EFI_EVENT Event,
IN VOID *Context
)
{
NOTIFY_PHASE_PARAMS NotifyPhaseParams;
EFI_STATUS Status;
ADD_PERFORMANCE_RECORD_PROTOCOL *AddPerfRecordInterface;
EFI_PEI_HOB_POINTERS Hob;
VOID **FspHobListPtr;
gBS->CloseEvent (Event);
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;
PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x4000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x407F);
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase ReadyToBoot failed, status: 0x%x\n", Status));
} else {
DEBUG((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot Success.\n"));
}
Status = gBS->LocateProtocol (
&gAddPerfRecordProtocolGuid,
NULL,
(VOID**) &AddPerfRecordInterface
);
if (EFI_ERROR (Status)) {
DEBUG((DEBUG_INFO, "gAddPerfRecordProtocolGuid - Locate protocol failed\n"));
return;
} else {
Hob.Raw = GetHobList ();
if (Hob.Raw != NULL) {
Hob.Raw = GetNextGuidHob (&gFspHobGuid, Hob.Raw);
FspHobListPtr = GET_GUID_HOB_DATA(Hob.Raw);
AddPerfRecordInterface->AddPerformanceRecords((VOID *)(UINTN)(((UINT32)(UINTN)*FspHobListPtr) & 0xFFFFFFFF));
}
}
}
/**
This stage is notified just before the firmware/Preboot environment transfers
management of all system resources to the OS or next level execution environment.
@param Event Event whose notification function is being invoked.
@param Context Pointer to the notification function's context, which is
always zero in current implementation.
**/
VOID
EFIAPI
OnEndOfFirmware (
IN EFI_EVENT Event,
IN VOID *Context
)
{
NOTIFY_PHASE_PARAMS NotifyPhaseParams;
EFI_STATUS Status;
gBS->CloseEvent (Event);
NotifyPhaseParams.Phase = EnumInitPhaseEndOfFirmware;
PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x2000);
Status = CallFspNotifyPhase (&NotifyPhaseParams);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x207F);
if (Status != EFI_SUCCESS) {
DEBUG((DEBUG_ERROR, "FSP NotifyPhase EndOfFirmware failed, status: 0x%x\n", Status));
} else {
DEBUG((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware Success.\n"));
}
}
/**
Main entry for the FSP DXE module.
This routine registers two callbacks to call fsp's notifies.
@param[in] ImageHandle The firmware allocated handle for the EFI image.
@param[in] SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The entry point is executed successfully.
@retval other Some error occurs when executing this entry point.
**/
EFI_STATUS
EFIAPI
FspWrapperNotifyDxeEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT ReadyToBootEvent;
VOID *Registration;
EFI_EVENT ProtocolNotifyEvent;
//
// Load this driver's image to memory
//
Status = RelocateImageUnder4GIfNeeded (ImageHandle, SystemTable);
if (EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
&gEfiPciEnumerationCompleteProtocolGuid,
TPL_CALLBACK,
OnPciEnumerationComplete,
NULL,
&Registration
);
ASSERT (ProtocolNotifyEvent != NULL);
Status = EfiCreateEventReadyToBootEx (
TPL_CALLBACK,
OnReadyToBoot,
NULL,
&ReadyToBootEvent
);
ASSERT_EFI_ERROR (Status);
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_NOTIFY,
OnEndOfFirmware,
NULL,
&gEfiEventExitBootServicesGuid,
&mExitBootServicesEvent
);
ASSERT_EFI_ERROR (Status);
return EFI_SUCCESS;
}

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IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf Normal file
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## @file
# FSP DXE Module
#
# This driver will register two callbacks to call fsp's notifies.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FspWrapperNotifyDxe
FILE_GUID = AD61999A-507E-47E6-BA28-79CC609FA1A4
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = FspWrapperNotifyDxeEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
[Sources]
FspWrapperNotifyDxe.c
LoadBelow4G.c
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
UefiBootServicesTableLib
DebugLib
BaseMemoryLib
UefiLib
FspWrapperApiLib
PeCoffLib
CacheMaintenanceLib
DxeServicesLib
PerformanceLib
HobLib
[Protocols]
gEfiPciEnumerationCompleteProtocolGuid ## CONSUMES
gAddPerfRecordProtocolGuid ## CONSUMES
[Guids]
gFspApiPerformanceGuid ## CONSUMES ## GUID
gEfiEventExitBootServicesGuid ## CONSUMES ## Event
gFspHobGuid ## CONSUMES ## HOB
[Pcd]
gFspWrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
[Depex]
TRUE

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/** @file
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
of the BSD License which accompanies this distribution. The
full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Uefi.h>
#include <Library/BaseLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/PeCoffLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DxeServicesLib.h>
#include <Library/CacheMaintenanceLib.h>
#include <Library/UefiLib.h>
/**
Relocate this image under 4G memory.
@param ImageHandle Handle of driver image.
@param SystemTable Pointer to system table.
@retval EFI_SUCCESS Image successfully relocated.
@retval EFI_ABORTED Failed to relocate image.
**/
EFI_STATUS
RelocateImageUnder4GIfNeeded (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINT8 *Buffer;
UINTN BufferSize;
EFI_HANDLE NewImageHandle;
UINTN Pages;
EFI_PHYSICAL_ADDRESS FfsBuffer;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
VOID *Interface;
//
// If it is already <4G, no need do relocate
//
if ((UINTN)RelocateImageUnder4GIfNeeded < 0xFFFFFFFF) {
return EFI_SUCCESS;
}
//
// If locate gEfiCallerIdGuid success, it means 2nd entry.
//
Status = gBS->LocateProtocol (&gEfiCallerIdGuid, NULL, &Interface);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "FspNotifyDxe - 2nd entry\n"));
return EFI_SUCCESS;
}
DEBUG ((DEBUG_INFO, "FspNotifyDxe - 1st entry\n"));
//
// Here we install a dummy handle
//
NewImageHandle = NULL;
Status = gBS->InstallProtocolInterface (
&NewImageHandle,
&gEfiCallerIdGuid,
EFI_NATIVE_INTERFACE,
NULL
);
ASSERT_EFI_ERROR (Status);
//
// Reload image itself to <4G mem
//
Status = GetSectionFromAnyFv (
&gEfiCallerIdGuid,
EFI_SECTION_PE32,
0,
(VOID **) &Buffer,
&BufferSize
);
ASSERT_EFI_ERROR (Status);
ImageContext.Handle = Buffer;
ImageContext.ImageRead = PeCoffLoaderImageReadFromMemory;
//
// Get information about the image being loaded
//
Status = PeCoffLoaderGetImageInfo (&ImageContext);
ASSERT_EFI_ERROR (Status);
if (ImageContext.SectionAlignment > EFI_PAGE_SIZE) {
Pages = EFI_SIZE_TO_PAGES ((UINTN) (ImageContext.ImageSize + ImageContext.SectionAlignment));
} else {
Pages = EFI_SIZE_TO_PAGES ((UINTN) ImageContext.ImageSize);
}
FfsBuffer = 0xFFFFFFFF;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiBootServicesCode,
Pages,
&FfsBuffer
);
ASSERT_EFI_ERROR (Status);
ImageContext.ImageAddress = (PHYSICAL_ADDRESS)(UINTN)FfsBuffer;
//
// Align buffer on section boundry
//
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;
ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));
//
// Load the image to our new buffer
//
Status = PeCoffLoaderLoadImage (&ImageContext);
ASSERT_EFI_ERROR (Status);
//
// Relocate the image in our new buffer
//
Status = PeCoffLoaderRelocateImage (&ImageContext);
ASSERT_EFI_ERROR (Status);
//
// Free the buffer allocated by ReadSection since the image has been relocated in the new buffer
//
gBS->FreePool (Buffer);
//
// Flush the instruction cache so the image data is written before we execute it
//
InvalidateInstructionCacheRange ((VOID *)(UINTN)ImageContext.ImageAddress, (UINTN)ImageContext.ImageSize);
DEBUG ((DEBUG_INFO, "Loading driver at 0x%08x EntryPoint=0x%08x\n", (UINTN)ImageContext.ImageAddress, (UINTN)ImageContext.EntryPoint));
Status = ((EFI_IMAGE_ENTRY_POINT)(UINTN)(ImageContext.EntryPoint)) (NewImageHandle, gST);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Error: Image at 0x%08x start failed: %r\n", ImageContext.ImageAddress, Status));
gBS->FreePages (FfsBuffer, Pages);
}
//
// return error to unload >4G copy, if we already relocate itself to <4G.
//
return EFI_ALREADY_STARTED;
}

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/** @file
This will be invoked only once. It will call FspMemoryInit API,
register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/PeiServicesTablePointerLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/TimerLib.h>
#include <Library/PerformanceLib.h>
#include <Library/FspWrapperPlatformLib.h>
#include <Library/FspWrapperHobProcessLib.h>
#include <Library/FspWrapperApiLib.h>
#include <Ppi/FspSiliconInitDone.h>
#include <Ppi/EndOfPeiPhase.h>
#include <Ppi/MemoryDiscovered.h>
#include <Ppi/SecPlatformInformation.h>
#include <Library/PlatformSecLib.h>
#include <Library/FspWrapperApiTestLib.h>
#include <FspEas.h>
extern EFI_GUID gFspHobGuid;
/**
Call FspMemoryInit API.
@return Status returned by FspMemoryInit API.
**/
EFI_STATUS
PeiFspMemoryInit (
VOID
)
{
FSP_INFO_HEADER *FspmHeaderPtr;
EFI_STATUS Status;
UINT64 TimeStampCounterStart;
VOID *FspHobListPtr;
VOID *HobData;
FSPM_UPD_COMMON *FspmUpdDataPtr;
UINTN *SourceData;
DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n"));
FspHobListPtr = NULL;
//
// Copy default FSP-M UPD data from Flash
//
FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
FspmUpdDataPtr = (FSPM_UPD_COMMON *)AllocateZeroPool ((UINTN)FspmHeaderPtr->CfgRegionSize);
ASSERT (FspmUpdDataPtr != NULL);
SourceData = (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + (UINTN)FspmHeaderPtr->CfgRegionOffset);
CopyMem (FspmUpdDataPtr, SourceData, (UINTN)FspmHeaderPtr->CfgRegionSize);
DEBUG ((DEBUG_INFO, "FspWrapperPlatformInitPreMem enter\n"));
UpdateFspmUpdData ((VOID *)FspmUpdDataPtr);
DEBUG ((DEBUG_INFO, " NvsBufferPtr - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.NvsBufferPtr));
DEBUG ((DEBUG_INFO, " StackBase - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.StackBase));
DEBUG ((DEBUG_INFO, " StackSize - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.StackSize));
DEBUG ((DEBUG_INFO, " BootLoaderTolumSize - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.BootLoaderTolumSize));
DEBUG ((DEBUG_INFO, " BootMode - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.BootMode));
DEBUG ((DEBUG_INFO, " HobListPtr - 0x%x\n", &FspHobListPtr));
TimeStampCounterStart = AsmReadTsc ();
Status = CallFspMemoryInit (FspmUpdDataPtr, &FspHobListPtr);
// Create hobs after memory initialization and not in temp RAM. Hence passing the recorded timestamp here
PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, 0xD000);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0xD07F);
DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status = %r\n", Status));
}
DEBUG((DEBUG_INFO, "FspMemoryInit status: 0x%x\n", Status));
ASSERT_EFI_ERROR (Status);
Status = TestFspMemoryInitApiOutput (FspmUpdDataPtr, &FspHobListPtr);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - TestFspMemoryInitApiOutput () fail, Status = %r\n", Status));
}
DEBUG ((DEBUG_INFO, " FspHobListPtr (returned) - 0x%x\n", FspHobListPtr));
ASSERT (FspHobListPtr != NULL);
PostFspmHobProcess (FspHobListPtr);
//
// FspHobList is not complete at this moment.
// Save FspHobList pointer to hob, so that it can be got later
//
HobData = BuildGuidHob (
&gFspHobGuid,
sizeof (VOID *)
);
ASSERT (HobData != NULL);
CopyMem (HobData, &FspHobListPtr, sizeof (FspHobListPtr));
return Status;
}
/**
Do FSP initialization.
@return FSP initialization status.
**/
EFI_STATUS
EFIAPI
FspmWrapperInit (
VOID
)
{
EFI_STATUS Status;
Status = PeiFspMemoryInit ();
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
This is the entrypoint of PEIM
@param[in] FileHandle Handle of the file being invoked.
@param[in] PeiServices Describes the list of possible PEI Services.
@retval EFI_SUCCESS if it completed successfully.
**/
EFI_STATUS
EFIAPI
FspmWrapperPeimEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
DEBUG((DEBUG_INFO, "FspmWrapperPeimEntryPoint\n"));
FspmWrapperInit ();
return EFI_SUCCESS;
}

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## @file
# FSP-M wrapper PEI Module
#
# This PEIM initialize FSP.
# This will be invoked only once. It will call FspMemoryInit API,
# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010017
BASE_NAME = FspmWrapperPeim
FILE_GUID = 9FAAD0FF-0E0C-4885-A738-BAB4E4FA1E66
VERSION_STRING = 1.0
MODULE_TYPE = PEIM
ENTRY_POINT = FspmWrapperPeimEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32
#
[LibraryClasses]
PeimEntryPoint
PeiServicesLib
PeiServicesTablePointerLib
BaseLib
BaseMemoryLib
MemoryAllocationLib
DebugLib
HobLib
FspWrapperPlatformLib
FspWrapperHobProcessLib
DebugAgentLib
UefiCpuLib
PeCoffGetEntryPointLib
PeCoffExtraActionLib
PerformanceLib
TimerLib
FspWrapperApiLib
FspWrapperApiTestLib
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[Pcd]
gFspWrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
[Sources]
FspmWrapperPeim.c
[Ppis]
gTopOfTemporaryRamPpiGuid ## PRODUCES
gEfiEndOfPeiSignalPpiGuid ## PRODUCES
gEfiPeiMemoryDiscoveredPpiGuid ## PRODUCES
[Guids]
gFspHobGuid ## PRODUCES ## HOB
gFspApiPerformanceGuid ## CONSUMES ## GUID
[Depex]
gEfiPeiMasterBootModePpiGuid

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/** @file
This will be invoked only once. It will call FspMemoryInit API,
register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/PeiServicesTablePointerLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/FspWrapperPlatformLib.h>
#include <Library/FspWrapperHobProcessLib.h>
#include <Library/TimerLib.h>
#include <Library/PerformanceLib.h>
#include <Library/FspWrapperApiLib.h>
#include <Ppi/FspSiliconInitDone.h>
#include <Ppi/EndOfPeiPhase.h>
#include <Ppi/MemoryDiscovered.h>
#include <Ppi/TemporaryRamDone.h>
#include <Ppi/SecPlatformInformation.h>
#include <Library/PlatformSecLib.h>
#include <Library/FspWrapperApiTestLib.h>
#include <FspEas.h>
extern EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc;
extern EFI_GUID gFspHobGuid;
/**
This function handles S3 resume task at the end of PEI
@param[in] PeiServices Pointer to PEI Services Table.
@param[in] NotifyDesc Pointer to the descriptor for the Notification event that
caused this function to execute.
@param[in] Ppi Pointer to the PPI data associated with this function.
@retval EFI_STATUS Always return EFI_SUCCESS
**/
EFI_STATUS
EFIAPI
S3EndOfPeiNotify(
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
IN VOID *Ppi
);
EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc = {
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiEndOfPeiSignalPpiGuid,
S3EndOfPeiNotify
};
/**
This function handles S3 resume task at the end of PEI
@param[in] PeiServices Pointer to PEI Services Table.
@param[in] NotifyDesc Pointer to the descriptor for the Notification event that
caused this function to execute.
@param[in] Ppi Pointer to the PPI data associated with this function.
@retval EFI_STATUS Always return EFI_SUCCESS
**/
EFI_STATUS
EFIAPI
S3EndOfPeiNotify(
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
IN VOID *Ppi
)
{
NOTIFY_PHASE_PARAMS NotifyPhaseParams;
EFI_STATUS Status;
DEBUG((DEBUG_INFO, "S3EndOfPeiNotify enter\n"));
NotifyPhaseParams.Phase = EnumInitPhaseAfterPciEnumeration;
Status = CallFspNotifyPhase (&NotifyPhaseParams);
DEBUG((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration status: 0x%x\n", Status));
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;
Status = CallFspNotifyPhase (&NotifyPhaseParams);
DEBUG((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot status: 0x%x\n", Status));
NotifyPhaseParams.Phase = EnumInitPhaseEndOfFirmware;
Status = CallFspNotifyPhase (&NotifyPhaseParams);
DEBUG((DEBUG_INFO, "FSP S3NotifyPhase EndOfFirmware status: 0x%x\n", Status));
return EFI_SUCCESS;
}
/**
Return Hob list produced by FSP.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of this PPI.
@param[out] FspHobList The pointer to Hob list produced by FSP.
@return EFI_SUCCESS FReturn Hob list produced by FSP successfully.
**/
EFI_STATUS
EFIAPI
FspSiliconInitDoneGetFspHobList (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN FSP_SILICON_INIT_DONE_PPI *This,
OUT VOID **FspHobList
);
FSP_SILICON_INIT_DONE_PPI mFspSiliconInitDonePpi = {
FspSiliconInitDoneGetFspHobList
};
EFI_PEI_PPI_DESCRIPTOR mPeiFspSiliconInitDonePpi = {
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gFspSiliconInitDonePpiGuid,
&mFspSiliconInitDonePpi
};
/**
Return Hob list produced by FSP.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of this PPI.
@param[out] FspHobList The pointer to Hob list produced by FSP.
@return EFI_SUCCESS FReturn Hob list produced by FSP successfully.
**/
EFI_STATUS
EFIAPI
FspSiliconInitDoneGetFspHobList (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN FSP_SILICON_INIT_DONE_PPI *This,
OUT VOID **FspHobList
)
{
EFI_HOB_GUID_TYPE *GuidHob;
GuidHob = GetFirstGuidHob (&gFspHobGuid);
if (GuidHob != NULL) {
*FspHobList = *(VOID **)GET_GUID_HOB_DATA(GuidHob);
return EFI_SUCCESS;
} else {
return EFI_NOT_FOUND;
}
}
/**
This function is called after PEI core discover memory and finish migration.
@param[in] PeiServices Pointer to PEI Services Table.
@param[in] NotifyDesc Pointer to the descriptor for the Notification event that
caused this function to execute.
@param[in] Ppi Pointer to the PPI data associated with this function.
@retval EFI_STATUS Always return EFI_SUCCESS
**/
EFI_STATUS
EFIAPI
PeiMemoryDiscoveredNotify (
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
IN VOID *Ppi
);
EFI_PEI_NOTIFY_DESCRIPTOR mPeiMemoryDiscoveredNotifyDesc = {
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiMemoryDiscoveredPpiGuid,
PeiMemoryDiscoveredNotify
};
/**
This function is called after PEI core discover memory and finish migration.
@param[in] PeiServices Pointer to PEI Services Table.
@param[in] NotifyDesc Pointer to the descriptor for the Notification event that
caused this function to execute.
@param[in] Ppi Pointer to the PPI data associated with this function.
@retval EFI_STATUS Always return EFI_SUCCESS
**/
EFI_STATUS
EFIAPI
PeiMemoryDiscoveredNotify (
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
IN VOID *Ppi
)
{
FSP_INFO_HEADER *FspsHeaderPtr;
UINT64 TimeStampCounterStart;
EFI_STATUS Status;
VOID *FspHobListPtr;
EFI_HOB_GUID_TYPE *GuidHob;
FSPS_UPD_COMMON *FspsUpdDataPtr;
UINTN *SourceData;
DEBUG ((DEBUG_INFO, "PeiMemoryDiscoveredNotify enter\n"));
//
// Copy default FSP-S UPD data from Flash
//
FspsHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));
FspsUpdDataPtr = (FSPS_UPD_COMMON *)AllocateZeroPool ((UINTN)FspsHeaderPtr->CfgRegionSize);
ASSERT (FspsUpdDataPtr != NULL);
SourceData = (UINTN *)((UINTN)FspsHeaderPtr->ImageBase + (UINTN)FspsHeaderPtr->CfgRegionOffset);
CopyMem (FspsUpdDataPtr, SourceData, (UINTN)FspsHeaderPtr->CfgRegionSize);
UpdateFspsUpdData ((VOID *)FspsUpdDataPtr);
TimeStampCounterStart = AsmReadTsc ();
PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x9000);
Status = CallFspSiliconInit ((VOID *)FspsUpdDataPtr);
PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x907F);
DEBUG ((DEBUG_INFO, "Total time spent executing FspSiliconInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspSiliconInitApi(), Status = %r\n", Status));
}
DEBUG((DEBUG_INFO, "FspSiliconInit status: 0x%x\n", Status));
ASSERT_EFI_ERROR (Status);
Status = TestFspSiliconInitApiOutput ((VOID *)NULL);
if (RETURN_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - TestFspSiliconInitApiOutput () fail, Status = %r\n", Status));
}
//
// Now FspHobList complete, process it
//
GuidHob = GetFirstGuidHob (&gFspHobGuid);
ASSERT (GuidHob != NULL);
FspHobListPtr = *(VOID **)GET_GUID_HOB_DATA (GuidHob);
DEBUG ((DEBUG_INFO, "FspHobListPtr - 0x%x\n", FspHobListPtr));
PostFspsHobProcess (FspHobListPtr);
//
// Install FspSiliconInitDonePpi so that any other driver can consume this info.
//
Status = PeiServicesInstallPpi (&mPeiFspSiliconInitDonePpi);
ASSERT_EFI_ERROR(Status);
return Status;
}
/**
Do FSP initialization.
@return FSP initialization status.
**/
EFI_STATUS
FspsWrapperInit (
VOID
)
{
EFI_STATUS Status;
EFI_BOOT_MODE BootMode;
//
// Register MemoryDiscovered Nofity to run FspSiliconInit
//
Status = PeiServicesNotifyPpi (&mPeiMemoryDiscoveredNotifyDesc);
ASSERT_EFI_ERROR (Status);
//
// Register EndOfPei Notify for S3 to run FSP NotifyPhase
//
PeiServicesGetBootMode (&BootMode);
if (BootMode == BOOT_ON_S3_RESUME) {
Status = PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc);
ASSERT_EFI_ERROR (Status);
}
return EFI_SUCCESS;
}
/**
This is the entrypoint of PEIM
@param[in] FileHandle Handle of the file being invoked.
@param[in] PeiServices Describes the list of possible PEI Services.
@retval EFI_SUCCESS if it completed successfully.
**/
EFI_STATUS
EFIAPI
FspsWrapperPeimEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
FspsWrapperInit ();
return EFI_SUCCESS;
}

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## @file
# FSP-S wrapper PEI Module
#
# This PEIM initialize FSP.
# This will be invoked only once. It will call FspMemoryInit API,
# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010017
BASE_NAME = FspsWrapperPeim
FILE_GUID = 0D244DF9-6CE3-4133-A1CF-53200AB663AC
VERSION_STRING = 1.0
MODULE_TYPE = PEIM
ENTRY_POINT = FspsWrapperPeimEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32
#
[LibraryClasses]
PeimEntryPoint
PeiServicesLib
PeiServicesTablePointerLib
BaseLib
BaseMemoryLib
TimerLib
DebugLib
HobLib
MemoryAllocationLib
FspWrapperPlatformLib
FspWrapperHobProcessLib
DebugAgentLib
UefiCpuLib
PeCoffGetEntryPointLib
PeCoffExtraActionLib
PerformanceLib
FspWrapperApiLib
FspWrapperApiTestLib
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[Ppis]
gTopOfTemporaryRamPpiGuid ## PRODUCES
gFspSiliconInitDonePpiGuid ## PRODUCES
gEfiEndOfPeiSignalPpiGuid ## PRODUCES
gEfiTemporaryRamDonePpiGuid ## PRODUCES
gEfiPeiMemoryDiscoveredPpiGuid ## PRODUCES
[Pcd]
gFspWrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
[Guids]
gFspHobGuid ## CONSUMES ## HOB
gFspApiPerformanceGuid ## CONSUMES ## GUID
[Sources]
FspsWrapperPeim.c
[Depex]
gEfiPeiMemoryDiscoveredPpiGuid

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/** @file
Provide FSP wrapper API related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __FSP_WRAPPER_API_LIB_H__
#define __FSP_WRAPPER_API_LIB_H__
#include <FspEas.h>
/**
Find FSP header pointer.
@param[in] FlashFvFspBase Flash address of FSP FV.
@return FSP header pointer.
**/
FSP_INFO_HEADER *
EFIAPI
FspFindFspHeader (
IN EFI_PHYSICAL_ADDRESS FlashFvFspBase
);
/**
Call FSP API - FspNotifyPhase.
@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.
@return EFI status returned by FspNotifyPhase API.
**/
EFI_STATUS
EFIAPI
CallFspNotifyPhase (
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams
);
/**
Call FSP API - FspMemoryInit.
@param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.
@param[out] HobListPtr Pointer to receive the address of the HOB list.
@return EFI status returned by FspMemoryInit API.
**/
EFI_STATUS
EFIAPI
CallFspMemoryInit (
IN VOID *FspmUpdDataPtr,
OUT VOID **HobListPtr
);
/**
Call FSP API - TempRamExit.
@param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.
@return EFI status returned by TempRamExit API.
**/
EFI_STATUS
EFIAPI
CallTempRamExit (
IN VOID *TempRamExitParam
);
/**
Call FSP API - FspSiliconInit.
@param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.
@return EFI status returned by FspSiliconInit API.
**/
EFI_STATUS
EFIAPI
CallFspSiliconInit (
IN VOID *FspsUpdDataPtr
);
#endif

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/** @file
Provide FSP wrapper API test related function.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __FSP_WRAPPER_API_TEST_LIB_H__
#define __FSP_WRAPPER_API_TEST_LIB_H__
#include <PiPei.h>
/**
Test the output of FSP API - FspMemoryInit.
@param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.
@param[in] HobListPtr Address of the HobList pointer.
@return test result on output of FspMemoryInit API.
**/
EFI_STATUS
EFIAPI
TestFspMemoryInitApiOutput (
IN VOID *FspmUpdDataPtr,
IN VOID **HobListPtr
);
/**
Test the output of FSP API - TempRamExit.
@param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.
@return test result on output of TempRamExit API.
**/
EFI_STATUS
EFIAPI
TestFspTempRamExitApiOutput (
IN VOID *TempRamExitParam
);
/**
Test the output of FSP API - FspSiliconInit.
@param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.
@return test result on output of FspSiliconInit API.
**/
EFI_STATUS
EFIAPI
TestFspSiliconInitApiOutput (
IN VOID *FspsUpdDataPtr
);
#endif

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/** @file
Provide FSP wrapper hob process related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __FSP_WRAPPER_HOB_PROCESS_LIB_H__
#define __FSP_WRAPPER_HOB_PROCESS_LIB_H__
/**
Post FSP-M HOB process for Memory Resource Descriptor.
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
@return If platform process the FSP hob list successfully.
**/
EFI_STATUS
EFIAPI
PostFspmHobProcess (
IN VOID *FspHobList
);
/**
Post FSP-S HOB process (not Memory Resource Descriptor).
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
@return If platform process the FSP hob list successfully.
**/
EFI_STATUS
EFIAPI
PostFspsHobProcess (
IN VOID *FspHobList
);
#endif

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/** @file
Provide FSP wrapper platform related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __FSP_WRAPPER_PLATFORM_LIB_H__
#define __FSP_WRAPPER_PLATFORM_LIB_H__
/**
This function overrides the default configurations in the FSP-M UPD data region.
@param[in,out] FspUpdRgnPtr A pointer to the UPD data region data strcture.
**/
VOID
EFIAPI
UpdateFspmUpdData (
IN OUT VOID *FspUpdRgnPtr
);
/**
This function overrides the default configurations in the FSP-S UPD data region.
@param[in,out] FspUpdRgnPtr A pointer to the UPD data region data strcture.
**/
VOID
EFIAPI
UpdateFspsUpdData (
IN OUT VOID *FspUpdRgnPtr
);
/**
Update TempRamExit parameter.
@note At this point, memory is ready, PeiServices are available to use.
@return TempRamExit parameter.
**/
VOID *
EFIAPI
UpdateTempRamExitParam (
VOID
);
/**
Get S3 PEI memory information.
@note At this point, memory is ready, and PeiServices are available to use.
Platform can get some data from SMRAM directly.
@param[out] S3PeiMemSize PEI memory size to be installed in S3 phase.
@param[out] S3PeiMemBase PEI memory base to be installed in S3 phase.
@return If S3 PEI memory information is got successfully.
**/
EFI_STATUS
EFIAPI
GetS3MemoryInfo (
OUT UINT64 *S3PeiMemSize,
OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase
);
#endif

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/** @file
Provides the services to return FSP hob list.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FSP_SILICON_INIT_DONE_H_
#define _FSP_SILICON_INIT_DONE_H_
typedef struct _FSP_SILICON_INIT_DONE_PPI FSP_SILICON_INIT_DONE_PPI;
/**
Return Hob list produced by FSP.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of this PPI.
@param[out] FspHobList The pointer to Hob list produced by FSP.
@return EFI_SUCCESS FReturn Hob list produced by FSP successfully.
**/
typedef
EFI_STATUS
(EFIAPI *FSP_SILICON_INIT_DONE_GET_FSP_HOB_LIST)(
IN CONST EFI_PEI_SERVICES **PeiServices,
IN FSP_SILICON_INIT_DONE_PPI *This,
OUT VOID **FspHobList
);
struct _FSP_SILICON_INIT_DONE_PPI {
FSP_SILICON_INIT_DONE_GET_FSP_HOB_LIST GetFspHobList;
};
extern EFI_GUID gFspSiliconInitDonePpiGuid;
#endif

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/** @file
Provides the pointer to top of temporary ram.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _TOP_OF_TEMPORARY_RAM_H_
#define _TOP_OF_TEMPORARY_RAM_H_
extern EFI_GUID gTopOfTemporaryRamPpiGuid;
#endif

77
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec Normal file
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## @file
# Provides drivers and definitions to support fsp in EDKII bios.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = IntelFsp2WrapperPkg
PACKAGE_GUID = FAFE06D4-7245-42D7-9FD2-E5D5E36AB0A0
PACKAGE_VERSION = 0.1
[Includes]
Include
[LibraryClasses]
## @libraryclass Provide FSP API related function.
FspWrapperApiLib|Include/Library/FspWrapperApiLib.h
FspWrapperApiTestLib|Include/Library/FspWrapperApiTestLib.h
## @libraryclass Provide FSP hob process related function.
FspWrapperHobProcessLib|Include/Library/FspWrapperHobProcessLib.h
## @libraryclass Provide FSP platform related function.
FspWrapperPlatformLib|Include/Library/FspWrapperPlatformLib.h
[Guids]
#
# GUID defined in package
#
gFspWrapperTokenSpaceGuid = { 0xa34cf082, 0xf50, 0x4f0d, { 0x89, 0x8a, 0x3d, 0x39, 0x30, 0x2b, 0xc5, 0x1e } }
gFspApiPerformanceGuid = { 0xc9122295, 0x56ed, 0x4d4e, { 0x06, 0xa6, 0x50, 0x8d, 0x89, 0x4d, 0x3e, 0x40 } }
gFspHobGuid = { 0x6d86fb36, 0xba90, 0x472c, { 0xb5, 0x83, 0x3f, 0xbe, 0xd3, 0xfb, 0x20, 0x9a } }
[Ppis]
gFspSiliconInitDonePpiGuid = { 0x4eb6e09c, 0xd256, 0x4e1e, { 0xb5, 0x0a, 0x87, 0x4b, 0xd2, 0x84, 0xb3, 0xde } }
gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
[Protocols]
gAddPerfRecordProtocolGuid = { 0xc4a58d6d, 0x3677, 0x49cb, { 0xa0, 0x0a, 0x94, 0x70, 0x76, 0x5f, 0xb5, 0x5e } }
################################################################################
#
# PCD Declarations section - list of all PCDs Declared by this Package
# Only this package should be providing the
# declaration, other packages should not.
#
################################################################################
[PcdsFixedAtBuild, PcdsPatchableInModule]
## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
## Provides the size of the BIOS Flash Device.
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
## Indicates the base address of the first Microcode Patch in the Microcode Region
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006
## Indicates the offset of the Cpu Microcode.
gFspWrapperTokenSpaceGuid.PcdFlashMicrocodeOffset|0x90|UINT32|0x10000007
## Indicate the PEI memory size platform want to report
gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
## Indicate the PEI memory size platform want to report
gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
## This is the base address of FSP-T/M/S
gFspWrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
gFspWrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
gFspWrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00000302

87
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc Normal file
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## @file
# Provides drivers and definitions to support fsp in EDKII bios.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
PLATFORM_NAME = IntelFsp2WrapperPkg
PLATFORM_GUID = 34813E26-C930-427D-8993-80530549EADA
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/IntelFsp2WrapperPkg
SUPPORTED_ARCHITECTURES = IA32|X64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
[LibraryClasses]
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
# MdeModulePkg
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
# UefiCpuPkg
UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
LocalApicLib|UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
# FSP Wrapper Lib
FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLibNull/BaseFspWrapperApiTestLibNull.inf
# FSP platform sample
FspWrapperPlatformLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf
PlatformSecLib|IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf
FspWrapperHobProcessLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/PeiFspWrapperHobProcessLibSample.inf
[LibraryClasses.common.PEIM,LibraryClasses.common.PEI_CORE]
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
[LibraryClasses.common.DXE_DRIVER]
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
[Components.Ia32]
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
[Components.IA32, Components.X64]
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x1f
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80080046
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07

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## @file
# Provide FSP API related function.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseFspWrapperApiLib
FILE_GUID = F42C789F-4D66-49AF-8C73-1AADC00437AC
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = FspWrapperApiLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperApiLib.c
[Sources.IA32]
IA32/DispatchExecute.c
[Sources.X64]
X64/DispatchExecute.c
X64/Thunk64To32.asm
X64/Thunk64To32.S
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
BaseLib
[Guids]
gFspHeaderFileGuid ## CONSUMES ## GUID
[Pcd]
gFspWrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES

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/** @file
Provide FSP API related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/FspWrapperApiLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
/**
Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
long mode.
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
@param[in] Param2 The second parameter to pass to 32bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
);
/**
Find FSP header pointer.
@param[in] FlashFvFspBase Flash address of FSP FV.
@return FSP header pointer.
**/
FSP_INFO_HEADER *
EFIAPI
FspFindFspHeader (
IN EFI_PHYSICAL_ADDRESS FlashFvFspBase
)
{
UINT8 *CheckPointer;
CheckPointer = (UINT8 *) (UINTN) FlashFvFspBase;
if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {
return NULL;
}
if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;
CheckPointer = (UINT8 *) ALIGN_POINTER (CheckPointer, 8);
} else {
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;
}
CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);
if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {
return NULL;
}
CheckPointer = CheckPointer + sizeof (EFI_RAW_SECTION);
return (FSP_INFO_HEADER *)CheckPointer;
}
/**
Call FSP API - FspNotifyPhase.
@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.
@return EFI status returned by FspNotifyPhase API.
**/
EFI_STATUS
EFIAPI
CallFspNotifyPhase (
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams
)
{
FSP_INFO_HEADER *FspHeader;
FSP_NOTIFY_PHASE NotifyPhaseApi;
EFI_STATUS Status;
BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
}
NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
}
/**
Call FSP API - FspMemoryInit.
@param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.
@param[out] HobListPtr Address of the HobList pointer.
@return EFI status returned by FspMemoryInit API.
**/
EFI_STATUS
EFIAPI
CallFspMemoryInit (
IN VOID *FspmUpdDataPtr,
OUT VOID **HobListPtr
)
{
FSP_INFO_HEADER *FspHeader;
FSP_MEMORY_INIT FspMemoryInitApi;
EFI_STATUS Status;
BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
}
FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
SetInterruptState (InterruptState);
return Status;
}
/**
Call FSP API - TempRamExit.
@param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.
@return EFI status returned by TempRamExit API.
**/
EFI_STATUS
EFIAPI
CallTempRamExit (
IN VOID *TempRamExitParam
)
{
FSP_INFO_HEADER *FspHeader;
FSP_TEMP_RAM_EXIT TempRamExitApi;
EFI_STATUS Status;
BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
}
TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
}
/**
Call FSP API - FspSiliconInit.
@param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.
@return EFI status returned by FspSiliconInit API.
**/
EFI_STATUS
EFIAPI
CallFspSiliconInit (
IN VOID *FspsUpdDataPtr
)
{
FSP_INFO_HEADER *FspHeader;
FSP_SILICON_INIT FspSiliconInitApi;
EFI_STATUS Status;
BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
}
FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
}

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/** @file
Execute 32-bit code in Protected Mode.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Uefi.h>
#include <FspEas.h>
/**
FSP API functions.
@param[in] Param1 The first parameter to pass to 32bit code.
@param[in] Param2 The second parameter to pass to 32bit code.
@return EFI_STATUS.
**/
typedef
EFI_STATUS
(EFIAPI *FSP_FUNCTION) (
IN VOID *Param1,
IN VOID *Param2
);
/**
Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
long mode.
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
@param[in] Param2 The second parameter to pass to 32bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
)
{
FSP_FUNCTION EntryFunc;
EFI_STATUS Status;
EntryFunc = (FSP_FUNCTION) (UINTN) (Function);
Status = EntryFunc ((VOID *)(UINTN)Param1, (VOID *)(UINTN)Param2);
return Status;
}

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/** @file
Execute 32-bit code in Long Mode.
Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit
back to long mode.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Uefi.h>
#include <Library/BaseLib.h>
#include <FspEas.h>
#pragma pack(1)
typedef union {
struct {
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
} Bits;
UINT64 Uint64;
} IA32_GDT;
#pragma pack()
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x0: reserve */
{{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x8: compatibility mode */
{{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}}, /* 0x10: for long mode */
{{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x18: data */
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x20: reserve */
};
//
// IA32 Gdt register
//
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
sizeof (mGdtEntries) - 1,
(UINTN) mGdtEntries
};
/**
Assembly function to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
long mode.
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code
@param[in] Param2 The second parameter to pass to 32bit code
@param[in] InternalGdtr The GDT and GDT descriptor used by this library
@return status.
**/
UINT32
AsmExecute32BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2,
IN IA32_DESCRIPTOR *InternalGdtr
);
/**
Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
long mode.
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
@param[in] Param2 The second parameter to pass to 32bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
)
{
EFI_STATUS Status;
IA32_DESCRIPTOR Idtr;
//
// Idtr might be changed inside of FSP. 32bit FSP only knows the <4G address.
// If IDTR.Base is >4G, FSP can not handle. So we need save/restore IDTR here for X64 only.
// Interrupt is already disabled here, so it is safety to update IDTR.
//
AsmReadIdtr (&Idtr);
Status = AsmExecute32BitCode (Function, Param1, Param2, &mGdt);
AsmWriteIdtr (&Idtr);
return Status;
}

230
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.S Normal file
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#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
# Module Name:
#
# Thunk64To32.asm
#
# Abstract:
#
# This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
# transit back to long mode.
#
#-------------------------------------------------------------------------------
#----------------------------------------------------------------------------
# Procedure: AsmExecute32BitCode
#
# Input: None
#
# Output: None
#
# Prototype: UINT32
# AsmExecute32BitCode (
# IN UINT64 Function,
# IN UINT64 Param1,
# IN UINT64 Param2,
# IN IA32_DESCRIPTOR *InternalGdtr
# );
#
#
# Description: A thunk function to execute 32-bit code in long mode.
#
#----------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmExecute32BitCode)
ASM_PFX(AsmExecute32BitCode):
#
# save IFLAG and disable it
#
pushfq
cli
#
# save orignal GDTR and CS
#
movl %ds, %eax
push %rax
movl %cs, %eax
push %rax
subq $0x10, %rsp
sgdt (%rsp)
#
# load internal GDT
#
lgdt (%r9)
#
# Save general purpose register and rflag register
#
pushfq
push %rdi
push %rsi
push %rbp
push %rbx
#
# save CR3
#
movq %cr3, %rax
movq %rax, %rbp
#
# Prepare the CS and return address for the transition from 32-bit to 64-bit mode
#
movq $0x10, %rax # load long mode selector
shl $32, %rax
lea ReloadCS(%rip), %r9 #Assume the ReloadCS is under 4G
orq %r9, %rax
push %rax
#
# Save parameters for 32-bit function call
#
movq %r8, %rax
shl $32, %rax
orq %rdx, %rax
push %rax
#
# save the 32-bit function entry and the return address into stack which will be
# retrieve in compatibility mode.
#
lea ReturnBack(%rip), %rax #Assume the ReloadCS is under 4G
shl $32, %rax
orq %rcx, %rax
push %rax
#
# let rax save DS
#
movq $0x18, %rax
#
# Change to Compatible Segment
#
movq $8, %rcx # load compatible mode selector
shl $32, %rcx
lea Compatible(%rip), %rdx # assume address < 4G
orq %rdx, %rcx
push %rcx
.byte 0xcb # retf
Compatible:
# reload DS/ES/SS to make sure they are correct referred to current GDT
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
#
# Disable paging
#
movq %cr0, %rcx
btc $31, %ecx
movq %rcx, %cr0
#
# Clear EFER.LME
#
movl $0xC0000080, %ecx
rdmsr
btc $8, %eax
wrmsr
# Now we are in protected mode
#
# Call 32-bit function. Assume the function entry address and parameter value is less than 4G
#
pop %rax # Here is the function entry
#
# Now the parameter is at the bottom of the stack, then call in to IA32 function.
#
jmp *%rax
ReturnBack:
movl %eax, %ebx # save return status
pop %rcx # drop param1
pop %rcx # drop param2
#
# restore CR4
#
movq %cr4, %rax
bts $5, %eax
movq %rax, %cr4
#
# restore CR3
#
movl %ebp, %eax
movq %rax, %cr3
#
# Set EFER.LME to re-enable ia32-e
#
movl $0xC0000080, %ecx
rdmsr
bts $8, %eax
wrmsr
#
# Enable paging
#
movq %cr0, %rax
bts $31, %eax
mov %rax, %cr0
# Now we are in compatible mode
#
# Reload cs register
#
.byte 0xcb # retf
ReloadCS:
#
# Now we're in Long Mode
#
#
# Restore C register and eax hold the return status from 32-bit function.
# Note: Do not touch rax from now which hold the return value from IA32 function
#
movl %ebx, %eax # put return status to EAX
pop %rbx
pop %rbp
pop %rsi
pop %rdi
popfq
#
# Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
#
lgdt (%rsp)
#
# drop GDT descriptor in stack
#
addq $0x10, %rsp
#
# switch to orignal CS and GDTR
#
pop %r9 # get CS
shl $32, %r9 # rcx[32..47] <- Cs
lea ReturnToLongMode(%rip), %rcx
orq %r9, %rcx
push %rcx
.byte 0xcb # retf
ReturnToLongMode:
#
# Reload original DS/ES/SS
#
pop %rcx
movl %ecx, %ds
movl %ecx, %es
movl %ecx, %ss
#
# Restore IFLAG
#
popfq
ret

230
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.asm Normal file
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;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;
; Module Name:
;
; Thunk64To32.asm
;
; Abstract:
;
; This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
; transit back to long mode.
;
;-------------------------------------------------------------------------------
.code
;----------------------------------------------------------------------------
; Procedure: AsmExecute32BitCode
;
; Input: None
;
; Output: None
;
; Prototype: UINT32
; AsmExecute32BitCode (
; IN UINT64 Function,
; IN UINT64 Param1,
; IN UINT64 Param2,
; IN IA32_DESCRIPTOR *InternalGdtr
; );
;
;
; Description: A thunk function to execute 32-bit code in long mode.
;
;----------------------------------------------------------------------------
AsmExecute32BitCode PROC
;
; save IFLAG and disable it
;
pushfq
cli
;
; save orignal GDTR and CS
;
mov rax, ds
push rax
mov rax, cs
push rax
sub rsp, 10h
sgdt fword ptr [rsp]
;
; load internal GDT
;
lgdt fword ptr [r9]
;
; Save general purpose register and rflag register
;
pushfq
push rdi
push rsi
push rbp
push rbx
;
; save CR3
;
mov rax, cr3
mov rbp, rax
;
; Prepare the CS and return address for the transition from 32-bit to 64-bit mode
;
mov rax, 10h ; load long mode selector
shl rax, 32
mov r9, OFFSET ReloadCS ;Assume the ReloadCS is under 4G
or rax, r9
push rax
;
; Save parameters for 32-bit function call
;
mov rax, r8
shl rax, 32
or rax, rdx
push rax
;
; save the 32-bit function entry and the return address into stack which will be
; retrieve in compatibility mode.
;
mov rax, OFFSET ReturnBack ;Assume the ReloadCS is under 4G
shl rax, 32
or rax, rcx
push rax
;
; let rax save DS
;
mov rax, 018h
;
; Change to Compatible Segment
;
mov rcx, 08h ; load compatible mode selector
shl rcx, 32
mov rdx, OFFSET Compatible ; assume address < 4G
or rcx, rdx
push rcx
retf
Compatible:
; reload DS/ES/SS to make sure they are correct referred to current GDT
mov ds, ax
mov es, ax
mov ss, ax
;
; Disable paging
;
mov rcx, cr0
btc ecx, 31
mov cr0, rcx
;
; Clear EFER.LME
;
mov ecx, 0C0000080h
rdmsr
btc eax, 8
wrmsr
; Now we are in protected mode
;
; Call 32-bit function. Assume the function entry address and parameter value is less than 4G
;
pop rax ; Here is the function entry
;
; Now the parameter is at the bottom of the stack, then call in to IA32 function.
;
jmp rax
ReturnBack:
mov ebx, eax ; save return status
pop rcx ; drop param1
pop rcx ; drop param2
;
; restore CR4
;
mov rax, cr4
bts eax, 5
mov cr4, rax
;
; restore CR3
;
mov eax, ebp
mov cr3, rax
;
; Set EFER.LME to re-enable ia32-e
;
mov ecx, 0C0000080h
rdmsr
bts eax, 8
wrmsr
;
; Enable paging
;
mov rax, cr0
bts eax, 31
mov cr0, rax
; Now we are in compatible mode
;
; Reload cs register
;
retf
ReloadCS:
;
; Now we're in Long Mode
;
;
; Restore C register and eax hold the return status from 32-bit function.
; Note: Do not touch rax from now which hold the return value from IA32 function
;
mov eax, ebx ; put return status to EAX
pop rbx
pop rbp
pop rsi
pop rdi
popfq
;
; Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
;
lgdt fword ptr[rsp]
;
; drop GDT descriptor in stack
;
add rsp, 10h
;
; switch to orignal CS and GDTR
;
pop r9 ; get CS
shl r9, 32 ; rcx[32..47] <- Cs
mov rcx, OFFSET @F
or rcx, r9
push rcx
retf
@@:
;
; Reload original DS/ES/SS
;
pop rcx
mov ds, rcx
mov es, rcx
mov ss, rcx
;
; Restore IFLAG
;
popfq
ret
AsmExecute32BitCode ENDP
END

53
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLibNull/BaseFspWrapperApiTestLibNull.inf Normal file
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### @file
# Provide FSP wrapper API test related function.
#
# Copyright (C) 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010017
BASE_NAME = BaseFspWrapperApiTestLibNull
FILE_GUID = E7E96F88-017B-417C-8DC8-B84C2B877020
VERSION_STRING = 1.0
MODULE_TYPE = PEIM
LIBRARY_CLASS = FspWrapperApiTestLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperApiTestNull.c
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
DebugLib
[Guids]

65
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLibNull/FspWrapperApiTestNull.c Normal file
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/** @file
Provide FSP wrapper API test related function.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
/**
Test the output of FSP API - FspMemoryInit.
@param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.
@param[in] HobListPtr Address of the HobList pointer.
@return test result on output of FspMemoryInit API.
**/
EFI_STATUS
EFIAPI
TestFspMemoryInitApiOutput (
IN VOID *FspmUpdDataPtr,
IN VOID **HobListPtr
)
{
return RETURN_UNSUPPORTED;
}
/**
Test the output of FSP API - TempRamExit.
@param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.
@return test result on output of TempRamExit API.
**/
EFI_STATUS
EFIAPI
TestFspTempRamExitApiOutput (
IN VOID *TempRamExitParam
)
{
return RETURN_UNSUPPORTED;
}
/**
Test the output of FSP API - FspSiliconInit.
@param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.
@return test result on output of FspSiliconInit API.
**/
EFI_STATUS
EFIAPI
TestFspSiliconInitApiOutput (
IN VOID *FspsUpdDataPtr
)
{
return RETURN_UNSUPPORTED;
}

60
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf Normal file
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## @file
# Sample to provide FSP wrapper platform related function.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseFspWrapperPlatformLibSample
FILE_GUID = 12F38E73-B34D-4559-99E5-AE2DCD002156
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = FspWrapperPlatformLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperPlatformLibSample.c
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES

83
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c Normal file
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/** @file
Sample to provide FSP wrapper related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/PcdLib.h>
/**
This function overrides the default configurations in the FSP-M UPD data region.
@note At this point, memory is NOT ready, PeiServices are available to use.
@param[in,out] FspUpdRgnPtr A pointer to the UPD data region data strcture.
**/
VOID
EFIAPI
UpdateFspmUpdData (
IN OUT VOID *FspUpdRgnPtr
)
{
}
/**
This function overrides the default configurations in the FSP-S UPD data region.
@param[in,out] FspUpdRgnPtr A pointer to the UPD data region data strcture.
**/
VOID
EFIAPI
UpdateFspsUpdData (
IN OUT VOID *FspUpdRgnPtr
)
{
}
/**
Update TempRamExit parameter.
@note At this point, memory is ready, PeiServices are available to use.
@return TempRamExit parameter.
**/
VOID *
EFIAPI
UpdateTempRamExitParam (
VOID
)
{
return NULL;
}
/**
Get S3 PEI memory information.
@note At this point, memory is ready, and PeiServices are available to use.
Platform can get some data from SMRAM directly.
@param[out] S3PeiMemSize PEI memory size to be installed in S3 phase.
@param[out] S3PeiMemBase PEI memory base to be installed in S3 phase.
@return If S3 PEI memory information is got successfully.
**/
EFI_STATUS
EFIAPI
GetS3MemoryInfo (
OUT UINT64 *S3PeiMemSize,
OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase
)
{
return EFI_UNSUPPORTED;
}

88
IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/FspWrapperApiTest.c Normal file
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/** @file
Provide FSP wrapper API test related function.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Guid/GuidHobFspEas.h>
/**
Test the output of FSP API - FspMemoryInit.
@param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.
@param[in] HobListPtr Address of the HobList pointer.
@return test result on output of FspMemoryInit API.
**/
EFI_STATUS
EFIAPI
TestFspMemoryInitApiOutput (
IN VOID *FspmUpdDataPtr,
IN VOID **HobListPtr
)
{
DEBUG_CODE_BEGIN ();
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *)(*(HobListPtr));
while (TRUE) {
if (END_OF_HOB_LIST(Hob) == TRUE) {
DEBUG((DEBUG_INFO, "gFspBootLoaderTolumHobGuid not Found\n"));
break;
}
if ((CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspBootLoaderTolumHobGuid))) {
DEBUG ((DEBUG_INFO, "gFspBootLoaderTolumHobGuid Found\n"));
DEBUG ((DEBUG_INFO, "Fill Boot Loader reserved memory range with 0x5A for testing purpose\n"));
SetMem ((VOID *)(UINTN)Hob.ResourceDescriptor->PhysicalStart, (UINTN)Hob.ResourceDescriptor->ResourceLength, 0x5A);
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
DEBUG_CODE_END ();
return RETURN_SUCCESS;
}
/**
Test the output of FSP API - TempRamExit.
@param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.
@return test result on output of TempRamExit API.
**/
EFI_STATUS
EFIAPI
TestFspTempRamExitApiOutput (
IN VOID *TempRamExitParam
)
{
return RETURN_SUCCESS;
}
/**
Test the output of FSP API - FspSiliconInit.
@param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.
@return test result on output of FspSiliconInit API.
**/
EFI_STATUS
EFIAPI
TestFspSiliconInitApiOutput (
IN VOID *FspsUpdDataPtr
)
{
return RETURN_SUCCESS;
}

56
IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf Normal file
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### @file
# Provide FSP-M wrapper API test related function.
#
# Copyright (C) 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010017
BASE_NAME = PeiFspWrapperApiTestLib
FILE_GUID = 87DC266A-C8F7-4A66-A0CB-018A6F5305B4
VERSION_STRING = 1.0
MODULE_TYPE = PEIM
LIBRARY_CLASS = FspWrapperApiTestLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperApiTest.c
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
BaseMemoryLib
DebugLib
HobLib
[Guids]
gFspBootLoaderTolumHobGuid ## CONSUMES ## GUID

390
IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c Normal file
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/** @file
Sample to provide FSP wrapper hob process related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/PeiServicesLib.h>
#include <Library/PeiServicesTablePointerLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/FspWrapperPlatformLib.h>
#include <Guid/GuidHobFspEas.h>
#include <Guid/MemoryTypeInformation.h>
#include <Guid/PcdDataBaseHobGuid.h>
#include <Ppi/Capsule.h>
//
// Additional pages are used by DXE memory manager.
// It should be consistent between RetrieveRequiredMemorySize() and GetPeiMemSize()
//
#define PEI_ADDITIONAL_MEMORY_SIZE (16 * EFI_PAGE_SIZE)
/**
Get the mem size in memory type infromation table.
@param[in] PeiServices PEI Services table.
@return the mem size in memory type infromation table.
**/
UINT64
GetMemorySizeInMemoryTypeInformation (
IN EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
EFI_PEI_HOB_POINTERS Hob;
EFI_MEMORY_TYPE_INFORMATION *MemoryData;
UINT8 Index;
UINTN TempPageNum;
MemoryData = NULL;
Status = (*PeiServices)->GetHobList ((CONST EFI_PEI_SERVICES**)PeiServices, (VOID **) &Hob.Raw);
ASSERT_EFI_ERROR (Status);
while (!END_OF_HOB_LIST (Hob)) {
if (Hob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION &&
CompareGuid (&Hob.Guid->Name, &gEfiMemoryTypeInformationGuid)) {
MemoryData = (EFI_MEMORY_TYPE_INFORMATION *) (Hob.Raw + sizeof (EFI_HOB_GENERIC_HEADER) + sizeof (EFI_GUID));
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
if (MemoryData == NULL) {
return 0;
}
TempPageNum = 0;
for (Index = 0; MemoryData[Index].Type != EfiMaxMemoryType; Index++) {
//
// Accumulate default memory size requirements
//
TempPageNum += MemoryData[Index].NumberOfPages;
}
return TempPageNum * EFI_PAGE_SIZE;
}
/**
Get the mem size need to be reserved in PEI phase.
@param[in] PeiServices PEI Services table.
@return the mem size need to be reserved in PEI phase.
**/
UINT64
RetrieveRequiredMemorySize (
IN EFI_PEI_SERVICES **PeiServices
)
{
UINT64 Size;
Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
return Size + PEI_ADDITIONAL_MEMORY_SIZE;
}
/**
Get the mem size need to be consumed and reserved in PEI phase.
@param[in] PeiServices PEI Services table.
@param[in] BootMode Current boot mode.
@return the mem size need to be consumed and reserved in PEI phase.
**/
UINT64
GetPeiMemSize (
IN EFI_PEI_SERVICES **PeiServices,
IN UINT32 BootMode
)
{
UINT64 Size;
UINT64 MinSize;
if (BootMode == BOOT_IN_RECOVERY_MODE) {
return PcdGet32 (PcdPeiRecoveryMinMemSize);
}
Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
if (BootMode == BOOT_ON_FLASH_UPDATE) {
//
// Maybe more size when in CapsuleUpdate phase ?
//
MinSize = PcdGet32 (PcdPeiMinMemSize);
} else {
MinSize = PcdGet32 (PcdPeiMinMemSize);
}
return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE;
}
/**
Post FSP-M HOB process for Memory Resource Descriptor.
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
@return If platform process the FSP hob list successfully.
**/
EFI_STATUS
EFIAPI
PostFspmHobProcess (
IN VOID *FspHobList
)
{
EFI_PEI_HOB_POINTERS Hob;
UINT64 LowMemorySize;
UINT64 FspMemorySize;
EFI_PHYSICAL_ADDRESS FspMemoryBase;
UINT64 PeiMemSize;
EFI_PHYSICAL_ADDRESS PeiMemBase;
UINT64 S3PeiMemSize;
EFI_PHYSICAL_ADDRESS S3PeiMemBase;
BOOLEAN FoundFspMemHob;
EFI_STATUS Status;
EFI_BOOT_MODE BootMode;
EFI_PEI_CAPSULE_PPI *Capsule;
VOID *CapsuleBuffer;
UINTN CapsuleBufferLength;
UINT64 RequiredMemSize;
EFI_PEI_SERVICES **PeiServices;
PeiServices = (EFI_PEI_SERVICES **)GetPeiServicesTablePointer ();
PeiServicesGetBootMode (&BootMode);
PeiMemBase = 0;
LowMemorySize = 0;
FspMemorySize = 0;
FspMemoryBase = 0;
FoundFspMemHob = FALSE;
//
// Parse the hob list from fsp
// Report all the resource hob except the memory between 1M and 4G
//
Hob.Raw = (UINT8 *)(UINTN)FspHobList;
DEBUG((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, Hob.Raw)) != NULL) {
DEBUG((DEBUG_INFO, "\nResourceType: 0x%x\n", Hob.ResourceDescriptor->ResourceType));
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
(Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)) {
DEBUG((DEBUG_INFO, "ResourceAttribute: 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG((DEBUG_INFO, "PhysicalStart: 0x%x\n", Hob.ResourceDescriptor->PhysicalStart));
DEBUG((DEBUG_INFO, "ResourceLength: 0x%x\n", Hob.ResourceDescriptor->ResourceLength));
DEBUG((DEBUG_INFO, "Owner: %g\n\n", &Hob.ResourceDescriptor->Owner));
}
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) // Found the low memory length below 4G
&& (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)) {
LowMemorySize += Hob.ResourceDescriptor->ResourceLength;
Hob.Raw = GET_NEXT_HOB (Hob);
continue;
}
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) // Found the low memory length below 4G
&& (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)
&& (CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspReservedMemoryResourceHobGuid))) {
FoundFspMemHob = TRUE;
FspMemoryBase = Hob.ResourceDescriptor->PhysicalStart;
FspMemorySize = Hob.ResourceDescriptor->ResourceLength;
DEBUG((DEBUG_INFO, "Find fsp mem hob, base 0x%x, len 0x%x\n", FspMemoryBase, FspMemorySize));
}
//
// Report the resource hob
//
BuildResourceDescriptorHob (
Hob.ResourceDescriptor->ResourceType,
Hob.ResourceDescriptor->ResourceAttribute,
Hob.ResourceDescriptor->PhysicalStart,
Hob.ResourceDescriptor->ResourceLength
);
Hob.Raw = GET_NEXT_HOB (Hob);
}
if (!FoundFspMemHob) {
DEBUG((DEBUG_INFO, "Didn't find the fsp used memory information.\n"));
//ASSERT(FALSE);
}
DEBUG((DEBUG_INFO, "LowMemorySize: 0x%x.\n", LowMemorySize));
DEBUG((DEBUG_INFO, "FspMemoryBase: 0x%x.\n", FspMemoryBase));
DEBUG((DEBUG_INFO, "FspMemorySize: 0x%x.\n", FspMemorySize));
if (BootMode == BOOT_ON_S3_RESUME) {
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
// EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
BASE_1MB,
LowMemorySize
);
S3PeiMemBase = 0;
S3PeiMemSize = 0;
Status = GetS3MemoryInfo (&S3PeiMemSize, &S3PeiMemBase);
ASSERT_EFI_ERROR (Status);
DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize));
//
// Make sure Stack and PeiMemory are not overlap
//
Status = PeiServicesInstallPeiMemory (
S3PeiMemBase,
S3PeiMemSize
);
ASSERT_EFI_ERROR (Status);
} else {
PeiMemSize = GetPeiMemSize (PeiServices, BootMode);
DEBUG((DEBUG_INFO, "PEI memory size = %Xh bytes\n", PeiMemSize));
//
// Capsule mode
//
Capsule = NULL;
CapsuleBuffer = NULL;
CapsuleBufferLength = 0;
if (BootMode == BOOT_ON_FLASH_UPDATE) {
Status = PeiServicesLocatePpi (
&gEfiPeiCapsulePpiGuid,
0,
NULL,
(VOID **) &Capsule
);
ASSERT_EFI_ERROR (Status);
if (Status == EFI_SUCCESS) {
//
// Make sure Stack and CapsuleBuffer are not overlap
//
CapsuleBuffer = (VOID *)(UINTN)BASE_1MB;
CapsuleBufferLength = (UINTN)(LowMemorySize - PeiMemSize);
//
// Call the Capsule PPI Coalesce function to coalesce the capsule data.
//
Status = Capsule->Coalesce (PeiServices, &CapsuleBuffer, &CapsuleBufferLength);
}
}
RequiredMemSize = RetrieveRequiredMemorySize (PeiServices);
DEBUG((DEBUG_INFO, "Required memory size = %Xh bytes\n", RequiredMemSize));
//
// Report the main memory
//
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
BASE_1MB,
LowMemorySize
);
//
// Make sure Stack and CapsuleBuffer are not overlap
//
//
// Install efi memory
//
PeiMemBase = BASE_1MB + LowMemorySize - PeiMemSize;
Status = PeiServicesInstallPeiMemory (
PeiMemBase,
PeiMemSize - RequiredMemSize
);
ASSERT_EFI_ERROR (Status);
if (Capsule != NULL) {
Status = Capsule->CreateState (PeiServices, CapsuleBuffer, CapsuleBufferLength);
}
}
return EFI_SUCCESS;
}
/**
Process FSP HOB list
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
**/
VOID
ProcessFspHobList (
IN VOID *FspHobList
)
{
EFI_PEI_HOB_POINTERS FspHob;
FspHob.Raw = FspHobList;
//
// Add all the HOBs from FSP binary to FSP wrapper
//
while (!END_OF_HOB_LIST (FspHob)) {
if (FspHob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION) {
//
// Skip FSP binary creates PcdDataBaseHobGuid
//
if (!CompareGuid(&FspHob.Guid->Name, &gPcdDataBaseHobGuid)) {
BuildGuidDataHob (
&FspHob.Guid->Name,
GET_GUID_HOB_DATA(FspHob),
GET_GUID_HOB_DATA_SIZE(FspHob)
);
}
}
FspHob.Raw = GET_NEXT_HOB (FspHob);
}
}
/**
Post FSP-S HOB process (not Memory Resource Descriptor).
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
@return If platform process the FSP hob list successfully.
**/
EFI_STATUS
EFIAPI
PostFspsHobProcess (
IN VOID *FspHobList
)
{
ProcessFspHobList (FspHobList);
return EFI_SUCCESS;
}

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## @file
# Sample to provide FSP wrapper hob process related function.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PeiFspWrapperHobProcessLibSample
FILE_GUID = 864693E2-EDE8-4DF8-8871-38C0BAA157EB
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = FspWrapperHobProcessLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperHobProcessLibSample.c
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
HobLib
DebugLib
FspWrapperPlatformLib
PeiServicesLib
PeiServicesTablePointerLib
[Pcd]
gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize ## CONSUMES
[Guids]
gFspReservedMemoryResourceHobGuid ## CONSUMES ## HOB
gEfiMemoryTypeInformationGuid ## CONSUMES ## GUID
gPcdDataBaseHobGuid ## CONSUMES ## HOB
[Ppis]
gEfiPeiCapsulePpiGuid ## CONSUMES

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/** @file
Sample to provide FSP wrapper platform sec related function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPlatformInformation.h>
#include <Ppi/SecPerformance.h>
#include <Library/LocalApicLib.h>
/**
This interface conveys state information out of the Security (SEC) phase into PEI.
@param[in] PeiServices Pointer to the PEI Services Table.
@param[in,out] StructureSize Pointer to the variable describing size of the input buffer.
@param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
**/
EFI_STATUS
EFIAPI
SecPlatformInformation (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN OUT UINT64 *StructureSize,
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
);
/**
This interface conveys performance information out of the Security (SEC) phase into PEI.
This service is published by the SEC phase. The SEC phase handoff has an optional
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
this information is encapsulated into the data structure abstracted by this service.
This information is collected for the boot-strap processor (BSP) on IA-32.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
@param[out] Performance The pointer to performance data collected in SEC phase.
@retval EFI_SUCCESS The data was successfully returned.
**/
EFI_STATUS
EFIAPI
SecGetPerformance (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN PEI_SEC_PERFORMANCE_PPI *This,
OUT FIRMWARE_SEC_PERFORMANCE *Performance
);
PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
SecGetPerformance
};
EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gTopOfTemporaryRamPpiGuid,
NULL // To be patched later.
},
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gPeiSecPerformancePpiGuid,
&mSecPerformancePpi
},
};
/**
A developer supplied function to perform platform specific operations.
It's a developer supplied function to perform any operations appropriate to a
given platform. It's invoked just before passing control to PEI core by SEC
core. Platform developer may modify the SecCoreData passed to PEI Core.
It returns a platform specific PPI list that platform wishes to pass to PEI core.
The Generic SEC core module will merge this list to join the final list passed to
PEI core.
@param[in,out] SecCoreData The same parameter as passing to PEI core. It
could be overridden by this function.
@return The platform specific PPI list to be passed to PEI core or
NULL if there is no need of such platform specific PPI list.
**/
EFI_PEI_PPI_DESCRIPTOR *
EFIAPI
SecPlatformMain (
IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
)
{
EFI_PEI_PPI_DESCRIPTOR *PpiList;
DEBUG((DEBUG_INFO, "SecPlatformMain\n"));
DEBUG((DEBUG_INFO, "BootFirmwareVolumeBase - 0x%x\n", SecCoreData->BootFirmwareVolumeBase));
DEBUG((DEBUG_INFO, "BootFirmwareVolumeSize - 0x%x\n", SecCoreData->BootFirmwareVolumeSize));
DEBUG((DEBUG_INFO, "TemporaryRamBase - 0x%x\n", SecCoreData->TemporaryRamBase));
DEBUG((DEBUG_INFO, "TemporaryRamSize - 0x%x\n", SecCoreData->TemporaryRamSize));
DEBUG((DEBUG_INFO, "PeiTemporaryRamBase - 0x%x\n", SecCoreData->PeiTemporaryRamBase));
DEBUG((DEBUG_INFO, "PeiTemporaryRamSize - 0x%x\n", SecCoreData->PeiTemporaryRamSize));
DEBUG((DEBUG_INFO, "StackBase - 0x%x\n", SecCoreData->StackBase));
DEBUG((DEBUG_INFO, "StackSize - 0x%x\n", SecCoreData->StackSize));
InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
//
// Use middle of Heap as temp buffer, it will be copied by caller.
// Do not use Stack, because it will cause wrong calculation on stack by PeiCore
//
PpiList = (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase + (UINTN)SecCoreData->PeiTemporaryRamSize/2);
CopyMem (PpiList, mPeiSecPlatformPpi, sizeof(mPeiSecPlatformPpi));
//
// Patch TopOfTemporaryRamPpi
//
PpiList[0].Ppi = (VOID *)((UINTN)SecCoreData->TemporaryRamBase + SecCoreData->TemporaryRamSize);
return PpiList;
}

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/** @file
Fsp related definitions
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __FSP_H__
#define __FSP_H__
//
// Fv Header
//
#define FVH_FV_LENGTH_OFFSET 0x20
#define FVH_SIGINATURE_OFFSET 0x28
#define FVH_SIGINATURE_VALID_VALUE 0x4856465F // valid signature:_FVH
#define FVH_HEADER_LENGTH_OFFSET 0x30
#define FVH_EXTHEADER_OFFSET_OFFSET 0x34
#define FVH_EXTHEADER_SIZE_OFFSET 0x10
//
// Ffs Header
//
#define FSP_HEADER_SIGNATURE_OFFSET 0x1C
#define FSP_HEADER_SIGNATURE 0x48505346 ; valid signature:FSPH
#define FSP_HEADER_GUID_DWORD1 0x912740BE
#define FSP_HEADER_GUID_DWORD2 0x47342284
#define FSP_HEADER_GUID_DWORD3 0xB08471B9
#define FSP_HEADER_GUID_DWORD4 0x0C3F3527
#define FFS_HEADER_SIZE_VALUE 0x18
//
// Section Header
//
#define SECTION_HEADER_TYPE_OFFSET 0x03
#define RAW_SECTION_HEADER_SIZE_VALUE 0x04
//
// Fsp Header
//
#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
#endif

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#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# PeiCoreEntry.S
#
# Abstract:
#
# Find and call SecStartup
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
ASM_PFX(CallPeiCoreEntryPoint):
#
# Obtain the hob list pointer
#
movl 0x4(%esp), %eax
#
# Obtain the stack information
# ECX: start of range
# EDX: end of range
#
movl 0x8(%esp), %ecx
movl 0xC(%esp), %edx
#
# Platform init
#
pushal
pushl %edx
pushl %ecx
pushl %eax
call ASM_PFX(PlatformInit)
popl %eax
popl %eax
popl %eax
popal
#
# Set stack top pointer
#
movl %edx, %esp
#
# Push the hob list pointer
#
pushl %eax
#
# Save the value
# ECX: start of range
# EDX: end of range
#
movl %esp, %ebp
pushl %ecx
pushl %edx
#
# Push processor count to stack first, then BIST status (AP then BSP)
#
movl $1, %eax
cpuid
shr $16, %ebx
andl $0x000000FF, %ebx
cmp $1, %bl
jae PushProcessorCount
#
# Some processors report 0 logical processors. Effectively 0 = 1.
# So we fix up the processor count
#
inc %ebx
PushProcessorCount:
pushl %ebx
#
# We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
# for all processor threads
#
xorl %ecx, %ecx
movb %bl, %cl
PushBist:
movd %mm0, %eax
pushl %eax
loop PushBist
# Save Time-Stamp Counter
movd %mm5, %eax
pushl %eax
movd %mm6, %eax
pushl %eax
#
# Pass entry point of the PEI core
#
movl $0xFFFFFFE0, %edi
pushl %ds:(%edi)
#
# Pass BFV into the PEI Core
#
movl $0xFFFFFFFC, %edi
pushl %ds:(%edi)
#
# Pass stack size into the PEI Core
#
movl -4(%ebp), %ecx
movl -8(%ebp), %edx
pushl %ecx # RamBase
subl %ecx, %edx
pushl %edx # RamSize
#
# Pass Control into the PEI Core
#
call ASM_PFX(SecStartup)

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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; PeiCoreEntry.asm
;
; Abstract:
;
; Find and call SecStartup
;
;------------------------------------------------------------------------------
.686p
.xmm
.model flat, c
.code
EXTRN SecStartup:NEAR
EXTRN PlatformInit:NEAR
CallPeiCoreEntryPoint PROC PUBLIC
;
; Obtain the hob list pointer
;
mov eax, [esp+4]
;
; Obtain the stack information
; ECX: start of range
; EDX: end of range
;
mov ecx, [esp+8]
mov edx, [esp+0Ch]
;
; Platform init
;
pushad
push edx
push ecx
push eax
call PlatformInit
pop eax
pop eax
pop eax
popad
;
; Set stack top pointer
;
mov esp, edx
;
; Push the hob list pointer
;
push eax
;
; Save the value
; ECX: start of range
; EDX: end of range
;
mov ebp, esp
push ecx
push edx
;
; Push processor count to stack first, then BIST status (AP then BSP)
;
mov eax, 1
cpuid
shr ebx, 16
and ebx, 0000000FFh
cmp bl, 1
jae PushProcessorCount
;
; Some processors report 0 logical processors. Effectively 0 = 1.
; So we fix up the processor count
;
inc ebx
PushProcessorCount:
push ebx
;
; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
; for all processor threads
;
xor ecx, ecx
mov cl, bl
PushBist:
movd eax, mm0
push eax
loop PushBist
; Save Time-Stamp Counter
movd eax, mm5
push eax
movd eax, mm6
push eax
;
; Pass entry point of the PEI core
;
mov edi, 0FFFFFFE0h
push DWORD PTR ds:[edi]
;
; Pass BFV into the PEI Core
;
mov edi, 0FFFFFFFCh
push DWORD PTR ds:[edi]
;
; Pass stack size into the PEI Core
;
mov ecx, [ebp - 4]
mov edx, [ebp - 8]
push ecx ; RamBase
sub edx, ecx
push edx ; RamSize
;
; Pass Control into the PEI Core
;
call SecStartup
CallPeiCoreEntryPoint ENDP
END

336
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#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# SecEntry.S
#
# Abstract:
#
# This is the code that goes from real-mode to protected mode.
# It consumes the reset vector, calls TempRamInit API from FSP binary.
#
#------------------------------------------------------------------------------
#include "Fsp.h"
ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress)
ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
ASM_PFX(_TEXT_REALMODE):
#----------------------------------------------------------------------------
#
# Procedure: _ModuleEntryPoint
#
# Input: None
#
# Output: None
#
# Destroys: Assume all registers
#
# Description:
#
# Transition to non-paged flat-model protected mode from a
# hard-coded GDT that provides exactly two descriptors.
# This is a bare bones transition to protected mode only
# used for a while in PEI and possibly DXE.
#
# After enabling protected mode, a far jump is executed to
# transfer to PEI using the newly loaded GDT.
#
# Return: None
#
# MMX Usage:
# MM0 = BIST State
# MM5 = Save time-stamp counter value high32bit
# MM6 = Save time-stamp counter value low32bit.
#
#----------------------------------------------------------------------------
.align 4
ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
ASM_PFX(_ModuleEntryPoint):
fninit # clear any pending Floating point exceptions
#
# Store the BIST value in mm0
#
movd %eax, %mm0
#
# Save time-stamp counter value
# rdtsc load 64bit time-stamp counter to EDX:EAX
#
rdtsc
movd %edx, %mm5
movd %ecx, %mm6
#
# Load the GDT table in GdtDesc
#
movl $GdtDesc, %esi
.byte 0x66
lgdt %cs:(%si)
#
# Transition to 16 bit protected mode
#
movl %cr0, %eax # Get control register 0
orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
movl %eax, %cr0 # Activate protected mode
movl %cr4, %eax # Get control register 4
orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
movl %eax, %cr4
#
# Now we're in 16 bit protected mode
# Set up the selectors for 32 bit protected mode entry
#
movw SYS_DATA_SEL, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
#
# Transition to Flat 32 bit protected mode
# The jump to a far pointer causes the transition to 32 bit mode
#
movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
jmp *%cs:(%si)
ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
ASM_PFX(_TEXT_PROTECTED_MODE):
#----------------------------------------------------------------------------
#
# Procedure: ProtectedModeEntryPoint
#
# Input: None
#
# Output: None
#
# Destroys: Assume all registers
#
# Description:
#
# This function handles:
# Call two basic APIs from FSP binary
# Initializes stack with some early data (BIST, PEI entry, etc)
#
# Return: None
#
#----------------------------------------------------------------------------
.align 4
ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
ASM_PFX(ProtectedModeEntryPoint):
# Find the fsp info header
movl ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress), %edi
movl FVH_SIGINATURE_OFFSET(%edi), %eax
cmp $FVH_SIGINATURE_VALID_VALUE, %eax
jnz FspHeaderNotFound
xorl %eax, %eax
movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
cmp %ax, 0
jnz FspFvExtHeaderExist
xorl %eax, %eax
movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
addl %eax, %edi
jmp FspCheckFfsHeader
FspFvExtHeaderExist:
addl %eax, %edi
movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
addl %eax, %edi
# Round up to 8 byte alignment
movl %edi, %eax
andb $0x07, %al
jz FspCheckFfsHeader
and $0xFFFFFFF8, %edi
add $0x08, %edi
FspCheckFfsHeader:
# Check the ffs guid
movl (%edi), %eax
cmp $FSP_HEADER_GUID_DWORD1, %eax
jnz FspHeaderNotFound
movl 0x4(%edi), %eax
cmp $FSP_HEADER_GUID_DWORD2, %eax
jnz FspHeaderNotFound
movl 0x08(%edi), %eax
cmp $FSP_HEADER_GUID_DWORD3, %eax
jnz FspHeaderNotFound
movl 0x0c(%edi), %eax
cmp $FSP_HEADER_GUID_DWORD4, %eax
jnz FspHeaderNotFound
add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
# Check the section type as raw section
movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
cmp $0x19, %al
jnz FspHeaderNotFound
addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
jmp FspHeaderFound
FspHeaderNotFound:
jmp .
FspHeaderFound:
# Get the fsp TempRamInit Api address
movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
# Setup the hardcode stack
movl $TempRamInitStack, %esp
# Call the fsp TempRamInit Api
jmp *%eax
TempRamInitDone:
cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
je CallSecFspInit #If microcode not found, don't hang, but continue.
cmp $0x0, %eax
jnz FspApiFailed
# ECX: start of range
# EDX: end of range
CallSecFspInit:
xorl %eax, %eax
movl %edx, %esp
# Align the stack at DWORD
addl $3, %esp
andl $0xFFFFFFFC, %esp
pushl %edx
pushl %ecx
pushl %eax # zero - no hob list yet
call ASM_PFX(CallPeiCoreEntryPoint)
FspApiFailed:
jmp .
.align 0x10
TempRamInitStack:
.long TempRamInitDone
.long ASM_PFX(FsptUpdDataPtr)
#
# ROM-based Global-Descriptor Table for the Tiano PEI Phase
#
.align 16
#
# GDT[0]: 0x00: Null entry, never used.
#
.equ NULL_SEL, . - GDT_BASE # Selector [0]
GDT_BASE:
BootGdtTable: .long 0
.long 0
#
# Linear data segment descriptor
#
.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
.word 0xFFFF # limit 0xFFFFF
.word 0 # base 0
.byte 0
.byte 0x92 # present, ring 0, data, expand-up, writable
.byte 0xCF # page-granular, 32-bit
.byte 0
#
# Linear code segment descriptor
#
.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
.word 0xFFFF # limit 0xFFFFF
.word 0 # base 0
.byte 0
.byte 0x9B # present, ring 0, data, expand-up, not-writable
.byte 0xCF # page-granular, 32-bit
.byte 0
#
# System data segment descriptor
#
.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
.word 0xFFFF # limit 0xFFFFF
.word 0 # base 0
.byte 0
.byte 0x93 # present, ring 0, data, expand-up, not-writable
.byte 0xCF # page-granular, 32-bit
.byte 0
#
# System code segment descriptor
#
.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
.word 0xFFFF # limit 0xFFFFF
.word 0 # base 0
.byte 0
.byte 0x9A # present, ring 0, data, expand-up, writable
.byte 0xCF # page-granular, 32-bit
.byte 0
#
# Spare segment descriptor
#
.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
.word 0xFFFF # limit 0xFFFFF
.word 0 # base 0
.byte 0x0E # Changed from F000 to E000.
.byte 0x9B # present, ring 0, code, expand-up, writable
.byte 0x00 # byte-granular, 16-bit
.byte 0
#
# Spare segment descriptor
#
.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
.word 0xFFFF # limit 0xFFFF
.word 0 # base 0
.byte 0
.byte 0x93 # present, ring 0, data, expand-up, not-writable
.byte 0x00 # byte-granular, 16-bit
.byte 0
#
# Spare segment descriptor
#
.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
.word 0 # limit 0
.word 0 # base 0
.byte 0
.byte 0 # present, ring 0, data, expand-up, writable
.byte 0 # page-granular, 32-bit
.byte 0
.equ GDT_SIZE, . - BootGdtTable # Size, in bytes
#
# GDT Descriptor
#
GdtDesc: # GDT descriptor
.word GDT_SIZE - 1 # GDT limit
.long BootGdtTable # GDT base address
ASM_PFX(ProtectedModeEntryLinearAddress):
ProtectedModeEntryLinearOffset:
.long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
.word LINEAR_CODE_SEL

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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; SecEntry.asm
;
; Abstract:
;
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, calls TempRamInit API from FSP binary.
;
;------------------------------------------------------------------------------
#include "Fsp.h"
.686p
.xmm
.model small, c
EXTRN CallPeiCoreEntryPoint:NEAR
EXTRN FsptUpdDataPtr:FAR
; Pcds
EXTRN PcdGet32 (PcdFsptBaseAddress):DWORD
_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
;----------------------------------------------------------------------------
;
; Procedure: _ModuleEntryPoint
;
; Input: None
;
; Output: None
;
; Destroys: Assume all registers
;
; Description:
;
; Transition to non-paged flat-model protected mode from a
; hard-coded GDT that provides exactly two descriptors.
; This is a bare bones transition to protected mode only
; used for a while in PEI and possibly DXE.
;
; After enabling protected mode, a far jump is executed to
; transfer to PEI using the newly loaded GDT.
;
; Return: None
;
; MMX Usage:
; MM0 = BIST State
; MM5 = Save time-stamp counter value high32bit
; MM6 = Save time-stamp counter value low32bit.
;
;----------------------------------------------------------------------------
align 4
_ModuleEntryPoint PROC NEAR C PUBLIC
fninit ; clear any pending Floating point exceptions
;
; Store the BIST value in mm0
;
movd mm0, eax
;
; Save time-stamp counter value
; rdtsc load 64bit time-stamp counter to EDX:EAX
;
rdtsc
movd mm5, edx
movd mm6, eax
;
; Load the GDT table in GdtDesc
;
mov esi, OFFSET GdtDesc
DB 66h
lgdt fword ptr cs:[si]
;
; Transition to 16 bit protected mode
;
mov eax, cr0 ; Get control register 0
or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
mov cr0, eax ; Activate protected mode
mov eax, cr4 ; Get control register 4
or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
mov cr4, eax
;
; Now we're in 16 bit protected mode
; Set up the selectors for 32 bit protected mode entry
;
mov ax, SYS_DATA_SEL
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
;
; Transition to Flat 32 bit protected mode
; The jump to a far pointer causes the transition to 32 bit mode
;
mov esi, offset ProtectedModeEntryLinearAddress
jmp fword ptr cs:[si]
_ModuleEntryPoint ENDP
_TEXT_REALMODE ENDS
_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
;----------------------------------------------------------------------------
;
; Procedure: ProtectedModeEntryPoint
;
; Input: None
;
; Output: None
;
; Destroys: Assume all registers
;
; Description:
;
; This function handles:
; Call two basic APIs from FSP binary
; Initializes stack with some early data (BIST, PEI entry, etc)
;
; Return: None
;
;----------------------------------------------------------------------------
align 4
ProtectedModeEntryPoint PROC NEAR PUBLIC
; Find the fsp info header
mov edi, PcdGet32 (PcdFsptBaseAddress)
mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
cmp eax, FVH_SIGINATURE_VALID_VALUE
jnz FspHeaderNotFound
xor eax, eax
mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
cmp ax, 0
jnz FspFvExtHeaderExist
xor eax, eax
mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
add edi, eax
jmp FspCheckFfsHeader
FspFvExtHeaderExist:
add edi, eax
mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
add edi, eax
; Round up to 8 byte alignment
mov eax, edi
and al, 07h
jz FspCheckFfsHeader
and edi, 0FFFFFFF8h
add edi, 08h
FspCheckFfsHeader:
; Check the ffs guid
mov eax, dword ptr [edi]
cmp eax, FSP_HEADER_GUID_DWORD1
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 4]
cmp eax, FSP_HEADER_GUID_DWORD2
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 8]
cmp eax, FSP_HEADER_GUID_DWORD3
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 0Ch]
cmp eax, FSP_HEADER_GUID_DWORD4
jnz FspHeaderNotFound
add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
; Check the section type as raw section
mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
cmp al, 019h
jnz FspHeaderNotFound
add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
jmp FspHeaderFound
FspHeaderNotFound:
jmp $
FspHeaderFound:
; Get the fsp TempRamInit Api address
mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
; Setup the hardcode stack
mov esp, OFFSET TempRamInitStack
; Call the fsp TempRamInit Api
jmp eax
TempRamInitDone:
cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
je CallSecFspInit ;If microcode not found, don't hang, but continue.
cmp eax, 0 ;Check if EFI_SUCCESS retuned.
jnz FspApiFailed
; ECX: start of range
; EDX: end of range
CallSecFspInit:
xor eax, eax
mov esp, edx
; Align the stack at DWORD
add esp, 3
and esp, 0FFFFFFFCh
push edx
push ecx
push eax ; zero - no hob list yet
call CallPeiCoreEntryPoint
FspApiFailed:
jmp $
align 10h
TempRamInitStack:
DD OFFSET TempRamInitDone
DD OFFSET FsptUpdDataPtr ; TempRamInitParams
ProtectedModeEntryPoint ENDP
;
; ROM-based Global-Descriptor Table for the Tiano PEI Phase
;
align 16
PUBLIC BootGdtTable
;
; GDT[0]: 0x00: Null entry, never used.
;
NULL_SEL EQU $ - GDT_BASE ; Selector [0]
GDT_BASE:
BootGdtTable DD 0
DD 0
;
; Linear data segment descriptor
;
LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 092h ; present, ring 0, data, expand-up, writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; Linear code segment descriptor
;
LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 09Bh ; present, ring 0, data, expand-up, not-writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; System data segment descriptor
;
SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 093h ; present, ring 0, data, expand-up, not-writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; System code segment descriptor
;
SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 09Ah ; present, ring 0, data, expand-up, writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; Spare segment descriptor
;
SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0Eh ; Changed from F000 to E000.
DB 09Bh ; present, ring 0, code, expand-up, writable
DB 00h ; byte-granular, 16-bit
DB 0
;
; Spare segment descriptor
;
SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
DW 0FFFFh ; limit 0xFFFF
DW 0 ; base 0
DB 0
DB 093h ; present, ring 0, data, expand-up, not-writable
DB 00h ; byte-granular, 16-bit
DB 0
;
; Spare segment descriptor
;
SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
DW 0 ; limit 0
DW 0 ; base 0
DB 0
DB 0 ; present, ring 0, data, expand-up, writable
DB 0 ; page-granular, 32-bit
DB 0
GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
;
; GDT Descriptor
;
GdtDesc: ; GDT descriptor
DW GDT_SIZE - 1 ; GDT limit
DD OFFSET BootGdtTable ; GDT base address
ProtectedModeEntryLinearAddress LABEL FWORD
ProtectedModeEntryLinearOffset LABEL DWORD
DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
DW LINEAR_CODE_SEL
_TEXT_PROTECTED_MODE ENDS
END

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#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Abstract:
#
# Switch the stack from temporary memory to permenent memory.
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# SecSwitchStack (
# UINT32 TemporaryMemoryBase,
# UINT32 PermanentMemoryBase
# )#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX (SecSwitchStack)
ASM_PFX(SecSwitchStack):
#
# Save standard registers so they can be used to change stack
#
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
#
# !!CAUTION!! this function address's is pushed into stack after
# migration of whole temporary memory, so need save it to permanent
# memory at first!
#
movl 20(%esp), %ebx # Save the first parameter
movl 24(%esp), %ecx # Save the second parameter
#
# Save this function's return address into permanent memory at first.
# Then, Fixup the esp point to permanent memory
#
movl %esp, %eax
subl %ebx, %eax
addl %ecx, %eax
movl 0(%esp), %edx # copy pushed register's value to permanent memory
movl %edx, 0(%eax)
movl 4(%esp), %edx
movl %edx, 4(%eax)
movl 8(%esp), %edx
movl %edx, 8(%eax)
movl 12(%esp), %edx
movl %edx, 12(%eax)
movl 16(%esp), %edx # Update this function's return address into permanent memory
movl %edx, 16(%eax)
movl %eax, %esp # From now, esp is pointed to permanent memory
#
# Fixup the ebp point to permanent memory
#
movl %ebp, %eax
subl %ebx, %eax
addl %ecx, %eax
movl %eax, %ebp # From now, ebp is pointed to permanent memory
popl %edx
popl %ecx
popl %ebx
popl %eax
ret

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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Abstract:
;
; Switch the stack from temporary memory to permenent memory.
;
;------------------------------------------------------------------------------
.586p
.model flat,C
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; SecSwitchStack (
; UINT32 TemporaryMemoryBase,
; UINT32 PermanentMemoryBase
; );
;------------------------------------------------------------------------------
SecSwitchStack PROC
;
; Save three register: eax, ebx, ecx
;
push eax
push ebx
push ecx
push edx
;
; !!CAUTION!! this function address's is pushed into stack after
; migration of whole temporary memory, so need save it to permanent
; memory at first!
;
mov ebx, [esp + 20] ; Save the first parameter
mov ecx, [esp + 24] ; Save the second parameter
;
; Save this function's return address into permanent memory at first.
; Then, Fixup the esp point to permanent memory
;
mov eax, esp
sub eax, ebx
add eax, ecx
mov edx, dword ptr [esp] ; copy pushed register's value to permanent memory
mov dword ptr [eax], edx
mov edx, dword ptr [esp + 4]
mov dword ptr [eax + 4], edx
mov edx, dword ptr [esp + 8]
mov dword ptr [eax + 8], edx
mov edx, dword ptr [esp + 12]
mov dword ptr [eax + 12], edx
mov edx, dword ptr [esp + 16] ; Update this function's return address into permanent memory
mov dword ptr [eax + 16], edx
mov esp, eax ; From now, esp is pointed to permanent memory
;
; Fixup the ebp point to permanent memory
;
mov eax, ebp
sub eax, ebx
add eax, ecx
mov ebp, eax ; From now, ebp is pointed to permanent memory
pop edx
pop ecx
pop ebx
pop eax
ret
SecSwitchStack ENDP
END

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/** @file
Sample to provide platform init function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/DebugLib.h>
#include <Library/SerialPortLib.h>
/**
Platform initialization.
@param[in] FspHobList HobList produced by FSP.
@param[in] StartOfRange Start of temporary RAM.
@param[in] EndOfRange End of temporary RAM.
**/
VOID
EFIAPI
PlatformInit (
IN VOID *FspHobList,
IN VOID *StartOfRange,
IN VOID *EndOfRange
)
{
//
// Platform initialization
// Enable Serial port here
//
SerialPortInitialize ();
DEBUG ((DEBUG_INFO, "PrintPeiCoreEntryPointParam in PlatformInit\n"));
DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
}

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IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf Normal file
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## @file
# Sample to provide FSP wrapper platform sec related function.
#
# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SecFspWrapperPlatformSecLibSample
FILE_GUID = 8F1AC44A-CE7E-4E29-95BB-92E321BB1573
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = FspWrapperPlatformSecLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspWrapperPlatformSecLibSample.c
SecRamInitData.c
SecPlatformInformation.c
SecGetPerformance.c
SecTempRamDone.c
PlatformInit.c
[Sources.IA32]
Ia32/SecEntry.asm
Ia32/PeiCoreEntry.asm
Ia32/Stack.asm
Ia32/Fsp.h
Ia32/SecEntry.S
Ia32/PeiCoreEntry.S
Ia32/Stack.S
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
[LibraryClasses]
LocalApicLib
SerialPortLib
[Ppis]
gEfiSecPlatformInformationPpiGuid ## CONSUMES
gPeiSecPerformancePpiGuid ## CONSUMES
gTopOfTemporaryRamPpiGuid ## PRODUCES
[Pcd]
gFspWrapperTokenSpaceGuid.PcdFsptBaseAddress ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
[FixedPcd]
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES

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IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecGetPerformance.c Normal file
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/** @file
Sample to provide SecGetPerformance function.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPerformance.h>
#include <Ppi/TopOfTemporaryRam.h>
#include <Library/BaseMemoryLib.h>
#include <Library/TimerLib.h>
#include <Library/DebugLib.h>
/**
This interface conveys performance information out of the Security (SEC) phase into PEI.
This service is published by the SEC phase. The SEC phase handoff has an optional
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
this information is encapsulated into the data structure abstracted by this service.
This information is collected for the boot-strap processor (BSP) on IA-32.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
@param[out] Performance The pointer to performance data collected in SEC phase.
@retval EFI_SUCCESS The data was successfully returned.
**/
EFI_STATUS
EFIAPI
SecGetPerformance (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN PEI_SEC_PERFORMANCE_PPI *This,
OUT FIRMWARE_SEC_PERFORMANCE *Performance
)
{
UINT32 Size;
UINT32 Count;
UINT32 TopOfTemporaryRam;
UINT64 Ticker;
VOID *TopOfTemporaryRamPpi;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
Status = (*PeiServices)->LocatePpi (
PeiServices,
&gTopOfTemporaryRamPpiGuid,
0,
NULL,
(VOID **) &TopOfTemporaryRamPpi
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// |--------------| <- TopOfTemporaryRam
// |Number of BSPs|
// |--------------|
// | BIST |
// |--------------|
// | .... |
// |--------------|
// | TSC[63:32] |
// |--------------|
// | TSC[31:00] |
// |--------------|
//
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
TopOfTemporaryRam -= sizeof(UINT32) * 2;
Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32));
Size = Count * sizeof (UINT64);
Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size - sizeof (UINT32) * 2);
Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
return EFI_SUCCESS;
}

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IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecPlatformInformation.c Normal file
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/** @file
Sample to provide SecPlatformInformation function.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPlatformInformation.h>
#include <Ppi/TopOfTemporaryRam.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
/**
This interface conveys state information out of the Security (SEC) phase into PEI.
@param[in] PeiServices Pointer to the PEI Services Table.
@param[in,out] StructureSize Pointer to the variable describing size of the input buffer.
@param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
**/
EFI_STATUS
EFIAPI
SecPlatformInformation (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN OUT UINT64 *StructureSize,
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
)
{
UINT32 *Bist;
UINT32 Size;
UINT32 Count;
UINT32 TopOfTemporaryRam;
VOID *TopOfTemporaryRamPpi;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
Status = (*PeiServices)->LocatePpi (
PeiServices,
&gTopOfTemporaryRamPpiGuid,
0,
NULL,
(VOID **) &TopOfTemporaryRamPpi
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// The entries of BIST information, together with the number of them,
// reside in the bottom of stack, left untouched by normal stack operation.
// This routine copies the BIST information to the buffer pointed by
// PlatformInformationRecord for output.
//
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
TopOfTemporaryRam -= sizeof(UINT32) * 2;
Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof (UINT32)));
Size = Count * sizeof (IA32_HANDOFF_STATUS);
if ((*StructureSize) < (UINT64) Size) {
*StructureSize = Size;
return EFI_BUFFER_TOO_SMALL;
}
*StructureSize = Size;
Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
CopyMem (PlatformInformationRecord, Bist, Size);
return EFI_SUCCESS;
}

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IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c Normal file
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/** @file
Sample to provide TempRamInitParams data.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/PcdLib.h>
#include <FspEas.h>
typedef struct {
UINT32 MicrocodeRegionBase;
UINT32 MicrocodeRegionSize;
UINT32 CodeRegionBase;
UINT32 CodeRegionSize;
} FSPT_CORE_UPD;
typedef struct {
FSP_UPD_HEADER FspUpdHeader;
FSPT_CORE_UPD FsptCoreUpd;
} FSPT_UPD_CORE_DATA;
GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
{
0x4450555F54505346,
0x00,
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
},
{
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicrocodeOffset)),
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicrocodeOffset)),
FixedPcdGet32 (PcdFlashCodeCacheAddress),
FixedPcdGet32 (PcdFlashCodeCacheSize),
}
};

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/** @file
Sample to provide SecTemporaryRamDone function.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/TemporaryRamDone.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/DebugAgentLib.h>
#include <Library/FspPlatformInfoLib.h>
#include <Library/FspApiLib.h>
/**
This interface disables temporary memory in SEC Phase.
**/
VOID
EFIAPI
SecPlatformDisableTemporaryMemory (
VOID
)
{
EFI_STATUS Status;
VOID *TempRamExitParam;
FSP_INFO_HEADER *FspHeader;
FspHeader = FspFindFspHeader (PcdGet32(PcdFspmBaseAddress));
if (FspHeader == NULL) {
return ;
}
DEBUG((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n"));
TempRamExitParam = GetTempRamExitParam ();
Status = CallTempRamExit (FspHeader, TempRamExitParam);
DEBUG((DEBUG_INFO, "TempRamExit status: 0x%x\n", Status));
ASSERT_EFI_ERROR(Status);
return ;
}