Update Mde/MdeModulePkg to support ICC build for IA32/X64.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3892 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
yshang1
@@ -38,12 +38,14 @@
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IoHighLevel.c
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IoLibGcc.c | GCC
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IoLibMsc.c | MSFT
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IoLibIcc.c | INTEL
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IoLib.c
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[Sources.X64]
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IoHighLevel.c
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IoLibGcc.c | GCC
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IoLibMsc.c | MSFT
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IoLibIcc.c | INTEL
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IoLib.c
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[Sources.IPF]
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408
MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
Normal file
408
MdePkg/Library/BaseIoLibIntrinsic/IoLibIcc.c
Normal file
@@ -0,0 +1,408 @@
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/** @file
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I/O Library. This file has compiler specifics for ICC as there
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is no ANSI C standard for doing IO.
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Copyright (c) 2006 - 2007, Intel Corporation<BR> All rights
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reserved. This program and the accompanying materials are
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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//
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// Include common header file for this module.
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//
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#include "BaseIoLibIntrinsicInternal.h"
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/**
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Reads an 8-bit MMIO register.
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Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If 8-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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MmioRead8 (
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IN UINTN Address
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)
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{
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return *(volatile UINT8*)Address;
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}
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/**
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Writes an 8-bit MMIO register.
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Writes the 8-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If 8-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT8
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EFIAPI
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MmioWrite8 (
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IN UINTN Address,
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IN UINT8 Value
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)
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{
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return *(volatile UINT8*)Address = Value;
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}
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/**
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Reads a 16-bit MMIO register.
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Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If 16-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT16
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EFIAPI
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MmioRead16 (
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IN UINTN Address
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)
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{
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ASSERT ((Address & 1) == 0);
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return *(volatile UINT16*)Address;
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}
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/**
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Writes a 16-bit MMIO register.
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Writes the 16-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If 16-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT16
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EFIAPI
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MmioWrite16 (
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IN UINTN Address,
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IN UINT16 Value
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)
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{
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ASSERT ((Address & 1) == 0);
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return *(volatile UINT16*)Address = Value;
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}
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/**
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Reads a 32-bit MMIO register.
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Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If 32-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT32
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EFIAPI
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MmioRead32 (
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IN UINTN Address
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)
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{
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ASSERT ((Address & 3) == 0);
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return *(volatile UINT32*)Address;
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}
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/**
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Writes a 32-bit MMIO register.
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Writes the 32-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If 32-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT32
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EFIAPI
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MmioWrite32 (
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IN UINTN Address,
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IN UINT32 Value
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)
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{
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ASSERT ((Address & 3) == 0);
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return *(volatile UINT32*)Address = Value;
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}
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/**
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Reads a 64-bit MMIO register.
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Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If 64-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT64
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EFIAPI
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MmioRead64 (
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IN UINTN Address
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)
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{
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ASSERT ((Address & 7) == 0);
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return *(volatile UINT64*)Address;
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}
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/**
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Writes a 64-bit MMIO register.
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Writes the 64-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If 64-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT64
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EFIAPI
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MmioWrite64 (
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IN UINTN Address,
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IN UINT64 Value
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)
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{
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ASSERT ((Address & 7) == 0);
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return *(volatile UINT64*)Address = Value;
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}
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/**
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Reads an 8-bit I/O port.
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Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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IoRead8 (
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IN UINTN Port
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)
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{
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UINT8 Data;
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__asm {
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mov dx, word ptr [Port]
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in al, dx
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mov Data, al
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}
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return Data;
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}
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/**
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Writes an 8-bit I/O port.
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Writes the 8-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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|
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT8
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EFIAPI
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IoWrite8 (
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IN UINTN Port,
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IN UINT8 Value
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)
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{
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__asm {
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mov al, byte ptr [Value]
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mov dx, word ptr [Port]
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out dx, al
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}
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return Value;
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}
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/**
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Reads a 16-bit I/O port.
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|
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Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
|
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|
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If 16-bit I/O port operations are not supported, then ASSERT().
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|
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT16
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EFIAPI
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IoRead16 (
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IN UINTN Port
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||||
)
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{
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UINT16 Data;
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ASSERT ((Port & 1) == 0);
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__asm {
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mov dx, word ptr [Port]
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in ax, dx
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mov word ptr [Data], ax
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}
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return Data;
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}
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|
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/**
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Writes a 16-bit I/O port.
|
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|
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Writes the 16-bit I/O port specified by Port with the value specified by Value
|
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and returns Value. This function must guarantee that all I/O read and write
|
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operations are serialized.
|
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|
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If 16-bit I/O port operations are not supported, then ASSERT().
|
||||
|
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@param Port The I/O port to write.
|
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@param Value The value to write to the I/O port.
|
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|
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@return The value written the I/O port.
|
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|
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**/
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UINT16
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EFIAPI
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IoWrite16 (
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IN UINTN Port,
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IN UINT16 Value
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)
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{
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ASSERT ((Port & 1) == 0);
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__asm {
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mov ax, word ptr [Value]
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mov dx, word ptr [Port]
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out dx, ax
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}
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//
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// Never reached return statement.
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//
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return Value;
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}
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|
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/**
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Reads a 32-bit I/O port.
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||||
|
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Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
|
||||
This function must guarantee that all I/O read and write operations are
|
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serialized.
|
||||
|
||||
If 32-bit I/O port operations are not supported, then ASSERT().
|
||||
|
||||
@param Port The I/O port to read.
|
||||
|
||||
@return The value read.
|
||||
|
||||
**/
|
||||
UINT32
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||||
EFIAPI
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||||
IoRead32 (
|
||||
IN UINTN Port
|
||||
)
|
||||
{
|
||||
UINT32 Data;
|
||||
|
||||
ASSERT ((Port & 3) == 0);
|
||||
|
||||
__asm {
|
||||
mov dx, word ptr [Port]
|
||||
in eax, dx
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||||
mov dword ptr [Data], eax
|
||||
}
|
||||
|
||||
return Data;
|
||||
}
|
||||
|
||||
/**
|
||||
Writes a 32-bit I/O port.
|
||||
|
||||
Writes the 32-bit I/O port specified by Port with the value specified by Value
|
||||
and returns Value. This function must guarantee that all I/O read and write
|
||||
operations are serialized.
|
||||
|
||||
If 32-bit I/O port operations are not supported, then ASSERT().
|
||||
|
||||
@param Port The I/O port to write.
|
||||
@param Value The value to write to the I/O port.
|
||||
|
||||
@return The value written the I/O port.
|
||||
|
||||
**/
|
||||
UINT32
|
||||
EFIAPI
|
||||
IoWrite32 (
|
||||
IN UINTN Port,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
ASSERT ((Port & 3) == 0);
|
||||
|
||||
__asm {
|
||||
mov eax, dword ptr [Value]
|
||||
mov dx, word ptr [Port]
|
||||
out dx, eax
|
||||
}
|
||||
|
||||
return Value;
|
||||
}
|
||||
|
||||
@@ -91,7 +91,6 @@
|
||||
Ia32/WriteCr2.c | MSFT
|
||||
Ia32/WriteCr0.c | MSFT
|
||||
Ia32/WriteMsr64.c | MSFT
|
||||
Ia32/Thunk16.asm
|
||||
Ia32/SwapBytes64.c | MSFT
|
||||
Ia32/SetJump.c | MSFT
|
||||
Ia32/RRotU64.c | MSFT
|
||||
@@ -146,7 +145,6 @@
|
||||
Ia32/FxRestore.c | MSFT
|
||||
Ia32/FxSave.c | MSFT
|
||||
Ia32/FlushCacheLine.c | MSFT
|
||||
Ia32/EnablePaging64.asm
|
||||
Ia32/EnablePaging32.c | MSFT
|
||||
Ia32/EnableInterrupts.c | MSFT
|
||||
Ia32/EnableDisableInterrupts.c | MSFT
|
||||
@@ -162,6 +160,107 @@
|
||||
Ia32/CpuFlushTlb.c | MSFT
|
||||
Ia32/CpuBreakpoint.c | MSFT
|
||||
Ia32/ARShiftU64.c | MSFT
|
||||
SynchronizationMsc.c | MSFT
|
||||
|
||||
Ia32/Wbinvd.asm | INTEL
|
||||
Ia32/WriteMm7.asm | INTEL
|
||||
Ia32/WriteMm6.asm | INTEL
|
||||
Ia32/WriteMm5.asm | INTEL
|
||||
Ia32/WriteMm4.asm | INTEL
|
||||
Ia32/WriteMm3.asm | INTEL
|
||||
Ia32/WriteMm2.asm | INTEL
|
||||
Ia32/WriteMm1.asm | INTEL
|
||||
Ia32/WriteMm0.asm | INTEL
|
||||
Ia32/WriteLdtr.asm | INTEL
|
||||
Ia32/WriteIdtr.asm | INTEL
|
||||
Ia32/WriteGdtr.asm | INTEL
|
||||
Ia32/WriteDr7.asm | INTEL
|
||||
Ia32/WriteDr6.asm | INTEL
|
||||
Ia32/WriteDr5.asm | INTEL
|
||||
Ia32/WriteDr4.asm | INTEL
|
||||
Ia32/WriteDr3.asm | INTEL
|
||||
Ia32/WriteDr2.asm | INTEL
|
||||
Ia32/WriteDr1.asm | INTEL
|
||||
Ia32/WriteDr0.asm | INTEL
|
||||
Ia32/WriteCr4.asm | INTEL
|
||||
Ia32/WriteCr3.asm | INTEL
|
||||
Ia32/WriteCr2.asm | INTEL
|
||||
Ia32/WriteCr0.asm | INTEL
|
||||
Ia32/WriteMsr64.asm | INTEL
|
||||
Ia32/SwapBytes64.asm | INTEL
|
||||
Ia32/SetJump.asm | INTEL
|
||||
Ia32/RRotU64.asm | INTEL
|
||||
Ia32/RShiftU64.asm | INTEL
|
||||
Ia32/ReadPmc.asm | INTEL
|
||||
Ia32/ReadTsc.asm | INTEL
|
||||
Ia32/ReadLdtr.asm | INTEL
|
||||
Ia32/ReadIdtr.asm | INTEL
|
||||
Ia32/ReadGdtr.asm | INTEL
|
||||
Ia32/ReadTr.asm | INTEL
|
||||
Ia32/ReadSs.asm | INTEL
|
||||
Ia32/ReadGs.asm | INTEL
|
||||
Ia32/ReadFs.asm | INTEL
|
||||
Ia32/ReadEs.asm | INTEL
|
||||
Ia32/ReadDs.asm | INTEL
|
||||
Ia32/ReadCs.asm | INTEL
|
||||
Ia32/ReadMsr64.asm | INTEL
|
||||
Ia32/ReadMm7.asm | INTEL
|
||||
Ia32/ReadMm6.asm | INTEL
|
||||
Ia32/ReadMm5.asm | INTEL
|
||||
Ia32/ReadMm4.asm | INTEL
|
||||
Ia32/ReadMm3.asm | INTEL
|
||||
Ia32/ReadMm2.asm | INTEL
|
||||
Ia32/ReadMm1.asm | INTEL
|
||||
Ia32/ReadMm0.asm | INTEL
|
||||
Ia32/ReadEflags.asm | INTEL
|
||||
Ia32/ReadDr7.asm | INTEL
|
||||
Ia32/ReadDr6.asm | INTEL
|
||||
Ia32/ReadDr5.asm | INTEL
|
||||
Ia32/ReadDr4.asm | INTEL
|
||||
Ia32/ReadDr3.asm | INTEL
|
||||
Ia32/ReadDr2.asm | INTEL
|
||||
Ia32/ReadDr1.asm | INTEL
|
||||
Ia32/ReadDr0.asm | INTEL
|
||||
Ia32/ReadCr4.asm | INTEL
|
||||
Ia32/ReadCr3.asm | INTEL
|
||||
Ia32/ReadCr2.asm | INTEL
|
||||
Ia32/ReadCr0.asm | INTEL
|
||||
Ia32/Mwait.asm | INTEL
|
||||
Ia32/Monitor.asm | INTEL
|
||||
Ia32/ModU64x32.asm | INTEL
|
||||
Ia32/MultU64x64.asm | INTEL
|
||||
Ia32/MultU64x32.asm | INTEL
|
||||
Ia32/LShiftU64.asm | INTEL
|
||||
Ia32/LRotU64.asm | INTEL
|
||||
Ia32/LongJump.asm | INTEL
|
||||
Ia32/Invd.asm | INTEL
|
||||
Ia32/InterlockedCompareExchange64.asm | INTEL
|
||||
Ia32/InterlockedCompareExchange32.asm | INTEL
|
||||
Ia32/InterlockedDecrement.asm | INTEL
|
||||
Ia32/InterlockedIncrement.asm | INTEL
|
||||
Ia32/FxRestore.asm | INTEL
|
||||
Ia32/FxSave.asm | INTEL
|
||||
Ia32/FlushCacheLine.asm | INTEL
|
||||
Ia32/EnablePaging32.asm | INTEL
|
||||
Ia32/EnableInterrupts.asm | INTEL
|
||||
Ia32/EnableDisableInterrupts.asm | INTEL
|
||||
Ia32/DivU64x64Remainder.asm | INTEL
|
||||
Ia32/DivU64x32Remainder.asm | INTEL
|
||||
Ia32/DivU64x32.asm | INTEL
|
||||
Ia32/DisablePaging32.asm | INTEL
|
||||
Ia32/DisableInterrupts.asm | INTEL
|
||||
Ia32/CpuPause.asm | INTEL
|
||||
Ia32/CpuIdEx.asm | INTEL
|
||||
Ia32/CpuId.asm | INTEL
|
||||
Ia32/CpuSleep.asm | INTEL
|
||||
Ia32/CpuFlushTlb.asm | INTEL
|
||||
Ia32/CpuBreakpoint.asm | INTEL
|
||||
Ia32/ARShiftU64.asm | INTEL
|
||||
Synchronization.c | INTEL
|
||||
|
||||
Ia32/Thunk16.asm
|
||||
Ia32/EnablePaging64.asm
|
||||
|
||||
Ia32/Thunk16.S | GCC
|
||||
Ia32/CpuFlushTlb.S | GCC
|
||||
Ia32/CpuBreakpoint.S | GCC
|
||||
@@ -258,6 +357,8 @@
|
||||
Ia32/ARShiftU64.S | GCC
|
||||
Ia32/RShiftU64.S | GCC
|
||||
Ia32/LShiftU64.S | GCC
|
||||
SynchronizationGcc.c | GCC
|
||||
|
||||
Ia32/DivS64x64Remainder.c
|
||||
Ia32/InternalSwitchStack.c
|
||||
Ia32/Non-existing.c
|
||||
@@ -276,23 +377,15 @@
|
||||
x86EnablePaging32.c
|
||||
x86DisablePaging64.c
|
||||
x86DisablePaging32.c
|
||||
Synchronization.c | INTEL
|
||||
SynchronizationMsc.c | MSFT
|
||||
SynchronizationGcc.c | GCC
|
||||
|
||||
[Sources.X64]
|
||||
X64/Thunk16.asm
|
||||
X64/CpuFlushTlb.asm
|
||||
X64/CpuBreakpoint.c | MSFT
|
||||
X64/CpuPause.asm
|
||||
X64/CpuSleep.asm
|
||||
X64/EnableDisableInterrupts.asm
|
||||
X64/DisableInterrupts.asm
|
||||
X64/EnableInterrupts.asm
|
||||
X64/InterlockedCompareExchange64.asm | MSFT
|
||||
X64/InterlockedCompareExchange32.asm | MSFT
|
||||
X64/InterlockedDecrement.c | MSFT
|
||||
X64/InterlockedIncrement.c | MSFT
|
||||
X64/FlushCacheLine.asm
|
||||
X64/Invd.asm
|
||||
X64/Wbinvd.asm
|
||||
@@ -357,14 +450,29 @@
|
||||
X64/ReadCr3.asm
|
||||
X64/ReadCr2.asm
|
||||
X64/ReadCr0.asm
|
||||
X64/WriteMsr64.c | MSFT
|
||||
X64/ReadMsr64.c | MSFT
|
||||
X64/ReadEflags.asm
|
||||
X64/CpuIdEx.asm
|
||||
X64/CpuId.asm
|
||||
X64/LongJump.asm
|
||||
X64/SetJump.asm
|
||||
X64/SwitchStack.asm
|
||||
X64/InterlockedCompareExchange64.asm
|
||||
X64/InterlockedCompareExchange32.asm
|
||||
|
||||
X64/InterlockedDecrement.c | MSFT
|
||||
X64/InterlockedIncrement.c | MSFT
|
||||
X64/CpuBreakpoint.c | MSFT
|
||||
X64/WriteMsr64.c | MSFT
|
||||
X64/ReadMsr64.c | MSFT
|
||||
SynchronizationMsc.c | MSFT
|
||||
|
||||
X64/InterlockedDecrement.asm | INTEL
|
||||
X64/InterlockedIncrement.asm | INTEL
|
||||
X64/CpuBreakpoint.asm | INTEL
|
||||
X64/WriteMsr64.asm | INTEL
|
||||
X64/ReadMsr64.asm | INTEL
|
||||
Synchronization.c | INTEL
|
||||
|
||||
X64/Non-existing.c
|
||||
Math64.c
|
||||
Unaligned.c
|
||||
@@ -466,8 +574,6 @@
|
||||
X64/CpuIdEx.S | GCC
|
||||
X64/CpuFlushTlb.S | GCC
|
||||
X64/CpuBreakpoint.S | GCC
|
||||
Synchronization.c | INTEL
|
||||
SynchronizationMsc.c | MSFT
|
||||
SynchronizationGcc.c | GCC
|
||||
|
||||
[Sources.IPF]
|
||||
|
||||
@@ -80,11 +80,21 @@ CompareGuid (
|
||||
IN CONST GUID *Guid2
|
||||
)
|
||||
{
|
||||
return (BOOLEAN)(
|
||||
ReadUnaligned64 ((CONST UINT64*)Guid1)
|
||||
== ReadUnaligned64 ((CONST UINT64*)Guid2) &&
|
||||
ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
|
||||
== ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
|
||||
UINT64 Guid1ValueLo;
|
||||
UINT64 Guid1ValueHi;
|
||||
UINT64 Guid2ValueLo;
|
||||
UINT64 Guid2ValueHi;
|
||||
|
||||
Guid1ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid1);
|
||||
Guid2ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid2);
|
||||
|
||||
Guid1ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid1 + 1);
|
||||
Guid2ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid2 + 1);
|
||||
|
||||
|
||||
return (BOOLEAN)
|
||||
((Guid1ValueLo == Guid2ValueLo) &&
|
||||
(Guid1ValueHi == Guid2ValueHi)
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
@@ -80,11 +80,21 @@ CompareGuid (
|
||||
IN CONST GUID *Guid2
|
||||
)
|
||||
{
|
||||
return (BOOLEAN)(
|
||||
ReadUnaligned64 ((CONST UINT64*)Guid1)
|
||||
== ReadUnaligned64 ((CONST UINT64*)Guid2) &&
|
||||
ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
|
||||
== ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
|
||||
UINT64 Guid1ValueLo;
|
||||
UINT64 Guid1ValueHi;
|
||||
UINT64 Guid2ValueLo;
|
||||
UINT64 Guid2ValueHi;
|
||||
|
||||
Guid1ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid1);
|
||||
Guid2ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid2);
|
||||
|
||||
Guid1ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid1 + 1);
|
||||
Guid2ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid2 + 1);
|
||||
|
||||
|
||||
return (BOOLEAN)
|
||||
((Guid1ValueLo == Guid2ValueLo) &&
|
||||
(Guid1ValueHi == Guid2ValueHi)
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user