Update Mde/MdeModulePkg to support ICC build for IA32/X64.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3892 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
yshang1
2007-09-19 06:15:43 +00:00
parent d940d5e59f
commit d074a8e1a2
12 changed files with 572 additions and 42 deletions

View File

@ -233,7 +233,7 @@ UsbHcAllocMemFromBlock (
for (Count = 0; Count < Units; Count++) { for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit)); ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
Block->Bits[Byte] |= USB_HC_BIT (Bit); Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit); NEXT_BIT (Byte, Bit);
} }

View File

@ -232,7 +232,7 @@ UsbHcAllocMemFromBlock (
for (Count = 0; Count < Units; Count++) { for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit)); ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
Block->Bits[Byte] |= USB_HC_BIT (Bit); Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit); NEXT_BIT (Byte, Bit);
} }

View File

@ -82,7 +82,7 @@ EFI_STATUS
EFIAPI EFIAPI
PeiCore ( PeiCore (
IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,
IN CONST EFI_PEI_PPI_DESCRIPTOR *PpList, IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList,
IN VOID *Data IN VOID *Data
) )
/*++ /*++
@ -219,8 +219,8 @@ Returns:
// //
// If SEC provided any PPI services to PEI, install them. // If SEC provided any PPI services to PEI, install them.
// //
if (PpList != NULL) { if (PpiList != NULL) {
Status = PeiServicesInstallPpi (PpList); Status = PeiServicesInstallPpi (PpiList);
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
} }
} }

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@ -33,7 +33,6 @@ STATIC EFI_EVENT mSetVirtualMapChangedEvent = NULL;
// //
STATIC FVB_ENTRY *mFvbEntry; STATIC FVB_ENTRY *mFvbEntry;
STATIC EFI_EVENT mFvbRegistration; STATIC EFI_EVENT mFvbRegistration;
STATIC BOOLEAN mEfiFvbInitialized = FALSE;
STATIC UINTN mFvbCount; STATIC UINTN mFvbCount;
/** /**
@ -320,8 +319,6 @@ FvbLibInitialize (
); );
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
mEfiFvbInitialized = TRUE;
return EFI_SUCCESS; return EFI_SUCCESS;
} }

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@ -32,7 +32,6 @@ STATIC EFI_EVENT mSetVirtualMapChangedEvent = NULL;
// //
STATIC FVB_ENTRY *mFvbEntry; STATIC FVB_ENTRY *mFvbEntry;
STATIC EFI_EVENT mFvbRegistration; STATIC EFI_EVENT mFvbRegistration;
STATIC BOOLEAN mEfiFvbInitialized = FALSE;
STATIC UINTN mFvbCount; STATIC UINTN mFvbCount;
/** /**
@ -319,8 +318,6 @@ FvbLibInitialize (
); );
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
mEfiFvbInitialized = TRUE;
return EFI_SUCCESS; return EFI_SUCCESS;
} }

View File

@ -812,7 +812,7 @@ ConvertFromTextVendor (
Vendor = (VENDOR_DEVICE_PATH *) CreateDeviceNode ( Vendor = (VENDOR_DEVICE_PATH *) CreateDeviceNode (
Type, Type,
SubType, SubType,
sizeof (VENDOR_DEVICE_PATH) + (UINT16) Length (UINT16) (sizeof (VENDOR_DEVICE_PATH) + Length)
); );
StrToGuid (GuidStr, &Vendor->Guid); StrToGuid (GuidStr, &Vendor->Guid);
@ -1016,7 +1016,7 @@ DevPathFromTextAcpiExp (
HIDStr = GetNextParamStr (&TextDeviceNode); HIDStr = GetNextParamStr (&TextDeviceNode);
CIDStr = GetNextParamStr (&TextDeviceNode); CIDStr = GetNextParamStr (&TextDeviceNode);
UIDSTRStr = GetNextParamStr (&TextDeviceNode); UIDSTRStr = GetNextParamStr (&TextDeviceNode);
Length = sizeof (ACPI_EXTENDED_HID_DEVICE_PATH) + (UINT16) StrLen (UIDSTRStr) + 3; Length = (UINT16) (sizeof (ACPI_EXTENDED_HID_DEVICE_PATH) + StrLen (UIDSTRStr) + 3);
AcpiExt = (ACPI_EXTENDED_HID_DEVICE_PATH_WITH_STR *) CreateDeviceNode ( AcpiExt = (ACPI_EXTENDED_HID_DEVICE_PATH_WITH_STR *) CreateDeviceNode (
ACPI_DEVICE_PATH, ACPI_DEVICE_PATH,
ACPI_EXTENDED_DP, ACPI_EXTENDED_DP,
@ -1382,7 +1382,7 @@ DevPathFromTextSAS (
Info |= 0x0001; Info |= 0x0001;
} else { } else {
Info |= 0x0002; Info |= 0x0002;
Info |= (Xtoi (DriveBayStr) << 8); Info = (UINT16) (Info | (Xtoi (DriveBayStr) << 8));
} }
if (StrCmp (SASSATAStr, L"SATA") == 0) { if (StrCmp (SASSATAStr, L"SATA") == 0) {
@ -1954,7 +1954,7 @@ DevPathFromTextiSCSI (
iSCSI = (ISCSI_DEVICE_PATH_WITH_NAME *) CreateDeviceNode ( iSCSI = (ISCSI_DEVICE_PATH_WITH_NAME *) CreateDeviceNode (
MESSAGING_DEVICE_PATH, MESSAGING_DEVICE_PATH,
MSG_ISCSI_DP, MSG_ISCSI_DP,
sizeof (ISCSI_DEVICE_PATH_WITH_NAME) + (UINT16) (StrLen (NameStr) * 2) (UINT16) (sizeof (ISCSI_DEVICE_PATH_WITH_NAME) + StrLen (NameStr) * 2)
); );
StrCpy (iSCSI->iSCSITargetName, NameStr); StrCpy (iSCSI->iSCSITargetName, NameStr);
@ -2093,7 +2093,7 @@ DevPathFromTextFilePath (
File = (FILEPATH_DEVICE_PATH *) CreateDeviceNode ( File = (FILEPATH_DEVICE_PATH *) CreateDeviceNode (
MEDIA_DEVICE_PATH, MEDIA_DEVICE_PATH,
MEDIA_FILEPATH_DP, MEDIA_FILEPATH_DP,
sizeof (FILEPATH_DEVICE_PATH) + (UINT16) (StrLen (TextDeviceNode) * 2) (UINT16) (sizeof (FILEPATH_DEVICE_PATH) + StrLen (TextDeviceNode) * 2)
); );
StrCpy (File->PathName, TextDeviceNode); StrCpy (File->PathName, TextDeviceNode);
@ -2140,7 +2140,7 @@ DevPathFromTextBBS (
Bbs = (BBS_BBS_DEVICE_PATH *) CreateDeviceNode ( Bbs = (BBS_BBS_DEVICE_PATH *) CreateDeviceNode (
BBS_DEVICE_PATH, BBS_DEVICE_PATH,
BBS_BBS_DP, BBS_BBS_DP,
sizeof (BBS_BBS_DEVICE_PATH) + (UINT16) (StrLen (IdStr)) (UINT16) (sizeof (BBS_BBS_DEVICE_PATH) + StrLen (IdStr))
); );
if (StrCmp (TypeStr, L"Floppy") == 0) { if (StrCmp (TypeStr, L"Floppy") == 0) {

View File

@ -249,7 +249,7 @@ TcpParseOption (
Option->Flag = 0; Option->Flag = 0;
TotalLen = (Tcp->HeadLen << 2) - sizeof (TCP_HEAD); TotalLen = (UINT8) ((Tcp->HeadLen << 2) - sizeof (TCP_HEAD));
if (TotalLen <= 0) { if (TotalLen <= 0) {
return 0; return 0;
} }

View File

@ -38,12 +38,14 @@
IoHighLevel.c IoHighLevel.c
IoLibGcc.c | GCC IoLibGcc.c | GCC
IoLibMsc.c | MSFT IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c IoLib.c
[Sources.X64] [Sources.X64]
IoHighLevel.c IoHighLevel.c
IoLibGcc.c | GCC IoLibGcc.c | GCC
IoLibMsc.c | MSFT IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c IoLib.c
[Sources.IPF] [Sources.IPF]

View File

@ -0,0 +1,408 @@
/** @file
I/O Library. This file has compiler specifics for ICC as there
is no ANSI C standard for doing IO.
Copyright (c) 2006 - 2007, Intel Corporation<BR> All rights
reserved. This program and the accompanying materials are
licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
//
// Include common header file for this module.
//
#include "BaseIoLibIntrinsicInternal.h"
/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT8
EFIAPI
MmioRead8 (
IN UINTN Address
)
{
return *(volatile UINT8*)Address;
}
/**
Writes an 8-bit MMIO register.
Writes the 8-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT8
EFIAPI
MmioWrite8 (
IN UINTN Address,
IN UINT8 Value
)
{
return *(volatile UINT8*)Address = Value;
}
/**
Reads a 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT16
EFIAPI
MmioRead16 (
IN UINTN Address
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address;
}
/**
Writes a 16-bit MMIO register.
Writes the 16-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT16
EFIAPI
MmioWrite16 (
IN UINTN Address,
IN UINT16 Value
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address = Value;
}
/**
Reads a 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT32
EFIAPI
MmioRead32 (
IN UINTN Address
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address;
}
/**
Writes a 32-bit MMIO register.
Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT32
EFIAPI
MmioWrite32 (
IN UINTN Address,
IN UINT32 Value
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address = Value;
}
/**
Reads a 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT64
EFIAPI
MmioRead64 (
IN UINTN Address
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address;
}
/**
Writes a 64-bit MMIO register.
Writes the 64-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT64
EFIAPI
MmioWrite64 (
IN UINTN Address,
IN UINT64 Value
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address = Value;
}
/**
Reads an 8-bit I/O port.
Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
If 8-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
UINT8
EFIAPI
IoRead8 (
IN UINTN Port
)
{
UINT8 Data;
__asm {
mov dx, word ptr [Port]
in al, dx
mov Data, al
}
return Data;
}
/**
Writes an 8-bit I/O port.
Writes the 8-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
If 8-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT8
EFIAPI
IoWrite8 (
IN UINTN Port,
IN UINT8 Value
)
{
__asm {
mov al, byte ptr [Value]
mov dx, word ptr [Port]
out dx, al
}
return Value;
}
/**
Reads a 16-bit I/O port.
Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
UINT16
EFIAPI
IoRead16 (
IN UINTN Port
)
{
UINT16 Data;
ASSERT ((Port & 1) == 0);
__asm {
mov dx, word ptr [Port]
in ax, dx
mov word ptr [Data], ax
}
return Data;
}
/**
Writes a 16-bit I/O port.
Writes the 16-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
If 16-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT16
EFIAPI
IoWrite16 (
IN UINTN Port,
IN UINT16 Value
)
{
ASSERT ((Port & 1) == 0);
__asm {
mov ax, word ptr [Value]
mov dx, word ptr [Port]
out dx, ax
}
//
// Never reached return statement.
//
return Value;
}
/**
Reads a 32-bit I/O port.
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
This function must guarantee that all I/O read and write operations are
serialized.
If 32-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to read.
@return The value read.
**/
UINT32
EFIAPI
IoRead32 (
IN UINTN Port
)
{
UINT32 Data;
ASSERT ((Port & 3) == 0);
__asm {
mov dx, word ptr [Port]
in eax, dx
mov dword ptr [Data], eax
}
return Data;
}
/**
Writes a 32-bit I/O port.
Writes the 32-bit I/O port specified by Port with the value specified by Value
and returns Value. This function must guarantee that all I/O read and write
operations are serialized.
If 32-bit I/O port operations are not supported, then ASSERT().
@param Port The I/O port to write.
@param Value The value to write to the I/O port.
@return The value written the I/O port.
**/
UINT32
EFIAPI
IoWrite32 (
IN UINTN Port,
IN UINT32 Value
)
{
ASSERT ((Port & 3) == 0);
__asm {
mov eax, dword ptr [Value]
mov dx, word ptr [Port]
out dx, eax
}
return Value;
}

View File

@ -91,7 +91,6 @@
Ia32/WriteCr2.c | MSFT Ia32/WriteCr2.c | MSFT
Ia32/WriteCr0.c | MSFT Ia32/WriteCr0.c | MSFT
Ia32/WriteMsr64.c | MSFT Ia32/WriteMsr64.c | MSFT
Ia32/Thunk16.asm
Ia32/SwapBytes64.c | MSFT Ia32/SwapBytes64.c | MSFT
Ia32/SetJump.c | MSFT Ia32/SetJump.c | MSFT
Ia32/RRotU64.c | MSFT Ia32/RRotU64.c | MSFT
@ -146,7 +145,6 @@
Ia32/FxRestore.c | MSFT Ia32/FxRestore.c | MSFT
Ia32/FxSave.c | MSFT Ia32/FxSave.c | MSFT
Ia32/FlushCacheLine.c | MSFT Ia32/FlushCacheLine.c | MSFT
Ia32/EnablePaging64.asm
Ia32/EnablePaging32.c | MSFT Ia32/EnablePaging32.c | MSFT
Ia32/EnableInterrupts.c | MSFT Ia32/EnableInterrupts.c | MSFT
Ia32/EnableDisableInterrupts.c | MSFT Ia32/EnableDisableInterrupts.c | MSFT
@ -162,6 +160,107 @@
Ia32/CpuFlushTlb.c | MSFT Ia32/CpuFlushTlb.c | MSFT
Ia32/CpuBreakpoint.c | MSFT Ia32/CpuBreakpoint.c | MSFT
Ia32/ARShiftU64.c | MSFT Ia32/ARShiftU64.c | MSFT
SynchronizationMsc.c | MSFT
Ia32/Wbinvd.asm | INTEL
Ia32/WriteMm7.asm | INTEL
Ia32/WriteMm6.asm | INTEL
Ia32/WriteMm5.asm | INTEL
Ia32/WriteMm4.asm | INTEL
Ia32/WriteMm3.asm | INTEL
Ia32/WriteMm2.asm | INTEL
Ia32/WriteMm1.asm | INTEL
Ia32/WriteMm0.asm | INTEL
Ia32/WriteLdtr.asm | INTEL
Ia32/WriteIdtr.asm | INTEL
Ia32/WriteGdtr.asm | INTEL
Ia32/WriteDr7.asm | INTEL
Ia32/WriteDr6.asm | INTEL
Ia32/WriteDr5.asm | INTEL
Ia32/WriteDr4.asm | INTEL
Ia32/WriteDr3.asm | INTEL
Ia32/WriteDr2.asm | INTEL
Ia32/WriteDr1.asm | INTEL
Ia32/WriteDr0.asm | INTEL
Ia32/WriteCr4.asm | INTEL
Ia32/WriteCr3.asm | INTEL
Ia32/WriteCr2.asm | INTEL
Ia32/WriteCr0.asm | INTEL
Ia32/WriteMsr64.asm | INTEL
Ia32/SwapBytes64.asm | INTEL
Ia32/SetJump.asm | INTEL
Ia32/RRotU64.asm | INTEL
Ia32/RShiftU64.asm | INTEL
Ia32/ReadPmc.asm | INTEL
Ia32/ReadTsc.asm | INTEL
Ia32/ReadLdtr.asm | INTEL
Ia32/ReadIdtr.asm | INTEL
Ia32/ReadGdtr.asm | INTEL
Ia32/ReadTr.asm | INTEL
Ia32/ReadSs.asm | INTEL
Ia32/ReadGs.asm | INTEL
Ia32/ReadFs.asm | INTEL
Ia32/ReadEs.asm | INTEL
Ia32/ReadDs.asm | INTEL
Ia32/ReadCs.asm | INTEL
Ia32/ReadMsr64.asm | INTEL
Ia32/ReadMm7.asm | INTEL
Ia32/ReadMm6.asm | INTEL
Ia32/ReadMm5.asm | INTEL
Ia32/ReadMm4.asm | INTEL
Ia32/ReadMm3.asm | INTEL
Ia32/ReadMm2.asm | INTEL
Ia32/ReadMm1.asm | INTEL
Ia32/ReadMm0.asm | INTEL
Ia32/ReadEflags.asm | INTEL
Ia32/ReadDr7.asm | INTEL
Ia32/ReadDr6.asm | INTEL
Ia32/ReadDr5.asm | INTEL
Ia32/ReadDr4.asm | INTEL
Ia32/ReadDr3.asm | INTEL
Ia32/ReadDr2.asm | INTEL
Ia32/ReadDr1.asm | INTEL
Ia32/ReadDr0.asm | INTEL
Ia32/ReadCr4.asm | INTEL
Ia32/ReadCr3.asm | INTEL
Ia32/ReadCr2.asm | INTEL
Ia32/ReadCr0.asm | INTEL
Ia32/Mwait.asm | INTEL
Ia32/Monitor.asm | INTEL
Ia32/ModU64x32.asm | INTEL
Ia32/MultU64x64.asm | INTEL
Ia32/MultU64x32.asm | INTEL
Ia32/LShiftU64.asm | INTEL
Ia32/LRotU64.asm | INTEL
Ia32/LongJump.asm | INTEL
Ia32/Invd.asm | INTEL
Ia32/InterlockedCompareExchange64.asm | INTEL
Ia32/InterlockedCompareExchange32.asm | INTEL
Ia32/InterlockedDecrement.asm | INTEL
Ia32/InterlockedIncrement.asm | INTEL
Ia32/FxRestore.asm | INTEL
Ia32/FxSave.asm | INTEL
Ia32/FlushCacheLine.asm | INTEL
Ia32/EnablePaging32.asm | INTEL
Ia32/EnableInterrupts.asm | INTEL
Ia32/EnableDisableInterrupts.asm | INTEL
Ia32/DivU64x64Remainder.asm | INTEL
Ia32/DivU64x32Remainder.asm | INTEL
Ia32/DivU64x32.asm | INTEL
Ia32/DisablePaging32.asm | INTEL
Ia32/DisableInterrupts.asm | INTEL
Ia32/CpuPause.asm | INTEL
Ia32/CpuIdEx.asm | INTEL
Ia32/CpuId.asm | INTEL
Ia32/CpuSleep.asm | INTEL
Ia32/CpuFlushTlb.asm | INTEL
Ia32/CpuBreakpoint.asm | INTEL
Ia32/ARShiftU64.asm | INTEL
Synchronization.c | INTEL
Ia32/Thunk16.asm
Ia32/EnablePaging64.asm
Ia32/Thunk16.S | GCC Ia32/Thunk16.S | GCC
Ia32/CpuFlushTlb.S | GCC Ia32/CpuFlushTlb.S | GCC
Ia32/CpuBreakpoint.S | GCC Ia32/CpuBreakpoint.S | GCC
@ -258,6 +357,8 @@
Ia32/ARShiftU64.S | GCC Ia32/ARShiftU64.S | GCC
Ia32/RShiftU64.S | GCC Ia32/RShiftU64.S | GCC
Ia32/LShiftU64.S | GCC Ia32/LShiftU64.S | GCC
SynchronizationGcc.c | GCC
Ia32/DivS64x64Remainder.c Ia32/DivS64x64Remainder.c
Ia32/InternalSwitchStack.c Ia32/InternalSwitchStack.c
Ia32/Non-existing.c Ia32/Non-existing.c
@ -276,23 +377,15 @@
x86EnablePaging32.c x86EnablePaging32.c
x86DisablePaging64.c x86DisablePaging64.c
x86DisablePaging32.c x86DisablePaging32.c
Synchronization.c | INTEL
SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC
[Sources.X64] [Sources.X64]
X64/Thunk16.asm X64/Thunk16.asm
X64/CpuFlushTlb.asm X64/CpuFlushTlb.asm
X64/CpuBreakpoint.c | MSFT
X64/CpuPause.asm X64/CpuPause.asm
X64/CpuSleep.asm X64/CpuSleep.asm
X64/EnableDisableInterrupts.asm X64/EnableDisableInterrupts.asm
X64/DisableInterrupts.asm X64/DisableInterrupts.asm
X64/EnableInterrupts.asm X64/EnableInterrupts.asm
X64/InterlockedCompareExchange64.asm | MSFT
X64/InterlockedCompareExchange32.asm | MSFT
X64/InterlockedDecrement.c | MSFT
X64/InterlockedIncrement.c | MSFT
X64/FlushCacheLine.asm X64/FlushCacheLine.asm
X64/Invd.asm X64/Invd.asm
X64/Wbinvd.asm X64/Wbinvd.asm
@ -357,14 +450,29 @@
X64/ReadCr3.asm X64/ReadCr3.asm
X64/ReadCr2.asm X64/ReadCr2.asm
X64/ReadCr0.asm X64/ReadCr0.asm
X64/WriteMsr64.c | MSFT
X64/ReadMsr64.c | MSFT
X64/ReadEflags.asm X64/ReadEflags.asm
X64/CpuIdEx.asm X64/CpuIdEx.asm
X64/CpuId.asm X64/CpuId.asm
X64/LongJump.asm X64/LongJump.asm
X64/SetJump.asm X64/SetJump.asm
X64/SwitchStack.asm X64/SwitchStack.asm
X64/InterlockedCompareExchange64.asm
X64/InterlockedCompareExchange32.asm
X64/InterlockedDecrement.c | MSFT
X64/InterlockedIncrement.c | MSFT
X64/CpuBreakpoint.c | MSFT
X64/WriteMsr64.c | MSFT
X64/ReadMsr64.c | MSFT
SynchronizationMsc.c | MSFT
X64/InterlockedDecrement.asm | INTEL
X64/InterlockedIncrement.asm | INTEL
X64/CpuBreakpoint.asm | INTEL
X64/WriteMsr64.asm | INTEL
X64/ReadMsr64.asm | INTEL
Synchronization.c | INTEL
X64/Non-existing.c X64/Non-existing.c
Math64.c Math64.c
Unaligned.c Unaligned.c
@ -466,8 +574,6 @@
X64/CpuIdEx.S | GCC X64/CpuIdEx.S | GCC
X64/CpuFlushTlb.S | GCC X64/CpuFlushTlb.S | GCC
X64/CpuBreakpoint.S | GCC X64/CpuBreakpoint.S | GCC
Synchronization.c | INTEL
SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC SynchronizationGcc.c | GCC
[Sources.IPF] [Sources.IPF]

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@ -80,11 +80,21 @@ CompareGuid (
IN CONST GUID *Guid2 IN CONST GUID *Guid2
) )
{ {
return (BOOLEAN)( UINT64 Guid1ValueLo;
ReadUnaligned64 ((CONST UINT64*)Guid1) UINT64 Guid1ValueHi;
== ReadUnaligned64 ((CONST UINT64*)Guid2) && UINT64 Guid2ValueLo;
ReadUnaligned64 ((CONST UINT64*)Guid1 + 1) UINT64 Guid2ValueHi;
== ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
Guid1ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid1);
Guid2ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid2);
Guid1ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid1 + 1);
Guid2ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid2 + 1);
return (BOOLEAN)
((Guid1ValueLo == Guid2ValueLo) &&
(Guid1ValueHi == Guid2ValueHi)
); );
} }

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@ -80,11 +80,21 @@ CompareGuid (
IN CONST GUID *Guid2 IN CONST GUID *Guid2
) )
{ {
return (BOOLEAN)( UINT64 Guid1ValueLo;
ReadUnaligned64 ((CONST UINT64*)Guid1) UINT64 Guid1ValueHi;
== ReadUnaligned64 ((CONST UINT64*)Guid2) && UINT64 Guid2ValueLo;
ReadUnaligned64 ((CONST UINT64*)Guid1 + 1) UINT64 Guid2ValueHi;
== ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
Guid1ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid1);
Guid2ValueLo = ReadUnaligned64 ((CONST UINT64*)Guid2);
Guid1ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid1 + 1);
Guid2ValueHi = ReadUnaligned64 ((CONST UINT64*)Guid2 + 1);
return (BOOLEAN)
((Guid1ValueLo == Guid2ValueLo) &&
(Guid1ValueHi == Guid2ValueHi)
); );
} }