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MdeModulePkg: Clean up source files

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1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Liming Gao
2018-06-27 21:08:52 +08:00
parent ca79bab7af
commit d1102dba72
1010 changed files with 13588 additions and 13588 deletions
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40
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
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@ -2,7 +2,7 @@
XHCI transfer scheduling routines.
Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -201,7 +201,7 @@ XhcFreeUrb (
if ((Xhc == NULL) || (Urb == NULL)) {
return;
}
if (Urb->DataMap != NULL) {
Xhc->PciIo->Unmap (Xhc->PciIo, Urb->DataMap);
}
@ -269,15 +269,15 @@ XhcCreateTransferTrb (
} else {
MapOp = EfiPciIoOperationBusMasterRead;
}
Len = Urb->DataLen;
Status = Xhc->PciIo->Map (Xhc->PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
DEBUG ((EFI_D_ERROR, "XhcCreateTransferTrb: Fail to map Urb->Data.\n"));
return EFI_OUT_OF_RESOURCES;
}
Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
Urb->DataMap = Map;
}
@ -469,7 +469,7 @@ XhcInitSched (
VOID *Dcbaa;
EFI_PHYSICAL_ADDRESS DcbaaPhy;
UINT64 CmdRing;
EFI_PHYSICAL_ADDRESS CmdRingPhy;
EFI_PHYSICAL_ADDRESS CmdRingPhy;
UINTN Entries;
UINT32 MaxScratchpadBufs;
UINT64 *ScratchBuf;
@ -520,7 +520,7 @@ XhcInitSched (
ScratchEntryMap = AllocateZeroPool (sizeof (UINTN) * MaxScratchpadBufs);
ASSERT (ScratchEntryMap != NULL);
Xhc->ScratchEntryMap = ScratchEntryMap;
//
// Allocate the buffer to record the host address for each entry
//
@ -533,7 +533,7 @@ XhcInitSched (
Xhc->PciIo,
EFI_SIZE_TO_PAGES (MaxScratchpadBufs * sizeof (UINT64)),
Xhc->PageSize,
(VOID **) &ScratchBuf,
(VOID **) &ScratchBuf,
&ScratchPhy,
&Xhc->ScratchMap
);
@ -659,7 +659,7 @@ XhcRecoverHaltedEndpoint (
}
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
DEBUG ((EFI_D_INFO, "Recovery Halted Slot = %x,Dci = %x\n", SlotId, Dci));
//
@ -721,7 +721,7 @@ XhcDequeueTrbFromEndpoint (
}
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
DEBUG ((EFI_D_INFO, "Stop Slot = %x,Dci = %x\n", SlotId, Dci));
//
@ -792,9 +792,9 @@ CreateEventRing (
EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
EventRing->EventRingDequeue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
EventRing->EventRingEnqueue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
DequeuePhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, Size);
//
// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
// and toggling it every time the Event Ring Dequeue Pointer wraps back to the beginning of the Event Ring.
@ -953,7 +953,7 @@ XhcFreeSched (
{
UINT32 Index;
UINT64 *ScratchEntry;
if (Xhc->ScratchBuf != NULL) {
ScratchEntry = Xhc->ScratchEntry;
for (Index = 0; Index < Xhc->MaxScratchpadBufs; Index++) {
@ -974,14 +974,14 @@ XhcFreeSched (
UsbHcFreeMem (Xhc->MemPool, Xhc->CmdRing.RingSeg0, sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER);
Xhc->CmdRing.RingSeg0 = NULL;
}
XhcFreeEventRing (Xhc,&Xhc->EventRing);
if (Xhc->DCBAA != NULL) {
UsbHcFreeMem (Xhc->MemPool, Xhc->DCBAA, (Xhc->MaxSlotsEn + 1) * sizeof(UINT64));
Xhc->DCBAA = NULL;
}
//
// Free memory pool at last
//
@ -1132,7 +1132,7 @@ XhcCheckUrbResult (
if ((EvtTrb->Type != TRB_TYPE_COMMAND_COMPLT_EVENT) && (EvtTrb->Type != TRB_TYPE_TRANS_EVENT)) {
continue;
}
//
// Need convert pci device address to host address
//
@ -1149,12 +1149,12 @@ XhcCheckUrbResult (
CheckedUrb = Xhc->PendingUrb;
} else if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {
CheckedUrb = Urb;
} else if (IsAsyncIntTrb (Xhc, TRBPtr, &AsyncUrb)) {
} else if (IsAsyncIntTrb (Xhc, TRBPtr, &AsyncUrb)) {
CheckedUrb = AsyncUrb;
} else {
continue;
}
switch (EvtTrb->Completecode) {
case TRB_COMPLETION_STALL_ERROR:
CheckedUrb->Result |= EFI_USB_ERR_STALL;
@ -1676,7 +1676,7 @@ XhcPollPortStatusChange (
Status = XhcInitializeDeviceSlot64 (Xhc, ParentRouteChart, Port, RouteChart, Speed);
}
}
}
}
return Status;
}
@ -3144,7 +3144,7 @@ XhcSetConfigCmd64 (
if (Dci > MaxDci) {
MaxDci = Dci;
}
IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}