MdeModulePkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
@ -1,7 +1,7 @@
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/** @file
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x64-specifc functionality for DxeLoad.
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -97,7 +97,7 @@ HandOffToDxeCore (
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ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
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ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
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}
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//
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// End of PEI phase signal
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//
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@ -110,7 +110,7 @@ HandOffToDxeCore (
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//
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// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
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//
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//
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UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
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//
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@ -1,9 +1,9 @@
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/** @file
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x64 Virtual Memory Management Services in the form of an IA-32 driver.
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x64 Virtual Memory Management Services in the form of an IA-32 driver.
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Used to establish a 1:1 Virtual to Physical Mapping that is required to
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enter Long Mode (x64 64-bit mode).
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While we make a 1:1 mapping (identity mapping) for all physical pages
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While we make a 1:1 mapping (identity mapping) for all physical pages
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we still need to use the MTRR's to ensure that the cachability attributes
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for all memory regions is correct.
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@ -15,7 +15,7 @@
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2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
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3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
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Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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This program and the accompanying materials
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@ -26,7 +26,7 @@ http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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**/
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#include "DxeIpl.h"
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#include "VirtualMemory.h"
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@ -574,7 +574,7 @@ CreateIdentityMappingPageTables (
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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)
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{
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{
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UINT32 RegEax;
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UINT32 RegEdx;
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UINT8 PhysicalAddressBits;
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@ -647,7 +647,7 @@ CreateIdentityMappingPageTables (
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}
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//
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// Pre-allocate big pages to avoid later allocations.
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// Pre-allocate big pages to avoid later allocations.
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//
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if (!Page1GSupport) {
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TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
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@ -682,7 +682,7 @@ CreateIdentityMappingPageTables (
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if (Page1GSupport) {
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PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
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if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize)) {
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Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize);
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@ -701,7 +701,7 @@ CreateIdentityMappingPageTables (
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//
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// Each Directory Pointer entries points to a page of Page Directory entires.
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// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
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//
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//
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PageDirectoryEntry = (VOID *) BigPageAddress;
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BigPageAddress += SIZE_4KB;
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@ -1,5 +1,5 @@
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/** @file
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x64 Long Mode Virtual Memory Management Definitions
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x64 Long Mode Virtual Memory Management Definitions
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References:
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1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1:Basic Architecture, Intel
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@ -7,7 +7,7 @@
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3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
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4) AMD64 Architecture Programmer's Manual Volume 2: System Programming
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Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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This program and the accompanying materials
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@ -18,7 +18,7 @@ http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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**/
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#ifndef _VIRTUAL_MEMORY_H_
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#define _VIRTUAL_MEMORY_H_
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@ -110,7 +110,7 @@ typedef union {
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UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
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UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
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UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
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UINT64 MustBe1:1; // Must be 1
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UINT64 MustBe1:1; // Must be 1
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UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
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UINT64 Available:3; // Available for use by system software
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UINT64 PAT:1; //
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@ -134,7 +134,7 @@ typedef union {
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UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
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UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
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UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
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UINT64 MustBe1:1; // Must be 1
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UINT64 MustBe1:1; // Must be 1
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UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
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UINT64 Available:3; // Available for use by system software
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UINT64 PAT:1; //
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@ -223,9 +223,9 @@ CreateIdentityMappingPageTables (
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/**
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Fix up the vector number in the vector code.
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@param VectorBase Base address of the vector handler.
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@param VectorNum Index of vector.
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@ -239,11 +239,11 @@ AsmVectorFixup (
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/**
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Get the information of vector template.
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@param TemplateBase Base address of the template code.
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@return Size of the Template code.
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**/
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@ -313,4 +313,4 @@ AllocatePageTableMemory (
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IN UINTN Pages
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);
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#endif
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#endif
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