ArmPlatformPkg: Change the memory model for the ARM Platform components
In the former memory model, the UEFI firmware was expected to be located at the top of the system memory. Stacks & Pi memory regions were set below the firmware. On some platform, the UEFI firmware could be shadowed by the ROM firmware (case of the BeagleBoard) and in some cases the firmware is copied at the beginning of the system memory. With this new memory model, stack and Pi/DXE memory regions are set at the top of the system memory wherever the UEFI firmware is located in the memory map. Because DXE core does not support shadowed firmwares, the system memory covered by the UEFI firmware is marked as 'Non Present' to avoid to be overlapped by DXE allocations. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11992 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -49,14 +49,16 @@ LzmaDecompressLibConstructor (
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VOID
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PrePiMain (
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IN UINTN UefiMemoryBase,
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IN UINTN StackBase,
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IN UINT64 StartTimeStamp
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)
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{
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EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;
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EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;
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EFI_STATUS Status;
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CHAR8 Buffer[100];
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UINTN CharCount;
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UINTN UefiMemoryTop;
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UINTN StacksSize;
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UINTN StacksBase;
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction ();
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@@ -76,19 +78,24 @@ PrePiMain (
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PrePiHobBase = (EFI_HOB_HANDOFF_INFO_TABLE**)(PcdGet32 (PcdCPUCoresNonSecStackBase) + (PcdGet32 (PcdCPUCoresNonSecStackSize) / 2) - PcdGet32 (PcdHobListPtrGlobalOffset));
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// We leave UINT32 at the top of UEFI memory for PcdPrePiHobBase
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UefiMemoryTop = UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
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StacksSize = PcdGet32 (PcdCPUCoresNonSecStackSize) * PcdGet32 (PcdMPCoreMaxCores);
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StacksBase = UefiMemoryTop - StacksSize;
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// Declare the PI/UEFI memory region
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*PrePiHobBase = HobConstructor (
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(VOID*)UefiMemoryBase,
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FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
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(VOID*)UefiMemoryBase,
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(VOID*)(UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) - sizeof(UINT32)));
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(VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks
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);
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// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
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Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
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ASSERT_EFI_ERROR (Status);
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// Create the Stack HOB
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BuildStackHob (StackBase, FixedPcdGet32(PcdCPUCoresNonSecStackSize));
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// Create the Stacks HOB (reserve the memory for all stacks)
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BuildStackHob (StacksBase, StacksSize);
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// Set the Boot Mode
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SetBootMode (ArmPlatformGetBootMode ());
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@@ -99,8 +106,8 @@ PrePiMain (
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BuildMemoryTypeInformationHob ();
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//InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
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//SaveAndSetDebugTimerInterrupt (TRUE);
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InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
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SaveAndSetDebugTimerInterrupt (TRUE);
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// Now, the HOB List has been initialized, we can register performance information
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PERF_START (NULL, "PEI", NULL, StartTimeStamp);
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@@ -129,41 +136,38 @@ PrePiMain (
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VOID
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CEntryPoint (
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IN UINTN CoreId,
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IN UINTN UefiMemoryBase,
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IN UINTN StackBase
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IN UINTN UefiMemoryBase
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)
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{
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UINT64 StartTimeStamp;
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StartTimeStamp = 0;
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if ((CoreId == 0) && PerformanceMeasurementEnabled ()) {
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if ((CoreId == ARM_PRIMARY_CORE) && PerformanceMeasurementEnabled ()) {
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// Initialize the Timer Library to setup the Timer HW controller
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TimerConstructor ();
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// We cannot call yet the PerformanceLib because the HOB List has not been initialized
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StartTimeStamp = GetPerformanceCounter ();
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}
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//Clean Data cache
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ArmCleanInvalidateDataCache();
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// Clean Data cache
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ArmCleanInvalidateDataCache ();
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//Invalidate instruction cache
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ArmInvalidateInstructionCache();
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// Invalidate instruction cache
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ArmInvalidateInstructionCache ();
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//TODO:Drain Write Buffer
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// Enable Instruction & Data caches
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ArmEnableDataCache();
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ArmEnableInstructionCache();
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ArmEnableDataCache ();
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ArmEnableInstructionCache ();
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// Write VBAR - The Vector table must be 32-byte aligned
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ASSERT(((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);
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ArmWriteVBar((UINT32)PrePiVectorTable);
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ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);
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ArmWriteVBar ((UINT32)PrePiVectorTable);
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//If not primary Jump to Secondary Main
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if(0 == CoreId) {
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// If not primary Jump to Secondary Main
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if (CoreId == ARM_PRIMARY_CORE) {
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// Goto primary Main.
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PrimaryMain (UefiMemoryBase, StackBase, StartTimeStamp);
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PrimaryMain (UefiMemoryBase, StartTimeStamp);
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} else {
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SecondaryMain (CoreId);
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}
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