UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.

Because MSR has scope attribute, driver has no needs to set
MSR for all APs if MSR scope is core or package type. This patch
updates code to base on the MSR scope value to add MSR to the register
table.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
Eric Dong
2018-10-17 09:24:05 +08:00
parent 38381e18bf
commit d28daaddb3
12 changed files with 190 additions and 0 deletions

View File

@ -96,6 +96,19 @@ VmxInitialize (
{
MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
//
// The scope of EnableVmxOutsideSmx bit in the MSR_IA32_FEATURE_CONTROL is core for
// below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each
// core.
//
if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
}
ASSERT (ConfigData != NULL);
MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
@ -171,6 +184,19 @@ LockFeatureControlRegisterInitialize (
{
MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
//
// The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for
// below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each
// core.
//
if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
}
ASSERT (ConfigData != NULL);
MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
@ -248,6 +274,18 @@ SmxInitialize (
MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
RETURN_STATUS Status;
//
// The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for
// below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each
// core.
//
if (IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
}
Status = RETURN_SUCCESS;
if (State && (!IsCpuFeatureInSetting (CPU_FEATURE_VMX))) {