Update IntelFspPkg according to FSP1.1.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16825 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Yao, Jiewen
jyao1
@@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@@ -165,7 +165,6 @@ ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize)
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#
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# Following functions will be provided in C
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#
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ASM_GLOBAL ASM_PFX(FspImageSizeOffset)
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ASM_GLOBAL ASM_PFX(SecStartup)
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ASM_GLOBAL ASM_PFX(FspApiCallingCheck)
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@@ -245,7 +244,8 @@ ASM_PFX(LoadUcode):
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#
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# Save return address to EBP
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#
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movl %eax, %ebp
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movd %xmm7, %ebp
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cmpl $0x00, %esp
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jz ParamError
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movl (%esp), %eax #dword ptr [] Parameter pointer
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@@ -448,6 +448,71 @@ LoadUcodeExit:
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jmp *%ebp
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#----------------------------------------------------------------------------
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# EstablishStackFsp
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#
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# Following is the code copied from BYTFSP, need to figure out what it is doing..
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(EstablishStackFsp)
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ASM_PFX(EstablishStackFsp):
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#
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# Save parameter pointer in edx
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#
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movl 4(%esp), %edx
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#
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# Enable FSP STACK
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#
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movl PcdGet32(PcdTemporaryRamBase), %esp
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addl PcdGet32(PcdTemporaryRamSize), %esp
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pushl $DATA_LEN_OF_MCUD # Size of the data region
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pushl $0x4455434D # Signature of the data region 'MCUD'
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pushl 12(%edx) # Code size
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pushl 8(%edx) # Code base
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cmpl $0, %edx # Is parameter pointer valid ?
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jz InvalidMicrocodeRegion
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pushl 4(%edx) # Microcode size
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pushl (%edx) # Microcode base
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jmp EstablishStackFspExit
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InvalidMicrocodeRegion:
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push $0 # Microcode size
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push $0 # Microcode base
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EstablishStackFspExit:
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#
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# Save API entry/exit timestamp into stack
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#
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pushl $DATA_LEN_OF_PER0 # Size of the data region
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pushl $0x30524550 # Signature of the data region 'PER0'
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movd %xmm4, %eax
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pushl %eax
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movd %xmm5, %eax
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pushl %eax
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rdtsc
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pushl %edx
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pushl %eax
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#
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# Terminator for the data on stack
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#
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push $0x00
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#
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# Set ECX/EDX to the bootloader temporary memory range
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#
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movl PcdGet32 (PcdTemporaryRamBase), %ecx
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movl %ecx, %edx
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addl PcdGet32 (PcdTemporaryRamSize), %edx
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subl PcdGet32 (PcdFspTemporaryRamSize), %edx
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xorl %eax, %eax
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movd %mm7, %esi #RET_ESI
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jmp *%esi
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#----------------------------------------------------------------------------
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# TempRamInit API
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#
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@@ -472,103 +537,54 @@ ASM_PFX(TempRamInitApi):
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# Save timestamp into XMM4 & XMM5
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#
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rdtsc
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SAVE_EAX
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SAVE_EDX
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#
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# Check Parameter
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#
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movl 4(%esp), %eax
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cmpl $0x00, %eax
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movl $0x80000002, %eax
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jz NemInitExit
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movd %edx, %xmm4
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movd %eax, %xmm5
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#
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# CPUID/DeviceID check
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#
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movl $TempRamInitApiL0, %eax
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jmp ASM_PFX(FspSelfCheckDflt) # Note: ESP can not be changed.
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jmp ASM_PFX(FspSelfCheckDflt) # @note: ESP can not be changed.
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TempRamInitApiL0:
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cmpl $0x00, %eax
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jnz NemInitExit
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#
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# Platform Basic Init.
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# Sec Platform Init
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#
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movl $TempRamInitApiL1, %eax
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jmp ASM_PFX(PlatformBasicInitDflt)
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movl $TempRamInitApiL1, %esi #CALL_MMX SecPlatformInit
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movd %mm7, %esi
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jmp ASM_PFX(SecPlatformInit)
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TempRamInitApiL1:
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cmpl $0x00, %eax
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jnz NemInitExit
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#
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# Call Sec CAR Init
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#
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movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit
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movd %mm7, %esi
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jmp ASM_PFX(SecCarInit)
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TempRamInitApiL2:
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# @todo: ESP has been modified, we need to restore here.
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LOAD_REGS
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SAVE_REGS
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#
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# Load microcode
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#
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movl $TempRamInitApiL2, %eax
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addl $0x04, %esp
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jmp LoadUcode
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TempRamInitApiL2:
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LOAD_ESP
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cmpl $0x00, %eax
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jnz NemInitExit
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#
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# Call platform NEM init
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#
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movl $TempRamInitApiL3, %eax
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addl $0x04, %esp
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jmp ASM_PFX(PlatformTempRamInit)
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movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode
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movd %mm7, %esi
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jmp ASM_PFX(LoadUcode)
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TempRamInitApiL3:
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subl $0x04, %esp
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cmpl $0x00, %eax
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jnz NemInitExit
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#
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# Save parameter pointer in edx
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# EstablishStackFsp
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#
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movl 4(%esp), %edx
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#
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# Enable FSP STACK
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#
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movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %esp
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addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
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pushl $DATA_LEN_OF_MCUD # Size of the data region
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pushl $0x4455434D # Signature of the data region 'MCUD'
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pushl 4(%edx) # Microcode size
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pushl (%edx) # Microcode base
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pushl 12(%edx) # Code size
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pushl 8(%edx) # Code base
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#
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# Save API entry/exit timestamp into stack
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#
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pushl $DATA_LEN_OF_PER0 # Size of the data region
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pushl $0x30524550 # Signature of the data region 'PER0'
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rdtsc
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pushl %edx
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pushl %eax
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LOAD_EAX
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LOAD_EDX
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pushl %edx
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pushl %eax
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#
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# Terminator for the data on stack
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#
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pushl $0x00
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#
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# Set ECX/EDX to the bootloader temporary memory range
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#
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movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %ecx
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movl %ecx, %edx
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addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %edx
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subl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize), %edx
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xorl %eax, %eax
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movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp
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movd %mm7, %esi
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jmp ASM_PFX(EstablishStackFsp)
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TempRamInitApiL4:
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NemInitExit:
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#
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@@ -577,7 +593,6 @@ NemInitExit:
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LOAD_REGS
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ret
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#----------------------------------------------------------------------------
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# FspInit API
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#
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@@ -588,40 +603,113 @@ NemInitExit:
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(FspInitApi)
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ASM_PFX(FspInitApi):
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movl $0x01, %eax
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jmp FspApiCommon
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#----------------------------------------------------------------------------
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# NotifyPhase API
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#
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# This FSP API will notify the FSP about the different phases in the boot
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# process
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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movl $0x02, %eax
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jmp FspApiCommon
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#----------------------------------------------------------------------------
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# FspMemoryInit API
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#
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# This FSP API is called after TempRamInit and initializes the memory.
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(FspMemoryInitApi)
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ASM_PFX(FspMemoryInitApi):
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movl $0x03, %eax
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jmp FspApiCommon
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#----------------------------------------------------------------------------
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# TempRamExitApi API
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#
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# This API tears down temporary RAM
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(TempRamExitApi)
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ASM_PFX(TempRamExitApi):
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movl $0x04, %eax
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jmp FspApiCommon
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#----------------------------------------------------------------------------
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# FspSiliconInit API
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#
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# This FSP API initializes the CPU and the chipset including the IO
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# controllers in the chipset to enable normal operation of these devices.
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(FspSiliconInitApi)
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ASM_PFX(FspSiliconInitApi):
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movl $0x05, %eax
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jmp FspApiCommon
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#----------------------------------------------------------------------------
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# FspApiCommon API
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#
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# This is the FSP API common entry point to resume the FSP execution
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(FspApiCommon)
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ASM_PFX(FspApiCommon):
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#
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# EAX holds the API index
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#
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#
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# Stack must be ready
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#
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pushl $0x087654321
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popl %eax
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cmpl $0x087654321, %eax
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jz FspInitApiL0
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#
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pushl %eax
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addl $0x04, %esp
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cmpl -4(%esp), %eax
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jz FspApiCommonL0
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movl $0x080000003, %eax
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jmp FspInitApiexit
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jmp FspApiCommonExit
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FspInitApiL0:
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FspApiCommonL0:
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#
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# Additional check
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# Verify the calling condition
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#
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pusha
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pushl $0x01
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pushal
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pushl %eax
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call ASM_PFX(FspApiCallingCheck)
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addl $0x04, %esp
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movl %eax, 28(%esp)
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popa
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cmpl $0x00, %eax
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jz FspInitApiL1
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jmp FspInitApiexit
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jz FspApiCommonL1
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movl %eax, 0x1C(%esp) # mov dword ptr [esp + 4 * 7], eax
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popal
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ret
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FspInitApiL1:
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FspApiCommonL1:
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popal
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cmpl $0x01, %eax # FspInit API
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jz FspApiCommonL2
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cmpl $0x03, %eax # FspMemoryInit API
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jz FspApiCommonL2
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jmp Pei2LoaderSwitchStack
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FspApiCommonL2:
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#
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# FspInit and FspMemoryInit APIs, setup the initial stack frame
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#
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#
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# Store the address in FSP which will return control to the BL
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#
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pushl $FspInitApiexit
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pushl $FspApiCommonExit
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#
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# Create a Task Frame in the stack for the Boot Loader
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#
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pushfl # 2 pushf for 4 byte alignment
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pushfl # 2 pushf for 4 byte alignment
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cli
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pushal
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@@ -634,25 +722,30 @@ FspInitApiL1:
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#
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# Setup new FSP stack
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#
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movl %esp, %eax
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movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %esp
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addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
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movl %esp, %edi
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movl PcdGet32(PcdTemporaryRamBase), %esp
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addl PcdGet32(PcdTemporaryRamSize), %esp
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subl $(DATA_LEN_AT_STACK_TOP + 0x40), %esp
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# Save the bootloader's stack pointer
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#
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pushl %eax
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# Pass the API Idx to SecStartup
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#
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pushl %eax
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#
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# Pass the bootloader stack to SecStartup
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#
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pushl %edi
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#
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# Pass entry point of the PEI core
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#
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call ASM_PFX(GetFspBaseAddress)
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movl ASM_PFX(FspImageSizeOffset), %edi
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movl (%eax, %edi), %edi
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addl %eax, %edi
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subl $0x20, %edi
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addl (%edi), %eax
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pushl %eax
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call ASM_PFX(GetFspBaseAddress)
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movl %eax, %edi
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addl PcdGet32(PcdFspAreaSize), %edi
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subl $0x20, %edi
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addl %ds:(%edi), %eax
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pushl %eax
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#
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# Pass BFV into the PEI Core
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@@ -661,72 +754,27 @@ FspInitApiL1:
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# PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
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# they are different. The code below can handle both cases.
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#
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call ASM_PFX(GetFspBaseAddress)
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movl %eax , %edi
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call ASM_PFX(GetBootFirmwareVolumeOffset)
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addl %edi ,%eax
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pushl %eax
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call ASM_PFX(GetFspBaseAddress)
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movl %eax, %edi
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call ASM_PFX(GetBootFirmwareVolumeOffset)
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addl %edi, %eax
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pushl %eax
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#
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# Pass stack base and size into the PEI Core
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#
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movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %eax
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addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %eax
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subl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize), %eax
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pushl %eax
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pushl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize)
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movl PcdGet32(PcdTemporaryRamBase), %eax
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addl PcdGet32(PcdTemporaryRamSize), %eax
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subl PcdGet32(PcdFspTemporaryRamSize), %eax
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pushl %eax
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pushl PcdGet32(PcdFspTemporaryRamSize)
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#
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# Pass Control into the PEI Core
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#
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call ASM_PFX(SecStartup)
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FspInitApiexit:
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FspApiCommonExit:
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ret
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#----------------------------------------------------------------------------
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# NotifyPhase API
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#
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# This FSP API will notify the FSP about the different phases in the boot
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# process
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(NotifyPhaseApi)
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ASM_PFX(NotifyPhaseApi):
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#
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# Stack must be ready
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#
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pushl $0x0087654321
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popl %eax
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cmpl $0x087654321, %eax
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jz NotifyPhaseApiL0
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movl $0x080000003, %eax
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jmp NotifyPhaseApiErrExit
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NotifyPhaseApiL0:
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#
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# Verify the calling condition
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#
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pusha
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pushl $0x02
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call ASM_PFX(FspApiCallingCheck)
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addl $0x04, %esp
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movl %eax, 28(%esp)
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popa
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cmpl $0x00, %eax
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jz NotifyPhaseApiL1
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#
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# Error return
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#
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NotifyPhaseApiErrExit:
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ret
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NotifyPhaseApiL1:
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jmp ASM_PFX(Pei2LoaderSwitchStack)
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#END
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