ARM: Remove NSACR from the common code

NSACR (Non-Secure Access Control Register) is AArch32 specific.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Include/Chipset/AArch64.h

@@ -34,15 +34,6 @@
 // ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
 #define AARCH64_PFR0_FP         (0xF << 16)
 
-// NSACR - Non-Secure Access Control Register definitions
-#define NSACR_CP(cp)            ((1 << (cp)) & 0x3FFF)
-#define NSACR_NSD32DIS          (1 << 14)
-#define NSACR_NSASEDIS          (1 << 15)
-#define NSACR_PLE               (1 << 16)
-#define NSACR_TL                (1 << 17)
-#define NSACR_NS_SMP            (1 << 18)
-#define NSACR_RFR               (1 << 19)
-
 // SCR - Secure Configuration Register definitions
 #define SCR_NS                  (1 << 0)
 #define SCR_IRQ                 (1 << 1)
@@ -176,4 +167,9 @@ GcdAttributeToPageAttribute (
   IN UINT64 GcdAttributes
   );
 
+UINTN
+ArmWriteCptr (
+  IN  UINT64 Cptr
+  );
+
 #endif // __AARCH64_H__

ArmPkg/Include/Chipset/ArmV7.h

@@ -112,5 +112,17 @@ EFIAPI
 ArmReadIdPfr1 (
   VOID
   );
-  
+
+UINT32
+EFIAPI
+ArmReadNsacr (
+  VOID
+  );
+
+VOID
+EFIAPI
+ArmWriteNsacr (
+  IN  UINT32   Nsacr
+  );
+
 #endif // __ARM_V7_H__