ARM: Remove NSACR from the common code
NSACR (Non-Secure Access Control Register) is AArch32 specific. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
parent
3cc033c51f
commit
d6dc67ba1b
@@ -38,8 +38,6 @@ GCC_ASM_EXPORT(ArmWriteAuxCr)
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GCC_ASM_EXPORT(ArmReadAuxCr)
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GCC_ASM_EXPORT(ArmInvalidateTlb)
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GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
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GCC_ASM_EXPORT(ArmReadNsacr)
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GCC_ASM_EXPORT(ArmWriteNsacr)
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GCC_ASM_EXPORT(ArmReadScr)
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GCC_ASM_EXPORT(ArmWriteScr)
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GCC_ASM_EXPORT(ArmReadMVBar)
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@@ -147,14 +145,6 @@ ASM_PFX(ArmInvalidateTlb):
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isb
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bx lr
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ASM_PFX(ArmReadNsacr):
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mrc p15, 0, r0, c1, c1, 2
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bx lr
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ASM_PFX(ArmWriteNsacr):
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mcr p15, 0, r0, c1, c1, 2
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bx lr
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ASM_PFX(ArmReadScr):
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mrc p15, 0, r0, c1, c1, 0
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bx lr
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@@ -38,8 +38,6 @@
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EXPORT ArmReadAuxCr
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EXPORT ArmInvalidateTlb
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EXPORT ArmUpdateTranslationTableEntry
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EXPORT ArmReadNsacr
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EXPORT ArmWriteNsacr
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EXPORT ArmReadScr
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EXPORT ArmWriteScr
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EXPORT ArmReadMVBar
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@@ -147,14 +145,6 @@ ArmInvalidateTlb
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isb
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bx lr
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ArmReadNsacr
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mrc p15, 0, r0, c1, c1, 2
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bx lr
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ArmWriteNsacr
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mcr p15, 0, r0, c1, c1, 2
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bx lr
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ArmReadScr
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mrc p15, 0, r0, c1, c1, 0
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bx lr
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