ARM: Remove NSACR from the common code

NSACR (Non-Secure Access Control Register) is AArch32 specific.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14522 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/Sec/AArch64/Arch.c

@@ -0,0 +1,25 @@
+/** @file
+*
+*  Copyright (c) 2013, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Chipset/AArch64.h>
+
+VOID
+EFIAPI
+ArmSecArchTrustzoneInit (
+  VOID
+  )
+{
+  // Do not trap any access to Floating Point and Advanced SIMD in EL3.
+  ArmWriteCptr (0);
+}

ArmPlatformPkg/Sec/Arm/Arch.c

@@ -0,0 +1,25 @@
+/** @file
+*
+*  Copyright (c) 2013, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Chipset/ArmV7.h>
+
+VOID
+EFIAPI
+ArmSecArchTrustzoneInit (
+  VOID
+  )
+{
+  // Write to CP15 Non-secure Access Control Register
+  ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
+}

ArmPlatformPkg/Sec/Sec.c

@@ -165,8 +165,8 @@ TrustedWorldInitialization (
   JumpAddress = PcdGet32 (PcdFvBaseAddress);
   ArmPlatformSecExtraAction (MpId, &JumpAddress);
 
-  // Write to CP15 Non-secure Access Control Register
-  ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
+  // Initialize architecture specific security policy
+  ArmSecArchTrustzoneInit ();
 
   // CP15 Secure Configuration Register
   ArmWriteScr (PcdGet32 (PcdArmScr));

ArmPlatformPkg/Sec/Sec.inf

@@ -24,12 +24,14 @@
   Sec.c
 
 [Sources.ARM]
+  Arm/Arch.c
   Arm/Helper.asm           | RVCT
   Arm/Helper.S             | GCC
   Arm/SecEntryPoint.S      | GCC
   Arm/SecEntryPoint.asm    | RVCT
   
 [Sources.AARCH64]
+  AArch64/Arch.c
   AArch64/Helper.S        | GCC
   AArch64/SecEntryPoint.S | GCC
 
@@ -56,14 +58,13 @@
 [FeaturePcd]
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
   
-[FixedPcd]
+[FixedPcd.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
 
   gArmTokenSpaceGuid.PcdTrustzoneSupport
   gArmTokenSpaceGuid.PcdVFPEnabled
   
   gArmTokenSpaceGuid.PcdArmScr
-  gArmTokenSpaceGuid.PcdArmNsacr
   gArmTokenSpaceGuid.PcdArmNonSecModeTransition
   
   gArmTokenSpaceGuid.PcdSecureFvBaseAddress
@@ -81,3 +82,6 @@
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
   
   gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize  
+
+[FixedPcd.ARM]
+  gArmTokenSpaceGuid.PcdArmNsacr

ArmPlatformPkg/Sec/SecInternal.h

@@ -74,4 +74,10 @@ SecCommonExceptionEntry (
   IN UINTN  LR
   );
 
+VOID
+EFIAPI
+ArmSecArchTrustzoneInit (
+  VOID
+  );
+
 #endif