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UefiCpuPkg/CpuExceptionHandlerLib: Trim white space at end of line

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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
This commit is contained in:
Jeff Fan
2017-04-07 10:00:59 +08:00
parent c54a6e6feb
commit dd56374250
21 changed files with 152 additions and 152 deletions
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6
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
View File

@@ -29,7 +29,7 @@ ArchUpdateIdtEntry (
{
IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
@@ -79,7 +79,7 @@ ArchSaveExceptionContext (
// Clear IF flag to avoid old IDT handler enable interrupt by IRET
//
Eflags.UintN = SystemContext.SystemContextX64->Rflags;
Eflags.Bits.IF = 0;
Eflags.Bits.IF = 0;
SystemContext.SystemContextX64->Rflags = Eflags.UintN;
//
// Modify the EIP in stack, then old IDT handler will return to the stub code
@@ -236,7 +236,7 @@ DumpCpuContext (
SystemContext.SystemContextX64->Idtr[1],
SystemContext.SystemContextX64->Tr
);
InternalPrintMessage (
InternalPrintMessage (
"FXSAVE_STATE - %016lx\n",
&SystemContext.SystemContextX64->FxSaveState
);

18
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S
View File

@@ -29,8 +29,8 @@ ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
.text
#ifdef __APPLE__
# macros are different between GNU and Xcode as.
.macro IDT_MACRO
# macros are different between GNU and Xcode as.
.macro IDT_MACRO
push $0
#else
.macro IDT_MACRO arg
@@ -78,7 +78,7 @@ AsmIdtVectorEnd:
HookAfterStubHeaderBegin:
.byte 0x6a # push
PatchVectorNum:
.byte 0 # 0 will be fixed
.byte 0 # 0 will be fixed
.byte 0xe9 # jmp ASM_PFX(HookAfterStubHeaderEnd)
PatchFuncAddress:
.set HOOK_ADDRESS, ASM_PFX(HookAfterStubHeaderEnd) - . - 4
@@ -234,16 +234,16 @@ CommonInterruptEntry_al_0000:
movq %cr8, %rax
pushq %rax
movq %cr4, %rax
orq $0x208, %rax
movq %rax, %cr4
orq $0x208, %rax
movq %rax, %cr4
pushq %rax
mov %cr3, %rax
mov %cr3, %rax
pushq %rax
mov %cr2, %rax
mov %cr2, %rax
pushq %rax
xorq %rax, %rax
pushq %rax
mov %cr0, %rax
mov %cr0, %rax
pushq %rax
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
@@ -278,7 +278,7 @@ CommonInterruptEntry_al_0000:
# Per X64 calling convention, allocate maximum parameter stack space
# and make sure RSP is 16-byte aligned
#
subq $40, %rsp
subq $40, %rsp
call ASM_PFX(CommonExceptionHandler)
addq $40, %rsp

8
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm
View File

@@ -47,7 +47,7 @@ AsmIdtVectorEnd:
HookAfterStubHeaderBegin:
db 6ah ; push
@VectorNum:
db 0 ; 0 will be fixed
db 0 ; 0 will be fixed
push rax
mov rax, HookAfterStubHeaderEnd
jmp rax
@@ -89,7 +89,7 @@ HookAfterStubHeaderEnd:
; + RBP +
; +---------------------+ <-- RBP, 16-byte aligned
; The follow algorithm is used for the common interrupt routine.
CommonInterruptEntry PROC PUBLIC
CommonInterruptEntry PROC PUBLIC
cli
pop rax
;
@@ -111,7 +111,7 @@ NoErrorCode:
;
push [rsp]
mov qword ptr [rsp + 8], 0
@@:
@@:
push rbp
mov rbp, rsp
push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
@@ -351,7 +351,7 @@ DoReturn:
jz DoIret
push rax
mov rax, rsp ; save old RSP to rax
mov rsp, [rsp + 20h]
mov rsp, [rsp + 20h]
push [rax + 10h] ; save CS in new location
push [rax + 8h] ; save EIP in new location
push [rax + 18h] ; save EFLAGS in new location