IntelFsp2WrapperPkg: Revert 90c5bc08
Commit message issue and reverted commit
90c5bc081d
.
Will re-submit with correct formats.
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
@@ -71,8 +71,9 @@
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## Indicate the PEI memory size platform want to report
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gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
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## This is the base address of FSP-T
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## This is the base address of FSP-T/M/S
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gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
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## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
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# If a bit is set, that means this FSP API is skipped.<BR>
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@@ -92,17 +93,7 @@
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# @Prompt Skip FSP API from FSP wrapper.
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gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
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## This PCD decides how Wrapper code utilizes FSP
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# 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
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# 1: API mode (FSP Wrapper will call FSP API)
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
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[PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
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#
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## These are the base address of FSP-M/S
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
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#
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# To provide flexibility for platform to pre-allocate FSP UPD buffer
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